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47d37dd9 JQ |
1 | /* |
2 | * QEMU PCI VGA Emulator. | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include "hw.h" | |
25 | #include "console.h" | |
26 | #include "pc.h" | |
27 | #include "pci.h" | |
28 | #include "vga_int.h" | |
29 | #include "pixel_ops.h" | |
30 | #include "qemu-timer.h" | |
5245d57a | 31 | #include "loader.h" |
47d37dd9 JQ |
32 | |
33 | typedef struct PCIVGAState { | |
34 | PCIDevice dev; | |
35 | VGACommonState vga; | |
36 | } PCIVGAState; | |
37 | ||
a4f9631c JQ |
38 | static const VMStateDescription vmstate_vga_pci = { |
39 | .name = "vga", | |
40 | .version_id = 2, | |
41 | .minimum_version_id = 2, | |
42 | .minimum_version_id_old = 2, | |
43 | .fields = (VMStateField []) { | |
44 | VMSTATE_PCI_DEVICE(dev, PCIVGAState), | |
45 | VMSTATE_STRUCT(vga, PCIVGAState, 0, vmstate_vga_common, VGACommonState), | |
46 | VMSTATE_END_OF_LIST() | |
47d37dd9 | 47 | } |
a4f9631c | 48 | }; |
47d37dd9 | 49 | |
47d37dd9 | 50 | static void vga_map(PCIDevice *pci_dev, int region_num, |
6e355d90 | 51 | pcibus_t addr, pcibus_t size, int type) |
47d37dd9 JQ |
52 | { |
53 | PCIVGAState *d = (PCIVGAState *)pci_dev; | |
54 | VGACommonState *s = &d->vga; | |
55 | if (region_num == PCI_ROM_SLOT) { | |
56 | cpu_register_physical_memory(addr, s->bios_size, s->bios_offset); | |
57 | } else { | |
58 | cpu_register_physical_memory(addr, s->vram_size, s->vram_offset); | |
59 | s->map_addr = addr; | |
60 | s->map_end = addr + s->vram_size; | |
61 | vga_dirty_log_start(s); | |
62 | } | |
63 | } | |
64 | ||
65 | static void pci_vga_write_config(PCIDevice *d, | |
66 | uint32_t address, uint32_t val, int len) | |
67 | { | |
68 | PCIVGAState *pvs = container_of(d, PCIVGAState, dev); | |
69 | VGACommonState *s = &pvs->vga; | |
70 | ||
71 | pci_default_write_config(d, address, val, len); | |
72 | if (s->map_addr && pvs->dev.io_regions[0].addr == -1) | |
73 | s->map_addr = 0; | |
74 | } | |
75 | ||
76 | static int pci_vga_initfn(PCIDevice *dev) | |
77 | { | |
78 | PCIVGAState *d = DO_UPCAST(PCIVGAState, dev, dev); | |
79 | VGACommonState *s = &d->vga; | |
80 | uint8_t *pci_conf = d->dev.config; | |
81 | ||
82 | // vga + console init | |
83 | vga_common_init(s, VGA_RAM_SIZE); | |
84 | vga_init(s); | |
47d37dd9 JQ |
85 | |
86 | s->ds = graphic_console_init(s->update, s->invalidate, | |
87 | s->screen_dump, s->text_update, s); | |
88 | ||
89 | // dummy VGA (same as Bochs ID) | |
90 | pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_QEMU); | |
91 | pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_QEMU_VGA); | |
92 | pci_config_set_class(pci_conf, PCI_CLASS_DISPLAY_VGA); | |
93 | pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type | |
94 | ||
95 | /* XXX: VGA_RAM_SIZE must be a power of two */ | |
96 | pci_register_bar(&d->dev, 0, VGA_RAM_SIZE, | |
0392a017 | 97 | PCI_BASE_ADDRESS_MEM_PREFETCH, vga_map); |
47d37dd9 JQ |
98 | |
99 | if (s->bios_size) { | |
100 | unsigned int bios_total_size; | |
101 | /* must be a power of two */ | |
102 | bios_total_size = 1; | |
103 | while (bios_total_size < s->bios_size) | |
104 | bios_total_size <<= 1; | |
105 | pci_register_bar(&d->dev, PCI_ROM_SLOT, bios_total_size, | |
0392a017 | 106 | PCI_BASE_ADDRESS_MEM_PREFETCH, vga_map); |
47d37dd9 | 107 | } |
5245d57a | 108 | |
f0138a63 | 109 | vga_init_vbe(s); |
5245d57a GH |
110 | /* ROM BIOS */ |
111 | rom_add_vga(VGABIOS_FILENAME); | |
47d37dd9 JQ |
112 | return 0; |
113 | } | |
114 | ||
115 | int pci_vga_init(PCIBus *bus, | |
116 | unsigned long vga_bios_offset, int vga_bios_size) | |
117 | { | |
118 | PCIDevice *dev; | |
119 | ||
499cf102 | 120 | dev = pci_create(bus, -1, "VGA"); |
47d37dd9 | 121 | qdev_prop_set_uint32(&dev->qdev, "bios-offset", vga_bios_offset); |
bc90ff77 | 122 | qdev_prop_set_uint32(&dev->qdev, "bios-size", vga_bios_size); |
e23a1b33 | 123 | qdev_init_nofail(&dev->qdev); |
47d37dd9 JQ |
124 | |
125 | return 0; | |
126 | } | |
127 | ||
128 | static PCIDeviceInfo vga_info = { | |
129 | .qdev.name = "VGA", | |
130 | .qdev.size = sizeof(PCIVGAState), | |
be73cfe2 | 131 | .qdev.vmsd = &vmstate_vga_pci, |
47d37dd9 JQ |
132 | .init = pci_vga_initfn, |
133 | .config_write = pci_vga_write_config, | |
134 | .qdev.props = (Property[]) { | |
135 | DEFINE_PROP_HEX32("bios-offset", PCIVGAState, vga.bios_offset, 0), | |
136 | DEFINE_PROP_HEX32("bios-size", PCIVGAState, vga.bios_size, 0), | |
137 | DEFINE_PROP_END_OF_LIST(), | |
138 | } | |
139 | }; | |
140 | ||
141 | static void vga_register(void) | |
142 | { | |
143 | pci_qdev_register(&vga_info); | |
144 | } | |
145 | device_init(vga_register); |