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05330448 AL |
1 | /* |
2 | * QEMU KVM support | |
3 | * | |
4 | * Copyright IBM, Corp. 2008 | |
5 | * | |
6 | * Authors: | |
7 | * Anthony Liguori <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | * | |
12 | */ | |
13 | ||
14 | #ifndef QEMU_KVM_H | |
15 | #define QEMU_KVM_H | |
16 | ||
ca821806 | 17 | #include <errno.h> |
1c14f162 | 18 | #include "config-host.h" |
1de7afc9 | 19 | #include "qemu/queue.h" |
504134d2 | 20 | #include "qom/cpu.h" |
05330448 | 21 | |
ca821806 MT |
22 | #ifdef CONFIG_KVM |
23 | #include <linux/kvm.h> | |
bc74b7db | 24 | #include <linux/kvm_para.h> |
9ca58923 EH |
25 | #else |
26 | /* These constants must never be used at runtime if kvm_enabled() is false. | |
27 | * They exist so we don't need #ifdefs around KVM-specific code that already | |
28 | * checks kvm_enabled() properly. | |
29 | */ | |
30 | #define KVM_CPUID_SIGNATURE 0 | |
31 | #define KVM_CPUID_FEATURES 0 | |
32 | #define KVM_FEATURE_CLOCKSOURCE 0 | |
33 | #define KVM_FEATURE_NOP_IO_DELAY 0 | |
34 | #define KVM_FEATURE_MMU_OP 0 | |
35 | #define KVM_FEATURE_CLOCKSOURCE2 0 | |
36 | #define KVM_FEATURE_ASYNC_PF 0 | |
37 | #define KVM_FEATURE_STEAL_TIME 0 | |
38 | #define KVM_FEATURE_PV_EOI 0 | |
d61a23ba | 39 | #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 0 |
ca821806 | 40 | #endif |
05330448 | 41 | |
ca821806 | 42 | extern int kvm_allowed; |
3d4b2649 | 43 | extern bool kvm_kernel_irqchip; |
7ae26bd4 | 44 | extern bool kvm_async_interrupts_allowed; |
cc7e0ddf | 45 | extern bool kvm_irqfds_allowed; |
614e41bc | 46 | extern bool kvm_msi_via_irqfd_allowed; |
f3e1bed8 | 47 | extern bool kvm_gsi_routing_allowed; |
98c8573e PB |
48 | |
49 | #if defined CONFIG_KVM || !defined NEED_CPU_H | |
3d4b2649 | 50 | #define kvm_enabled() (kvm_allowed) |
96fda35a PM |
51 | /** |
52 | * kvm_irqchip_in_kernel: | |
53 | * | |
54 | * Returns: true if the user asked us to create an in-kernel | |
55 | * irqchip via the "kernel_irqchip=on" machine option. | |
56 | * What this actually means is architecture and machine model | |
57 | * specific: on PC, for instance, it means that the LAPIC, | |
58 | * IOAPIC and PIT are all in kernel. This function should never | |
59 | * be used from generic target-independent code: use one of the | |
60 | * following functions or some other specific check instead. | |
61 | */ | |
3d4b2649 | 62 | #define kvm_irqchip_in_kernel() (kvm_kernel_irqchip) |
7ae26bd4 PM |
63 | |
64 | /** | |
65 | * kvm_async_interrupts_enabled: | |
66 | * | |
67 | * Returns: true if we can deliver interrupts to KVM | |
68 | * asynchronously (ie by ioctl from any thread at any time) | |
69 | * rather than having to do interrupt delivery synchronously | |
70 | * (where the vcpu must be stopped at a suitable point first). | |
71 | */ | |
72 | #define kvm_async_interrupts_enabled() (kvm_async_interrupts_allowed) | |
73 | ||
cc7e0ddf PM |
74 | /** |
75 | * kvm_irqfds_enabled: | |
76 | * | |
77 | * Returns: true if we can use irqfds to inject interrupts into | |
78 | * a KVM CPU (ie the kernel supports irqfds and we are running | |
79 | * with a configuration where it is meaningful to use them). | |
80 | */ | |
81 | #define kvm_irqfds_enabled() (kvm_irqfds_allowed) | |
82 | ||
614e41bc PM |
83 | /** |
84 | * kvm_msi_via_irqfd_enabled: | |
85 | * | |
86 | * Returns: true if we can route a PCI MSI (Message Signaled Interrupt) | |
87 | * to a KVM CPU via an irqfd. This requires that the kernel supports | |
88 | * this and that we're running in a configuration that permits it. | |
89 | */ | |
90 | #define kvm_msi_via_irqfd_enabled() (kvm_msi_via_irqfd_allowed) | |
91 | ||
f3e1bed8 PM |
92 | /** |
93 | * kvm_gsi_routing_enabled: | |
94 | * | |
95 | * Returns: true if GSI routing is enabled (ie the kernel supports | |
96 | * it and we're running in a configuration that permits it). | |
97 | */ | |
98 | #define kvm_gsi_routing_enabled() (kvm_gsi_routing_allowed) | |
99 | ||
05330448 | 100 | #else |
3d4b2649 JK |
101 | #define kvm_enabled() (0) |
102 | #define kvm_irqchip_in_kernel() (false) | |
7ae26bd4 | 103 | #define kvm_async_interrupts_enabled() (false) |
cc7e0ddf | 104 | #define kvm_irqfds_enabled() (false) |
614e41bc | 105 | #define kvm_msi_via_irqfd_enabled() (false) |
f3e1bed8 | 106 | #define kvm_gsi_routing_allowed() (false) |
05330448 AL |
107 | #endif |
108 | ||
109 | struct kvm_run; | |
680c1c6f | 110 | struct kvm_lapic_state; |
05330448 | 111 | |
94a8d39a JK |
112 | typedef struct KVMCapabilityInfo { |
113 | const char *name; | |
114 | int value; | |
115 | } KVMCapabilityInfo; | |
116 | ||
117 | #define KVM_CAP_INFO(CAP) { "KVM_CAP_" stringify(CAP), KVM_CAP_##CAP } | |
118 | #define KVM_CAP_LAST_INFO { NULL, 0 } | |
119 | ||
92b4e489 JK |
120 | struct KVMState; |
121 | typedef struct KVMState KVMState; | |
122 | extern KVMState *kvm_state; | |
123 | ||
05330448 AL |
124 | /* external API */ |
125 | ||
cad1e282 | 126 | int kvm_init(void); |
05330448 | 127 | |
00a1555e PB |
128 | int kvm_has_sync_mmu(void); |
129 | int kvm_has_vcpu_events(void); | |
130 | int kvm_has_robust_singlestep(void); | |
ff44f1a3 | 131 | int kvm_has_debugregs(void); |
f1665b21 SY |
132 | int kvm_has_xsave(void); |
133 | int kvm_has_xcrs(void); | |
8a7c7393 | 134 | int kvm_has_pit_state2(void); |
d2f2b8a7 | 135 | int kvm_has_many_ioeventfds(void); |
84b058d7 | 136 | int kvm_has_gsi_routing(void); |
3ab73842 | 137 | int kvm_has_intx_set_mask(void); |
00a1555e | 138 | |
504134d2 | 139 | int kvm_init_vcpu(CPUState *cpu); |
05330448 | 140 | |
504134d2 | 141 | #ifdef NEED_CPU_H |
9349b4f9 | 142 | int kvm_cpu_exec(CPUArchState *env); |
05330448 | 143 | |
b3755a91 | 144 | #if !defined(CONFIG_USER_ONLY) |
fdec9918 CB |
145 | void *kvm_vmalloc(ram_addr_t size); |
146 | void *kvm_arch_vmalloc(ram_addr_t size); | |
6f0437e8 JK |
147 | void kvm_setup_guest_memory(void *start, size_t size); |
148 | ||
62a2744c | 149 | void kvm_flush_coalesced_mmio_buffer(void); |
b3755a91 | 150 | #endif |
f65ed4c1 | 151 | |
9349b4f9 | 152 | int kvm_insert_breakpoint(CPUArchState *current_env, target_ulong addr, |
e22a25c9 | 153 | target_ulong len, int type); |
9349b4f9 | 154 | int kvm_remove_breakpoint(CPUArchState *current_env, target_ulong addr, |
e22a25c9 | 155 | target_ulong len, int type); |
9349b4f9 AF |
156 | void kvm_remove_all_breakpoints(CPUArchState *current_env); |
157 | int kvm_update_guest_debug(CPUArchState *env, unsigned long reinject_trap); | |
20c20526 | 158 | #ifndef _WIN32 |
9349b4f9 | 159 | int kvm_set_signal_mask(CPUArchState *env, const sigset_t *sigset); |
20c20526 | 160 | #endif |
e22a25c9 | 161 | |
290adf38 | 162 | int kvm_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); |
a1b87fe0 JK |
163 | int kvm_on_sigbus(int code, void *addr); |
164 | ||
05330448 AL |
165 | /* internal API */ |
166 | ||
984b5181 | 167 | int kvm_ioctl(KVMState *s, int type, ...); |
05330448 | 168 | |
984b5181 | 169 | int kvm_vm_ioctl(KVMState *s, int type, ...); |
05330448 | 170 | |
1bc22652 | 171 | int kvm_vcpu_ioctl(CPUState *cpu, int type, ...); |
05330448 AL |
172 | |
173 | /* Arch specific hooks */ | |
174 | ||
94a8d39a JK |
175 | extern const KVMCapabilityInfo kvm_arch_required_capabilities[]; |
176 | ||
20d695a9 AF |
177 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run); |
178 | void kvm_arch_post_run(CPUState *cpu, struct kvm_run *run); | |
05330448 | 179 | |
20d695a9 | 180 | int kvm_arch_handle_exit(CPUState *cpu, struct kvm_run *run); |
05330448 | 181 | |
20d695a9 | 182 | int kvm_arch_process_async_events(CPUState *cpu); |
0af691d7 | 183 | |
20d695a9 | 184 | int kvm_arch_get_registers(CPUState *cpu); |
05330448 | 185 | |
ea375f9a JK |
186 | /* state subset only touched by the VCPU itself during runtime */ |
187 | #define KVM_PUT_RUNTIME_STATE 1 | |
188 | /* state subset modified during VCPU reset */ | |
189 | #define KVM_PUT_RESET_STATE 2 | |
190 | /* full state set, modified during initialization or on vmload */ | |
191 | #define KVM_PUT_FULL_STATE 3 | |
192 | ||
20d695a9 | 193 | int kvm_arch_put_registers(CPUState *cpu, int level); |
05330448 | 194 | |
cad1e282 | 195 | int kvm_arch_init(KVMState *s); |
05330448 | 196 | |
20d695a9 | 197 | int kvm_arch_init_vcpu(CPUState *cpu); |
05330448 | 198 | |
b164e48e EH |
199 | /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */ |
200 | unsigned long kvm_arch_vcpu_id(CPUState *cpu); | |
201 | ||
20d695a9 | 202 | void kvm_arch_reset_vcpu(CPUState *cpu); |
caa5af0f | 203 | |
20d695a9 | 204 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); |
a1b87fe0 | 205 | int kvm_arch_on_sigbus(int code, void *addr); |
c0532a76 | 206 | |
84b058d7 JK |
207 | void kvm_arch_init_irq_routing(KVMState *s); |
208 | ||
3889c3fa | 209 | int kvm_set_irq(KVMState *s, int irq, int level); |
04fa27f5 | 210 | int kvm_irqchip_send_msi(KVMState *s, MSIMessage msg); |
84b058d7 | 211 | |
1df186df | 212 | void kvm_irqchip_add_irq_route(KVMState *s, int gsi, int irqchip, int pin); |
84b058d7 | 213 | |
680c1c6f JK |
214 | void kvm_put_apic_state(DeviceState *d, struct kvm_lapic_state *kapic); |
215 | void kvm_get_apic_state(DeviceState *d, struct kvm_lapic_state *kapic); | |
216 | ||
e22a25c9 AL |
217 | struct kvm_guest_debug; |
218 | struct kvm_debug_exit_arch; | |
219 | ||
220 | struct kvm_sw_breakpoint { | |
221 | target_ulong pc; | |
222 | target_ulong saved_insn; | |
223 | int use_count; | |
72cf2d4f | 224 | QTAILQ_ENTRY(kvm_sw_breakpoint) entry; |
e22a25c9 AL |
225 | }; |
226 | ||
72cf2d4f | 227 | QTAILQ_HEAD(kvm_sw_breakpoint_head, kvm_sw_breakpoint); |
e22a25c9 | 228 | |
a60f24b5 | 229 | struct kvm_sw_breakpoint *kvm_find_sw_breakpoint(CPUState *cpu, |
e22a25c9 AL |
230 | target_ulong pc); |
231 | ||
a60f24b5 | 232 | int kvm_sw_breakpoints_active(CPUState *cpu); |
e22a25c9 | 233 | |
20d695a9 | 234 | int kvm_arch_insert_sw_breakpoint(CPUState *current_cpu, |
e22a25c9 | 235 | struct kvm_sw_breakpoint *bp); |
20d695a9 | 236 | int kvm_arch_remove_sw_breakpoint(CPUState *current_cpu, |
e22a25c9 AL |
237 | struct kvm_sw_breakpoint *bp); |
238 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, | |
239 | target_ulong len, int type); | |
240 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
241 | target_ulong len, int type); | |
242 | void kvm_arch_remove_all_hw_breakpoints(void); | |
243 | ||
20d695a9 | 244 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg); |
e22a25c9 | 245 | |
20d695a9 | 246 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu); |
4513d923 | 247 | |
ad7b8b33 AL |
248 | int kvm_check_extension(KVMState *s, unsigned int extension); |
249 | ||
ba9bc59e | 250 | uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function, |
c958a8bd | 251 | uint32_t index, int reg); |
9349b4f9 AF |
252 | void kvm_cpu_synchronize_state(CPUArchState *env); |
253 | void kvm_cpu_synchronize_post_reset(CPUArchState *env); | |
254 | void kvm_cpu_synchronize_post_init(CPUArchState *env); | |
b827df58 | 255 | |
e22a25c9 AL |
256 | /* generic hooks - to be moved/refactored once there are more users */ |
257 | ||
9349b4f9 | 258 | static inline void cpu_synchronize_state(CPUArchState *env) |
e22a25c9 AL |
259 | { |
260 | if (kvm_enabled()) { | |
4c0960c0 | 261 | kvm_cpu_synchronize_state(env); |
e22a25c9 AL |
262 | } |
263 | } | |
264 | ||
9349b4f9 | 265 | static inline void cpu_synchronize_post_reset(CPUArchState *env) |
ea375f9a JK |
266 | { |
267 | if (kvm_enabled()) { | |
268 | kvm_cpu_synchronize_post_reset(env); | |
269 | } | |
270 | } | |
271 | ||
9349b4f9 | 272 | static inline void cpu_synchronize_post_init(CPUArchState *env) |
ea375f9a JK |
273 | { |
274 | if (kvm_enabled()) { | |
275 | kvm_cpu_synchronize_post_init(env); | |
276 | } | |
277 | } | |
ca821806 | 278 | |
983dfc3b HY |
279 | |
280 | #if !defined(CONFIG_USER_ONLY) | |
9f213ed9 | 281 | int kvm_physical_memory_addr_from_host(KVMState *s, void *ram_addr, |
a8170e5e | 282 | hwaddr *phys_addr); |
983dfc3b HY |
283 | #endif |
284 | ||
ca821806 | 285 | #endif |
4b8f1c88 MT |
286 | int kvm_set_ioeventfd_mmio(int fd, uint32_t adr, uint32_t val, bool assign, |
287 | uint32_t size); | |
ca821806 | 288 | |
98c8573e | 289 | int kvm_set_ioeventfd_pio_word(int fd, uint16_t adr, uint16_t val, bool assign); |
92b4e489 JK |
290 | |
291 | int kvm_irqchip_add_msi_route(KVMState *s, MSIMessage msg); | |
cc57407e | 292 | int kvm_irqchip_update_msi_route(KVMState *s, int virq, MSIMessage msg); |
1e2aa8be | 293 | void kvm_irqchip_release_virq(KVMState *s, int virq); |
39853bbc | 294 | |
b131c74a JK |
295 | int kvm_irqchip_add_irqfd_notifier(KVMState *s, EventNotifier *n, int virq); |
296 | int kvm_irqchip_remove_irqfd_notifier(KVMState *s, EventNotifier *n, int virq); | |
d8ee0384 JB |
297 | void kvm_pc_gsi_handler(void *opaque, int n, int level); |
298 | void kvm_pc_setup_irq_routing(bool pci_enabled); | |
05330448 | 299 | #endif |