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Commit | Line | Data |
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051c190b HC |
1 | /* |
2 | * QEMU fulong 2e mini pc support | |
3 | * | |
4 | * Copyright (c) 2008 yajin ([email protected]) | |
5 | * Copyright (c) 2009 chenming ([email protected]) | |
6 | * Copyright (c) 2010 Huacai Chen ([email protected]) | |
7 | * This code is licensed under the GNU GPL v2. | |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
051c190b HC |
11 | */ |
12 | ||
13 | /* | |
14 | * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz) | |
15 | * http://www.linux-mips.org/wiki/Fulong | |
16 | * | |
17 | * Loongson 2e user manual: | |
18 | * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf | |
19 | */ | |
20 | ||
c684822a | 21 | #include "qemu/osdep.h" |
da34e65c | 22 | #include "qapi/error.h" |
83c9f4ca | 23 | #include "hw/hw.h" |
0d09e41a PB |
24 | #include "hw/i386/pc.h" |
25 | #include "hw/char/serial.h" | |
26 | #include "hw/block/fdc.h" | |
1422e32d | 27 | #include "net/net.h" |
83c9f4ca | 28 | #include "hw/boards.h" |
0d09e41a | 29 | #include "hw/i2c/smbus.h" |
4be74634 | 30 | #include "sysemu/block-backend.h" |
0d09e41a PB |
31 | #include "hw/block/flash.h" |
32 | #include "hw/mips/mips.h" | |
33 | #include "hw/mips/cpudevs.h" | |
83c9f4ca | 34 | #include "hw/pci/pci.h" |
dccfcd0e | 35 | #include "sysemu/char.h" |
9c17d615 | 36 | #include "sysemu/sysemu.h" |
051c190b | 37 | #include "audio/audio.h" |
1de7afc9 | 38 | #include "qemu/log.h" |
83c9f4ca | 39 | #include "hw/loader.h" |
0d09e41a | 40 | #include "hw/mips/bios.h" |
83c9f4ca | 41 | #include "hw/ide.h" |
051c190b | 42 | #include "elf.h" |
0d09e41a PB |
43 | #include "hw/isa/vt82c686.h" |
44 | #include "hw/timer/mc146818rtc.h" | |
45 | #include "hw/timer/i8254.h" | |
9c17d615 | 46 | #include "sysemu/blockdev.h" |
022c62cb | 47 | #include "exec/address-spaces.h" |
4a7ed999 | 48 | #include "sysemu/qtest.h" |
2e985fe0 | 49 | #include "qemu/error-report.h" |
051c190b HC |
50 | |
51 | #define DEBUG_FULONG2E_INIT | |
52 | ||
53 | #define ENVP_ADDR 0x80002000l | |
54 | #define ENVP_NB_ENTRIES 16 | |
55 | #define ENVP_ENTRY_SIZE 256 | |
56 | ||
57 | #define MAX_IDE_BUS 2 | |
58 | ||
59 | /* | |
60 | * PMON is not part of qemu and released with BSD license, anyone | |
61 | * who want to build a pmon binary please first git-clone the source | |
62 | * from the git repository at: | |
63 | * http://www.loongson.cn/support/git/pmon | |
64 | * Then follow the "Compile Guide" available at: | |
65 | * http://dev.lemote.com/code/pmon | |
66 | * | |
67 | * Notes: | |
68 | * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git | |
69 | * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware" | |
70 | * in the "Compile Guide". | |
71 | */ | |
72 | #define FULONG_BIOSNAME "pmon_fulong2e.bin" | |
73 | ||
74 | /* PCI SLOT in fulong 2e */ | |
75 | #define FULONG2E_VIA_SLOT 5 | |
76 | #define FULONG2E_ATI_SLOT 6 | |
77 | #define FULONG2E_RTL8139_SLOT 7 | |
78 | ||
64d7e9a4 | 79 | static ISADevice *pit; |
051c190b HC |
80 | |
81 | static struct _loaderparams { | |
82 | int ram_size; | |
83 | const char *kernel_filename; | |
84 | const char *kernel_cmdline; | |
85 | const char *initrd_filename; | |
86 | } loaderparams; | |
87 | ||
8b7968f7 SW |
88 | static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index, |
89 | const char *string, ...) | |
051c190b HC |
90 | { |
91 | va_list ap; | |
92 | int32_t table_addr; | |
93 | ||
94 | if (index >= ENVP_NB_ENTRIES) | |
95 | return; | |
96 | ||
97 | if (string == NULL) { | |
98 | prom_buf[index] = 0; | |
99 | return; | |
100 | } | |
101 | ||
102 | table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE; | |
103 | prom_buf[index] = tswap32(ENVP_ADDR + table_addr); | |
104 | ||
105 | va_start(ap, string); | |
106 | vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap); | |
107 | va_end(ap); | |
108 | } | |
109 | ||
61c56c8c | 110 | static int64_t load_kernel (CPUMIPSState *env) |
051c190b HC |
111 | { |
112 | int64_t kernel_entry, kernel_low, kernel_high; | |
113 | int index = 0; | |
114 | long initrd_size; | |
115 | ram_addr_t initrd_offset; | |
116 | uint32_t *prom_buf; | |
117 | long prom_size; | |
118 | ||
119 | if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL, | |
120 | (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low, | |
7ef295ea | 121 | (uint64_t *)&kernel_high, 0, EM_MIPS, 1, 0) < 0) { |
051c190b HC |
122 | fprintf(stderr, "qemu: could not load kernel '%s'\n", |
123 | loaderparams.kernel_filename); | |
124 | exit(1); | |
125 | } | |
126 | ||
127 | /* load initrd */ | |
128 | initrd_size = 0; | |
129 | initrd_offset = 0; | |
130 | if (loaderparams.initrd_filename) { | |
131 | initrd_size = get_image_size (loaderparams.initrd_filename); | |
132 | if (initrd_size > 0) { | |
05b3274b | 133 | initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK; |
051c190b HC |
134 | if (initrd_offset + initrd_size > ram_size) { |
135 | fprintf(stderr, | |
136 | "qemu: memory too small for initial ram disk '%s'\n", | |
137 | loaderparams.initrd_filename); | |
138 | exit(1); | |
139 | } | |
140 | initrd_size = load_image_targphys(loaderparams.initrd_filename, | |
141 | initrd_offset, ram_size - initrd_offset); | |
142 | } | |
143 | if (initrd_size == (target_ulong) -1) { | |
144 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", | |
145 | loaderparams.initrd_filename); | |
146 | exit(1); | |
147 | } | |
148 | } | |
149 | ||
150 | /* Setup prom parameters. */ | |
151 | prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE); | |
7267c094 | 152 | prom_buf = g_malloc(prom_size); |
051c190b | 153 | |
1ed1139d | 154 | prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename); |
051c190b | 155 | if (initrd_size > 0) { |
1ed1139d | 156 | prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s", |
051c190b HC |
157 | cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size, |
158 | loaderparams.kernel_cmdline); | |
159 | } else { | |
1ed1139d | 160 | prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline); |
051c190b HC |
161 | } |
162 | ||
163 | /* Setup minimum environment variables */ | |
164 | prom_set(prom_buf, index++, "busclock=33000000"); | |
165 | prom_set(prom_buf, index++, "cpuclock=100000000"); | |
166 | prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024); | |
167 | prom_set(prom_buf, index++, "modetty0=38400n8r"); | |
168 | prom_set(prom_buf, index++, NULL); | |
169 | ||
170 | rom_add_blob_fixed("prom", prom_buf, prom_size, | |
171 | cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR)); | |
172 | ||
3ad9fd5a | 173 | g_free(prom_buf); |
051c190b HC |
174 | return kernel_entry; |
175 | } | |
176 | ||
61c56c8c | 177 | static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr) |
051c190b HC |
178 | { |
179 | uint32_t *p; | |
180 | ||
181 | /* Small bootloader */ | |
182 | p = (uint32_t *) base; | |
183 | ||
0983979b PB |
184 | stl_p(p++, 0x0bf00010); /* j 0x1fc00040 */ |
185 | stl_p(p++, 0x00000000); /* nop */ | |
051c190b HC |
186 | |
187 | /* Second part of the bootloader */ | |
188 | p = (uint32_t *) (base + 0x040); | |
189 | ||
0983979b PB |
190 | stl_p(p++, 0x3c040000); /* lui a0, 0 */ |
191 | stl_p(p++, 0x34840002); /* ori a0, a0, 2 */ | |
192 | stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */ | |
193 | stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */ | |
194 | stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */ | |
195 | stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */ | |
196 | stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */ | |
197 | stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */ | |
198 | stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */; | |
199 | stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */ | |
200 | stl_p(p++, 0x03e00008); /* jr ra */ | |
201 | stl_p(p++, 0x00000000); /* nop */ | |
051c190b HC |
202 | } |
203 | ||
204 | ||
205 | static void main_cpu_reset(void *opaque) | |
206 | { | |
800cf598 AF |
207 | MIPSCPU *cpu = opaque; |
208 | CPUMIPSState *env = &cpu->env; | |
051c190b | 209 | |
800cf598 | 210 | cpu_reset(CPU(cpu)); |
051c190b HC |
211 | /* TODO: 2E reset stuff */ |
212 | if (loaderparams.kernel_filename) { | |
213 | env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); | |
214 | } | |
215 | } | |
216 | ||
f73cdbc6 | 217 | static const uint8_t eeprom_spd[0x80] = { |
051c190b HC |
218 | 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70, |
219 | 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01, | |
220 | 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50, | |
221 | 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00, | |
222 | 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00, | |
223 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
224 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
225 | 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00, | |
226 | 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32, | |
227 | 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42, | |
228 | 0x20,0x30,0x20 | |
229 | }; | |
230 | ||
231 | /* Audio support */ | |
051c190b HC |
232 | static void audio_init (PCIBus *pci_bus) |
233 | { | |
7899f799 IY |
234 | vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5)); |
235 | vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6)); | |
051c190b | 236 | } |
051c190b HC |
237 | |
238 | /* Network support */ | |
29b358f9 | 239 | static void network_init (PCIBus *pci_bus) |
051c190b HC |
240 | { |
241 | int i; | |
242 | ||
243 | for(i = 0; i < nb_nics; i++) { | |
244 | NICInfo *nd = &nd_table[i]; | |
245 | const char *default_devaddr = NULL; | |
246 | ||
247 | if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) { | |
248 | /* The fulong board has a RTL8139 card using PCI SLOT 7 */ | |
249 | default_devaddr = "07"; | |
250 | } | |
251 | ||
29b358f9 | 252 | pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr); |
051c190b HC |
253 | } |
254 | } | |
255 | ||
3ef96221 | 256 | static void mips_fulong2e_init(MachineState *machine) |
051c190b | 257 | { |
3ef96221 MA |
258 | ram_addr_t ram_size = machine->ram_size; |
259 | const char *cpu_model = machine->cpu_model; | |
260 | const char *kernel_filename = machine->kernel_filename; | |
261 | const char *kernel_cmdline = machine->kernel_cmdline; | |
262 | const char *initrd_filename = machine->initrd_filename; | |
051c190b | 263 | char *filename; |
13faf2a7 AK |
264 | MemoryRegion *address_space_mem = get_system_memory(); |
265 | MemoryRegion *ram = g_new(MemoryRegion, 1); | |
266 | MemoryRegion *bios = g_new(MemoryRegion, 1); | |
093209cd | 267 | long bios_size; |
051c190b HC |
268 | int64_t kernel_entry; |
269 | qemu_irq *i8259; | |
051c190b | 270 | PCIBus *pci_bus; |
48a18b3c | 271 | ISABus *isa_bus; |
a5c82852 | 272 | I2CBus *smbus; |
051c190b | 273 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
f0f80366 | 274 | MIPSCPU *cpu; |
61c56c8c | 275 | CPUMIPSState *env; |
051c190b HC |
276 | |
277 | /* init CPUs */ | |
278 | if (cpu_model == NULL) { | |
279 | cpu_model = "Loongson-2E"; | |
280 | } | |
f0f80366 AF |
281 | cpu = cpu_mips_init(cpu_model); |
282 | if (cpu == NULL) { | |
051c190b HC |
283 | fprintf(stderr, "Unable to find CPU definition\n"); |
284 | exit(1); | |
285 | } | |
f0f80366 | 286 | env = &cpu->env; |
051c190b | 287 | |
800cf598 | 288 | qemu_register_reset(main_cpu_reset, cpu); |
051c190b HC |
289 | |
290 | /* fulong 2e has 256M ram. */ | |
291 | ram_size = 256 * 1024 * 1024; | |
292 | ||
293 | /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */ | |
294 | bios_size = 1024 * 1024; | |
295 | ||
296 | /* allocate RAM */ | |
6a926fbc | 297 | memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size); |
49946538 | 298 | memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size, |
f8ed85ac | 299 | &error_fatal); |
c5705a77 | 300 | vmstate_register_ram_global(bios); |
13faf2a7 | 301 | memory_region_set_readonly(bios, true); |
051c190b | 302 | |
13faf2a7 AK |
303 | memory_region_add_subregion(address_space_mem, 0, ram); |
304 | memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); | |
051c190b HC |
305 | |
306 | /* We do not support flash operation, just loading pmon.bin as raw BIOS. | |
307 | * Please use -L to set the BIOS path and -bios to set bios name. */ | |
308 | ||
309 | if (kernel_filename) { | |
310 | loaderparams.ram_size = ram_size; | |
311 | loaderparams.kernel_filename = kernel_filename; | |
312 | loaderparams.kernel_cmdline = kernel_cmdline; | |
313 | loaderparams.initrd_filename = initrd_filename; | |
314 | kernel_entry = load_kernel (env); | |
13faf2a7 | 315 | write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); |
051c190b | 316 | } else { |
33dd2983 AJ |
317 | if (bios_name == NULL) { |
318 | bios_name = FULONG_BIOSNAME; | |
051c190b HC |
319 | } |
320 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); | |
321 | if (filename) { | |
322 | bios_size = load_image_targphys(filename, 0x1fc00000LL, | |
323 | BIOS_SIZE); | |
7267c094 | 324 | g_free(filename); |
051c190b HC |
325 | } else { |
326 | bios_size = -1; | |
327 | } | |
328 | ||
4a7ed999 AF |
329 | if ((bios_size < 0 || bios_size > BIOS_SIZE) && |
330 | !kernel_filename && !qtest_enabled()) { | |
2e985fe0 AJ |
331 | error_report("Could not load MIPS bios '%s'", bios_name); |
332 | exit(1); | |
33dd2983 | 333 | } |
051c190b HC |
334 | } |
335 | ||
336 | /* Init internal devices */ | |
5a975d43 PB |
337 | cpu_mips_irq_init_cpu(cpu); |
338 | cpu_mips_clock_init(cpu); | |
051c190b | 339 | |
051c190b HC |
340 | /* North bridge, Bonito --> IP2 */ |
341 | pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); | |
342 | ||
343 | /* South bridge */ | |
d8f94e1b | 344 | ide_drive_get(hd, ARRAY_SIZE(hd)); |
051c190b | 345 | |
c9940edb HP |
346 | isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0)); |
347 | if (!isa_bus) { | |
b2bedb21 | 348 | fprintf(stderr, "vt82c686b_init error\n"); |
051c190b HC |
349 | exit(1); |
350 | } | |
351 | ||
7e17a217 JK |
352 | /* Interrupt controller */ |
353 | /* The 8259 -> IP5 */ | |
48a18b3c HP |
354 | i8259 = i8259_init(isa_bus, env->irq[5]); |
355 | isa_bus_irqs(isa_bus, i8259); | |
7e17a217 | 356 | |
7899f799 | 357 | vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1)); |
afb9a60e GH |
358 | pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2), |
359 | "vt82c686b-usb-uhci"); | |
360 | pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3), | |
361 | "vt82c686b-usb-uhci"); | |
051c190b | 362 | |
7899f799 | 363 | smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4), |
051c190b | 364 | 0xeee1, NULL); |
051c190b | 365 | /* TODO: Populate SPD eeprom data. */ |
a88df0b9 | 366 | smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd)); |
051c190b HC |
367 | |
368 | /* init other devices */ | |
319ba9f5 | 369 | pit = pit_init(isa_bus, 0x40, 0, NULL); |
57146941 | 370 | DMA_init(isa_bus, 0); |
051c190b HC |
371 | |
372 | /* Super I/O */ | |
48a18b3c | 373 | isa_create_simple(isa_bus, "i8042"); |
051c190b | 374 | |
48a18b3c | 375 | rtc_init(isa_bus, 2000, NULL); |
051c190b | 376 | |
4496dc49 | 377 | serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS); |
07dc7880 | 378 | parallel_hds_isa_init(isa_bus, 1); |
051c190b HC |
379 | |
380 | /* Sound card */ | |
051c190b | 381 | audio_init(pci_bus); |
051c190b | 382 | /* Network card */ |
29b358f9 | 383 | network_init(pci_bus); |
051c190b HC |
384 | } |
385 | ||
e264d29d | 386 | static void mips_fulong2e_machine_init(MachineClass *mc) |
051c190b | 387 | { |
e264d29d EH |
388 | mc->desc = "Fulong 2e mini pc"; |
389 | mc->init = mips_fulong2e_init; | |
2059839b | 390 | mc->block_default_type = IF_IDE; |
051c190b HC |
391 | } |
392 | ||
e264d29d | 393 | DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init) |