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0325559d PC |
1 | /* |
2 | * KZM Board System emulation. | |
3 | * | |
4 | * Copyright (c) 2008 OKL and 2011 NICTA | |
5 | * Written by Hans at OK-Labs | |
6 | * Updated by Peter Chubb. | |
7 | * | |
aade7b91 | 8 | * This code is licensed under the GPL, version 2 or later. |
0325559d PC |
9 | * See the file `COPYING' in the top level directory. |
10 | * | |
11 | * It (partially) emulates a Kyoto Microcomputer | |
12 | * KZM-ARM11-01 evaluation board, with a Freescale | |
13 | * i.MX31 SoC | |
14 | */ | |
15 | ||
12b16722 | 16 | #include "qemu/osdep.h" |
da34e65c | 17 | #include "qapi/error.h" |
4771d756 PB |
18 | #include "qemu-common.h" |
19 | #include "cpu.h" | |
f044ac49 JCD |
20 | #include "hw/arm/fsl-imx31.h" |
21 | #include "hw/boards.h" | |
22 | #include "qemu/error-report.h" | |
022c62cb | 23 | #include "exec/address-spaces.h" |
1422e32d | 24 | #include "net/net.h" |
f044ac49 | 25 | #include "hw/devices.h" |
0d09e41a | 26 | #include "hw/char/serial.h" |
f044ac49 JCD |
27 | #include "sysemu/qtest.h" |
28 | ||
29 | /* Memory map for Kzm Emulation Baseboard: | |
30 | * 0x00000000-0x7fffffff See i.MX31 SOC for support | |
31 | * 0x80000000-0x8fffffff RAM EMULATED | |
32 | * 0x90000000-0x9fffffff RAM EMULATED | |
33 | * 0xa0000000-0xafffffff Flash IGNORED | |
34 | * 0xb0000000-0xb3ffffff Unavailable IGNORED | |
35 | * 0xb4000000-0xb4000fff 8-bit free space IGNORED | |
36 | * 0xb4001000-0xb400100f Board control IGNORED | |
37 | * 0xb4001003 DIP switch | |
38 | * 0xb4001010-0xb400101f 7-segment LED IGNORED | |
39 | * 0xb4001020-0xb400102f LED IGNORED | |
40 | * 0xb4001030-0xb400103f LED IGNORED | |
41 | * 0xb4001040-0xb400104f FPGA, UART EMULATED | |
42 | * 0xb4001050-0xb400105f FPGA, UART EMULATED | |
43 | * 0xb4001060-0xb40fffff FPGA IGNORED | |
44 | * 0xb6000000-0xb61fffff LAN controller EMULATED | |
45 | * 0xb6200000-0xb62fffff FPGA NAND Controller IGNORED | |
46 | * 0xb6300000-0xb7ffffff Free IGNORED | |
47 | * 0xb8000000-0xb8004fff Memory control registers IGNORED | |
48 | * 0xc0000000-0xc3ffffff PCMCIA/CF IGNORED | |
49 | * 0xc4000000-0xffffffff Reserved IGNORED | |
50 | */ | |
51 | ||
52 | typedef struct IMX31KZM { | |
53 | FslIMX31State soc; | |
54 | MemoryRegion ram; | |
55 | MemoryRegion ram_alias; | |
56 | } IMX31KZM; | |
57 | ||
58 | #define KZM_RAM_ADDR (FSL_IMX31_SDRAM0_ADDR) | |
59 | #define KZM_FPGA_ADDR (FSL_IMX31_CS4_ADDR + 0x1040) | |
60 | #define KZM_LAN9118_ADDR (FSL_IMX31_CS5_ADDR) | |
0325559d PC |
61 | |
62 | static struct arm_boot_info kzm_binfo = { | |
f044ac49 | 63 | .loader_start = KZM_RAM_ADDR, |
0325559d PC |
64 | .board_id = 1722, |
65 | }; | |
66 | ||
3ef96221 | 67 | static void kzm_init(MachineState *machine) |
0325559d | 68 | { |
f044ac49 | 69 | IMX31KZM *s = g_new0(IMX31KZM, 1); |
f044ac49 JCD |
70 | unsigned int ram_size; |
71 | unsigned int alias_offset; | |
72 | unsigned int i; | |
73 | ||
74 | object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX31); | |
75 | object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), | |
76 | &error_abort); | |
77 | ||
07d04a02 | 78 | object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); |
0325559d | 79 | |
f044ac49 JCD |
80 | /* Check the amount of memory is compatible with the SOC */ |
81 | if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) { | |
3dc6f869 AF |
82 | warn_report("RAM size " RAM_ADDR_FMT " above max supported, " |
83 | "reduced to %x", machine->ram_size, | |
84 | FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE); | |
f044ac49 JCD |
85 | machine->ram_size = FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE; |
86 | } | |
0325559d | 87 | |
f044ac49 JCD |
88 | memory_region_allocate_system_memory(&s->ram, NULL, "kzm.ram", |
89 | machine->ram_size); | |
90 | memory_region_add_subregion(get_system_memory(), FSL_IMX31_SDRAM0_ADDR, | |
91 | &s->ram); | |
92 | ||
93 | /* initialize the alias memory if any */ | |
94 | for (i = 0, ram_size = machine->ram_size, alias_offset = 0; | |
95 | (i < 2) && ram_size; i++) { | |
96 | unsigned int size; | |
97 | static const struct { | |
98 | hwaddr addr; | |
99 | unsigned int size; | |
100 | } ram[2] = { | |
101 | { FSL_IMX31_SDRAM0_ADDR, FSL_IMX31_SDRAM0_SIZE }, | |
102 | { FSL_IMX31_SDRAM1_ADDR, FSL_IMX31_SDRAM1_SIZE }, | |
103 | }; | |
104 | ||
105 | size = MIN(ram_size, ram[i].size); | |
106 | ||
107 | ram_size -= size; | |
108 | ||
109 | if (size < ram[i].size) { | |
110 | memory_region_init_alias(&s->ram_alias, NULL, "ram.alias", | |
111 | &s->ram, alias_offset, ram[i].size - size); | |
112 | memory_region_add_subregion(get_system_memory(), | |
113 | ram[i].addr + size, &s->ram_alias); | |
114 | } | |
115 | ||
116 | alias_offset += ram[i].size; | |
117 | } | |
0325559d | 118 | |
a005d073 | 119 | if (nd_table[0].used) { |
f044ac49 JCD |
120 | lan9118_init(&nd_table[0], KZM_LAN9118_ADDR, |
121 | qdev_get_gpio_in(DEVICE(&s->soc.avic), 52)); | |
0325559d PC |
122 | } |
123 | ||
124 | if (serial_hds[2]) { /* touchscreen */ | |
f044ac49 JCD |
125 | serial_mm_init(get_system_memory(), KZM_FPGA_ADDR+0x10, 0, |
126 | qdev_get_gpio_in(DEVICE(&s->soc.avic), 52), | |
127 | 14745600, serial_hds[2], DEVICE_NATIVE_ENDIAN); | |
0325559d PC |
128 | } |
129 | ||
f044ac49 JCD |
130 | kzm_binfo.ram_size = machine->ram_size; |
131 | kzm_binfo.kernel_filename = machine->kernel_filename; | |
132 | kzm_binfo.kernel_cmdline = machine->kernel_cmdline; | |
133 | kzm_binfo.initrd_filename = machine->initrd_filename; | |
0325559d | 134 | kzm_binfo.nb_cpus = 1; |
f044ac49 JCD |
135 | |
136 | if (!qtest_enabled()) { | |
137 | arm_load_kernel(&s->soc.cpu, &kzm_binfo); | |
138 | } | |
0325559d PC |
139 | } |
140 | ||
e264d29d | 141 | static void kzm_machine_init(MachineClass *mc) |
0325559d | 142 | { |
e264d29d EH |
143 | mc->desc = "ARM KZM Emulation Baseboard (ARM1136)"; |
144 | mc->init = kzm_init; | |
4672cbd7 | 145 | mc->ignore_memory_transaction_failures = true; |
0325559d PC |
146 | } |
147 | ||
e264d29d | 148 | DEFINE_MACHINE("kzm", kzm_machine_init) |