[qemu.git] / hw / display / milkymist-vgafb.c


/*
 *  QEMU model of the Milkymist VGA framebuffer.
 *
 *  Copyright (c) 2010-2012 Michael Walle <[email protected]>
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 *
 *
 * Specification available at:
 *   http://milkymist.walle.cc/socdoc/vgafb.pdf
 */

#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "trace.h"
#include "ui/console.h"
#include "framebuffer.h"
#include "ui/pixel_ops.h"
#include "qemu/error-report.h"

#define BITS 8
#include "milkymist-vgafb_template.h"
#define BITS 15
#include "milkymist-vgafb_template.h"
#define BITS 16
#include "milkymist-vgafb_template.h"
#define BITS 24
#include "milkymist-vgafb_template.h"
#define BITS 32
#include "milkymist-vgafb_template.h"

enum {
    R_CTRL = 0,
    R_HRES,
    R_HSYNC_START,
    R_HSYNC_END,
    R_HSCAN,
    R_VRES,
    R_VSYNC_START,
    R_VSYNC_END,
    R_VSCAN,
    R_BASEADDRESS,
    R_BASEADDRESS_ACT,
    R_BURST_COUNT,
    R_DDC,
    R_SOURCE_CLOCK,
    R_MAX
};

enum {
    CTRL_RESET = (1<<0),
};

#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
#define MILKYMIST_VGAFB(obj) \
    OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)

struct MilkymistVgafbState {
    SysBusDevice parent_obj;

    MemoryRegion regs_region;
    MemoryRegionSection fbsection;
    QemuConsole *con;

    int invalidate;
    uint32_t fb_offset;
    uint32_t fb_mask;

    uint32_t regs[R_MAX];
};
typedef struct MilkymistVgafbState MilkymistVgafbState;

static int vgafb_enabled(MilkymistVgafbState *s)
{
    return !(s->regs[R_CTRL] & CTRL_RESET);
}

static void vgafb_update_display(void *opaque)
{
    MilkymistVgafbState *s = opaque;
    SysBusDevice *sbd;
    DisplaySurface *surface = qemu_console_surface(s->con);
    int src_width;
    int first = 0;
    int last = 0;
    drawfn fn;

    if (!vgafb_enabled(s)) {
        return;
    }

    sbd = SYS_BUS_DEVICE(s);
    int dest_width = s->regs[R_HRES];

    switch (surface_bits_per_pixel(surface)) {
    case 0:
        return;
    case 8:
        fn = draw_line_8;
        break;
    case 15:
        fn = draw_line_15;
        dest_width *= 2;
        break;
    case 16:
        fn = draw_line_16;
        dest_width *= 2;
        break;
    case 24:
        fn = draw_line_24;
        dest_width *= 3;
        break;
    case 32:
        fn = draw_line_32;
        dest_width *= 4;
        break;
    default:
        hw_error("milkymist_vgafb: bad color depth\n");
        break;
    }

    src_width = s->regs[R_HRES] * 2;
    if (s->invalidate) {
        framebuffer_update_memory_section(&s->fbsection,
                                          sysbus_address_space(sbd),
                                          s->regs[R_BASEADDRESS] + s->fb_offset,
                                          s->regs[R_VRES], src_width);
    }

    framebuffer_update_display(surface, &s->fbsection,
                               s->regs[R_HRES],
                               s->regs[R_VRES],
                               src_width,
                               dest_width,
                               0,
                               s->invalidate,
                               fn,
                               NULL,
                               &first, &last);

    if (first >= 0) {
        dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
    }
    s->invalidate = 0;
}

static void vgafb_invalidate_display(void *opaque)
{
    MilkymistVgafbState *s = opaque;
    s->invalidate = 1;
}

static void vgafb_resize(MilkymistVgafbState *s)
{
    if (!vgafb_enabled(s)) {
        return;
    }

    qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
    s->invalidate = 1;
}

static uint64_t vgafb_read(void *opaque, hwaddr addr,
                           unsigned size)
{
    MilkymistVgafbState *s = opaque;
    uint32_t r = 0;

    addr >>= 2;
    switch (addr) {
    case R_CTRL:
    case R_HRES:
    case R_HSYNC_START:
    case R_HSYNC_END:
    case R_HSCAN:
    case R_VRES:
    case R_VSYNC_START:
    case R_VSYNC_END:
    case R_VSCAN:
    case R_BASEADDRESS:
    case R_BURST_COUNT:
    case R_DDC:
    case R_SOURCE_CLOCK:
        r = s->regs[addr];
    break;
    case R_BASEADDRESS_ACT:
        r = s->regs[R_BASEADDRESS];
    break;

    default:
        error_report("milkymist_vgafb: read access to unknown register 0x"
                TARGET_FMT_plx, addr << 2);
        break;
    }

    trace_milkymist_vgafb_memory_read(addr << 2, r);

    return r;
}

static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
                        unsigned size)
{
    MilkymistVgafbState *s = opaque;

    trace_milkymist_vgafb_memory_write(addr, value);

    addr >>= 2;
    switch (addr) {
    case R_CTRL:
        s->regs[addr] = value;
        vgafb_resize(s);
        break;
    case R_HSYNC_START:
    case R_HSYNC_END:
    case R_HSCAN:
    case R_VSYNC_START:
    case R_VSYNC_END:
    case R_VSCAN:
    case R_BURST_COUNT:
    case R_DDC:
    case R_SOURCE_CLOCK:
        s->regs[addr] = value;
        break;
    case R_BASEADDRESS:
        if (value & 0x1f) {
            error_report("milkymist_vgafb: framebuffer base address have to "
                     "be 32 byte aligned");
            break;
        }
        s->regs[addr] = value & s->fb_mask;
        s->invalidate = 1;
        break;
    case R_HRES:
    case R_VRES:
        s->regs[addr] = value;
        vgafb_resize(s);
        break;
    case R_BASEADDRESS_ACT:
        error_report("milkymist_vgafb: write to read-only register 0x"
                TARGET_FMT_plx, addr << 2);
        break;

    default:
        error_report("milkymist_vgafb: write access to unknown register 0x"
                TARGET_FMT_plx, addr << 2);
        break;
    }
}

static const MemoryRegionOps vgafb_mmio_ops = {
    .read = vgafb_read,
    .write = vgafb_write,
    .valid = {
        .min_access_size = 4,
        .max_access_size = 4,
    },
    .endianness = DEVICE_NATIVE_ENDIAN,
};

static void milkymist_vgafb_reset(DeviceState *d)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
    int i;

    for (i = 0; i < R_MAX; i++) {
        s->regs[i] = 0;
    }

    /* defaults */
    s->regs[R_CTRL] = CTRL_RESET;
    s->regs[R_HRES] = 640;
    s->regs[R_VRES] = 480;
    s->regs[R_BASEADDRESS] = 0;
}

static const GraphicHwOps vgafb_ops = {
    .invalidate  = vgafb_invalidate_display,
    .gfx_update  = vgafb_update_display,
};

static void milkymist_vgafb_init(Object *obj)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(obj);
    SysBusDevice *dev = SYS_BUS_DEVICE(obj);

    memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
            "milkymist-vgafb", R_MAX * 4);
    sysbus_init_mmio(dev, &s->regs_region);
}

static void milkymist_vgafb_realize(DeviceState *dev, Error **errp)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);

    s->con = graphic_console_init(dev, 0, &vgafb_ops, s);
}

static int vgafb_post_load(void *opaque, int version_id)
{
    vgafb_invalidate_display(opaque);
    return 0;
}

static const VMStateDescription vmstate_milkymist_vgafb = {
    .name = "milkymist-vgafb",
    .version_id = 1,
    .minimum_version_id = 1,
    .post_load = vgafb_post_load,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
        VMSTATE_END_OF_LIST()
    }
};

static Property milkymist_vgafb_properties[] = {
    DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
    DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
    DEFINE_PROP_END_OF_LIST(),
};

static void milkymist_vgafb_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);

    dc->reset = milkymist_vgafb_reset;
    dc->vmsd = &vmstate_milkymist_vgafb;
    dc->props = milkymist_vgafb_properties;
    dc->realize = milkymist_vgafb_realize;
}

static const TypeInfo milkymist_vgafb_info = {
    .name          = TYPE_MILKYMIST_VGAFB,
    .parent        = TYPE_SYS_BUS_DEVICE,
    .instance_size = sizeof(MilkymistVgafbState),
    .instance_init = milkymist_vgafb_init,
    .class_init    = milkymist_vgafb_class_init,
};

static void milkymist_vgafb_register_types(void)
{
    type_register_static(&milkymist_vgafb_info);
}

type_init(milkymist_vgafb_register_types)
Commit	Line	Data
d23948b1 MW	1
	2	/*
	3	* QEMU model of the Milkymist VGA framebuffer.
	4	*
a3b6181e	5	* Copyright (c) 2010-2012 Michael Walle <[email protected]>
d23948b1 MW	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*
	20	*
	21	* Specification available at:
6dbbe243	22	* http://milkymist.walle.cc/socdoc/vgafb.pdf
d23948b1 MW	23	*/
d23948b1 MW	24
ea99dde1	25	#include "qemu/osdep.h"
83c9f4ca PB	26	#include "hw/hw.h"
83c9f4ca PB	27	#include "hw/sysbus.h"
d23948b1	28	#include "trace.h"
28ecbaee	29	#include "ui/console.h"
47b43a1f	30	#include "framebuffer.h"
28ecbaee	31	#include "ui/pixel_ops.h"
1de7afc9	32	#include "qemu/error-report.h"
d23948b1 MW	33
d23948b1 MW	34	#define BITS 8
47b43a1f	35	#include "milkymist-vgafb_template.h"
d23948b1	36	#define BITS 15
47b43a1f	37	#include "milkymist-vgafb_template.h"
d23948b1	38	#define BITS 16
47b43a1f	39	#include "milkymist-vgafb_template.h"
d23948b1	40	#define BITS 24
47b43a1f	41	#include "milkymist-vgafb_template.h"
d23948b1	42	#define BITS 32
47b43a1f	43	#include "milkymist-vgafb_template.h"
d23948b1 MW	44
	45	enum {
	46	R_CTRL = 0,
	47	R_HRES,
	48	R_HSYNC_START,
	49	R_HSYNC_END,
	50	R_HSCAN,
	51	R_VRES,
	52	R_VSYNC_START,
	53	R_VSYNC_END,
	54	R_VSCAN,
	55	R_BASEADDRESS,
	56	R_BASEADDRESS_ACT,
	57	R_BURST_COUNT,
a3b6181e	58	R_DDC,
d23948b1 MW	59	R_SOURCE_CLOCK,
	60	R_MAX
	61	};
	62
	63	enum {
	64	CTRL_RESET = (1<<0),
	65	};
	66
54df97bb AF	67	#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
	68	#define MILKYMIST_VGAFB(obj) \
	69	OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)
	70
d23948b1	71	struct MilkymistVgafbState {
54df97bb AF	72	SysBusDevice parent_obj;
54df97bb AF	73
883abf8d	74	MemoryRegion regs_region;
c1076c3e	75	MemoryRegionSection fbsection;
c78f7137	76	QemuConsole *con;
d23948b1 MW	77
	78	int invalidate;
	79	uint32_t fb_offset;
	80	uint32_t fb_mask;
	81
	82	uint32_t regs[R_MAX];
	83	};
	84	typedef struct MilkymistVgafbState MilkymistVgafbState;
	85
	86	static int vgafb_enabled(MilkymistVgafbState *s)
	87	{
	88	return !(s->regs[R_CTRL] & CTRL_RESET);
	89	}
	90
	91	static void vgafb_update_display(void *opaque)
	92	{
	93	MilkymistVgafbState *s = opaque;
54df97bb	94	SysBusDevice *sbd;
c78f7137	95	DisplaySurface *surface = qemu_console_surface(s->con);
c1076c3e	96	int src_width;
d23948b1 MW	97	int first = 0;
	98	int last = 0;
	99	drawfn fn;
	100
	101	if (!vgafb_enabled(s)) {
	102	return;
	103	}
	104
54df97bb	105	sbd = SYS_BUS_DEVICE(s);
d23948b1 MW	106	int dest_width = s->regs[R_HRES];
d23948b1 MW	107
c78f7137	108	switch (surface_bits_per_pixel(surface)) {
d23948b1 MW	109	case 0:
	110	return;
	111	case 8:
	112	fn = draw_line_8;
	113	break;
	114	case 15:
	115	fn = draw_line_15;
	116	dest_width *= 2;
	117	break;
	118	case 16:
	119	fn = draw_line_16;
	120	dest_width *= 2;
	121	break;
	122	case 24:
	123	fn = draw_line_24;
	124	dest_width *= 3;
	125	break;
	126	case 32:
	127	fn = draw_line_32;
	128	dest_width *= 4;
	129	break;
	130	default:
	131	hw_error("milkymist_vgafb: bad color depth\n");
	132	break;
	133	}
	134
c1076c3e PB	135	src_width = s->regs[R_HRES] * 2;
	136	if (s->invalidate) {
	137	framebuffer_update_memory_section(&s->fbsection,
	138	sysbus_address_space(sbd),
	139	s->regs[R_BASEADDRESS] + s->fb_offset,
	140	s->regs[R_VRES], src_width);
	141	}
	142
	143	framebuffer_update_display(surface, &s->fbsection,
d23948b1 MW	144	s->regs[R_HRES],
d23948b1 MW	145	s->regs[R_VRES],
c1076c3e	146	src_width,
d23948b1 MW	147	dest_width,
	148	0,
	149	s->invalidate,
	150	fn,
	151	NULL,
	152	&first, &last);
	153
	154	if (first >= 0) {
c78f7137	155	dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
d23948b1 MW	156	}
	157	s->invalidate = 0;
	158	}
	159
	160	static void vgafb_invalidate_display(void *opaque)
	161	{
	162	MilkymistVgafbState *s = opaque;
	163	s->invalidate = 1;
	164	}
	165
	166	static void vgafb_resize(MilkymistVgafbState *s)
	167	{
	168	if (!vgafb_enabled(s)) {
	169	return;
	170	}
	171
c78f7137	172	qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
d23948b1 MW	173	s->invalidate = 1;
	174	}
	175
a8170e5e	176	static uint64_t vgafb_read(void *opaque, hwaddr addr,
883abf8d	177	unsigned size)
d23948b1 MW	178	{
	179	MilkymistVgafbState *s = opaque;
	180	uint32_t r = 0;
	181
	182	addr >>= 2;
	183	switch (addr) {
	184	case R_CTRL:
	185	case R_HRES:
	186	case R_HSYNC_START:
	187	case R_HSYNC_END:
	188	case R_HSCAN:
	189	case R_VRES:
	190	case R_VSYNC_START:
	191	case R_VSYNC_END:
	192	case R_VSCAN:
	193	case R_BASEADDRESS:
	194	case R_BURST_COUNT:
a3b6181e	195	case R_DDC:
d23948b1 MW	196	case R_SOURCE_CLOCK:
	197	r = s->regs[addr];
	198	break;
	199	case R_BASEADDRESS_ACT:
	200	r = s->regs[R_BASEADDRESS];
	201	break;
	202
	203	default:
	204	error_report("milkymist_vgafb: read access to unknown register 0x"
	205	TARGET_FMT_plx, addr << 2);
	206	break;
	207	}
	208
	209	trace_milkymist_vgafb_memory_read(addr << 2, r);
	210
	211	return r;
	212	}
	213
a8170e5e	214	static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
883abf8d	215	unsigned size)
d23948b1 MW	216	{
	217	MilkymistVgafbState *s = opaque;
	218
	219	trace_milkymist_vgafb_memory_write(addr, value);
	220
	221	addr >>= 2;
	222	switch (addr) {
	223	case R_CTRL:
c07050dd MW	224	s->regs[addr] = value;
	225	vgafb_resize(s);
	226	break;
d23948b1 MW	227	case R_HSYNC_START:
	228	case R_HSYNC_END:
	229	case R_HSCAN:
	230	case R_VSYNC_START:
	231	case R_VSYNC_END:
	232	case R_VSCAN:
	233	case R_BURST_COUNT:
a3b6181e	234	case R_DDC:
d23948b1 MW	235	case R_SOURCE_CLOCK:
	236	s->regs[addr] = value;
	237	break;
	238	case R_BASEADDRESS:
	239	if (value & 0x1f) {
	240	error_report("milkymist_vgafb: framebuffer base address have to "
	241	"be 32 byte aligned");
	242	break;
	243	}
	244	s->regs[addr] = value & s->fb_mask;
	245	s->invalidate = 1;
	246	break;
	247	case R_HRES:
	248	case R_VRES:
	249	s->regs[addr] = value;
	250	vgafb_resize(s);
	251	break;
	252	case R_BASEADDRESS_ACT:
	253	error_report("milkymist_vgafb: write to read-only register 0x"
	254	TARGET_FMT_plx, addr << 2);
	255	break;
	256
	257	default:
	258	error_report("milkymist_vgafb: write access to unknown register 0x"
	259	TARGET_FMT_plx, addr << 2);
	260	break;
	261	}
	262	}
	263
883abf8d MW	264	static const MemoryRegionOps vgafb_mmio_ops = {
	265	.read = vgafb_read,
	266	.write = vgafb_write,
	267	.valid = {
	268	.min_access_size = 4,
	269	.max_access_size = 4,
	270	},
	271	.endianness = DEVICE_NATIVE_ENDIAN,
d23948b1 MW	272	};
	273
	274	static void milkymist_vgafb_reset(DeviceState *d)
	275	{
54df97bb	276	MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
d23948b1 MW	277	int i;
	278
	279	for (i = 0; i < R_MAX; i++) {
	280	s->regs[i] = 0;
	281	}
	282
	283	/* defaults */
	284	s->regs[R_CTRL] = CTRL_RESET;
	285	s->regs[R_HRES] = 640;
	286	s->regs[R_VRES] = 480;
	287	s->regs[R_BASEADDRESS] = 0;
	288	}
	289
380cd056 GH	290	static const GraphicHwOps vgafb_ops = {
	291	.invalidate = vgafb_invalidate_display,
	292	.gfx_update = vgafb_update_display,
	293	};
	294
165b244b	295	static void milkymist_vgafb_init(Object *obj)
d23948b1	296	{
165b244b XZ	297	MilkymistVgafbState *s = MILKYMIST_VGAFB(obj);
165b244b XZ	298	SysBusDevice *dev = SYS_BUS_DEVICE(obj);
d23948b1	299
3eadad55	300	memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
883abf8d	301	"milkymist-vgafb", R_MAX * 4);
750ecd44	302	sysbus_init_mmio(dev, &s->regs_region);
165b244b	303	}
d23948b1	304
165b244b XZ	305	static void milkymist_vgafb_realize(DeviceState dev, Error *errp)
	306	{
	307	MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);
d23948b1	308
165b244b	309	s->con = graphic_console_init(dev, 0, &vgafb_ops, s);
d23948b1 MW	310	}
	311
	312	static int vgafb_post_load(void *opaque, int version_id)
	313	{
	314	vgafb_invalidate_display(opaque);
	315	return 0;
	316	}
	317
	318	static const VMStateDescription vmstate_milkymist_vgafb = {
	319	.name = "milkymist-vgafb",
	320	.version_id = 1,
	321	.minimum_version_id = 1,
d23948b1	322	.post_load = vgafb_post_load,
35d08458	323	.fields = (VMStateField[]) {
d23948b1 MW	324	VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
	325	VMSTATE_END_OF_LIST()
	326	}
	327	};
	328
999e12bb AL	329	static Property milkymist_vgafb_properties[] = {
	330	DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
	331	DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
	332	DEFINE_PROP_END_OF_LIST(),
	333	};
	334
	335	static void milkymist_vgafb_class_init(ObjectClass klass, void data)
	336	{
39bffca2	337	DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb	338
39bffca2 AL	339	dc->reset = milkymist_vgafb_reset;
	340	dc->vmsd = &vmstate_milkymist_vgafb;
	341	dc->props = milkymist_vgafb_properties;
165b244b	342	dc->realize = milkymist_vgafb_realize;
999e12bb AL	343	}
999e12bb AL	344
8c43a6f0	345	static const TypeInfo milkymist_vgafb_info = {
54df97bb	346	.name = TYPE_MILKYMIST_VGAFB,
39bffca2 AL	347	.parent = TYPE_SYS_BUS_DEVICE,
39bffca2 AL	348	.instance_size = sizeof(MilkymistVgafbState),
165b244b	349	.instance_init = milkymist_vgafb_init,
39bffca2	350	.class_init = milkymist_vgafb_class_init,
d23948b1 MW	351	};
d23948b1 MW	352
83f7d43a	353	static void milkymist_vgafb_register_types(void)
d23948b1	354	{
39bffca2	355	type_register_static(&milkymist_vgafb_info);
d23948b1 MW	356	}
d23948b1 MW	357
83f7d43a	358	type_init(milkymist_vgafb_register_types)