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b92e5a22 FB |
1 | /* |
2 | * Software MMU support | |
5fafdf24 | 3 | * |
efbf29b6 BS |
4 | * Generate inline load/store functions for one MMU mode and data |
5 | * size. | |
6 | * | |
7 | * Generate a store function as well as signed and unsigned loads. For | |
8 | * 32 and 64 bit cases, also generate floating point functions with | |
9 | * the same size. | |
10 | * | |
11 | * Not used directly but included from softmmu_exec.h and exec-all.h. | |
12 | * | |
b92e5a22 FB |
13 | * Copyright (c) 2003 Fabrice Bellard |
14 | * | |
15 | * This library is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU Lesser General Public | |
17 | * License as published by the Free Software Foundation; either | |
18 | * version 2 of the License, or (at your option) any later version. | |
19 | * | |
20 | * This library is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
23 | * Lesser General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 26 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
b92e5a22 FB |
27 | */ |
28 | #if DATA_SIZE == 8 | |
29 | #define SUFFIX q | |
61382a50 | 30 | #define USUFFIX q |
b92e5a22 FB |
31 | #define DATA_TYPE uint64_t |
32 | #elif DATA_SIZE == 4 | |
33 | #define SUFFIX l | |
61382a50 | 34 | #define USUFFIX l |
b92e5a22 FB |
35 | #define DATA_TYPE uint32_t |
36 | #elif DATA_SIZE == 2 | |
37 | #define SUFFIX w | |
61382a50 | 38 | #define USUFFIX uw |
b92e5a22 FB |
39 | #define DATA_TYPE uint16_t |
40 | #define DATA_STYPE int16_t | |
41 | #elif DATA_SIZE == 1 | |
42 | #define SUFFIX b | |
61382a50 | 43 | #define USUFFIX ub |
b92e5a22 FB |
44 | #define DATA_TYPE uint8_t |
45 | #define DATA_STYPE int8_t | |
46 | #else | |
47 | #error unsupported data size | |
48 | #endif | |
49 | ||
6ebbf390 | 50 | #if ACCESS_TYPE < (NB_MMU_MODES) |
61382a50 | 51 | |
6ebbf390 | 52 | #define CPU_MMU_INDEX ACCESS_TYPE |
61382a50 FB |
53 | #define MMUSUFFIX _mmu |
54 | ||
6ebbf390 | 55 | #elif ACCESS_TYPE == (NB_MMU_MODES) |
61382a50 | 56 | |
6ebbf390 | 57 | #define CPU_MMU_INDEX (cpu_mmu_index(env)) |
61382a50 FB |
58 | #define MMUSUFFIX _mmu |
59 | ||
6ebbf390 | 60 | #elif ACCESS_TYPE == (NB_MMU_MODES + 1) |
61382a50 | 61 | |
6ebbf390 | 62 | #define CPU_MMU_INDEX (cpu_mmu_index(env)) |
61382a50 FB |
63 | #define MMUSUFFIX _cmmu |
64 | ||
b92e5a22 | 65 | #else |
61382a50 | 66 | #error invalid ACCESS_TYPE |
b92e5a22 FB |
67 | #endif |
68 | ||
69 | #if DATA_SIZE == 8 | |
70 | #define RES_TYPE uint64_t | |
71 | #else | |
c086b783 | 72 | #define RES_TYPE uint32_t |
b92e5a22 FB |
73 | #endif |
74 | ||
6ebbf390 | 75 | #if ACCESS_TYPE == (NB_MMU_MODES + 1) |
84b7b8e7 FB |
76 | #define ADDR_READ addr_code |
77 | #else | |
78 | #define ADDR_READ addr_read | |
79 | #endif | |
b92e5a22 | 80 | |
e141ab52 BS |
81 | #ifndef CONFIG_TCG_PASS_AREG0 |
82 | #define ENV_PARAM | |
83 | #define ENV_VAR | |
84 | #define CPU_PREFIX | |
85 | #define HELPER_PREFIX __ | |
86 | #else | |
87 | #define ENV_PARAM CPUArchState *env, | |
88 | #define ENV_VAR env, | |
89 | #define CPU_PREFIX cpu_ | |
90 | #define HELPER_PREFIX helper_ | |
91 | #endif | |
92 | ||
e16c53fa FB |
93 | /* generic load/store macros */ |
94 | ||
e141ab52 BS |
95 | static inline RES_TYPE |
96 | glue(glue(glue(CPU_PREFIX, ld), USUFFIX), MEMSUFFIX)(ENV_PARAM | |
97 | target_ulong ptr) | |
b92e5a22 | 98 | { |
4d7a0880 | 99 | int page_index; |
b92e5a22 | 100 | RES_TYPE res; |
c27004ec FB |
101 | target_ulong addr; |
102 | unsigned long physaddr; | |
6ebbf390 | 103 | int mmu_idx; |
61382a50 | 104 | |
c27004ec | 105 | addr = ptr; |
4d7a0880 | 106 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
6ebbf390 | 107 | mmu_idx = CPU_MMU_INDEX; |
551bd27f TS |
108 | if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != |
109 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { | |
e141ab52 BS |
110 | res = glue(glue(glue(HELPER_PREFIX, ld), SUFFIX), MMUSUFFIX)(ENV_VAR |
111 | addr, | |
112 | mmu_idx); | |
b92e5a22 | 113 | } else { |
4d7a0880 | 114 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; |
61382a50 | 115 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); |
b92e5a22 FB |
116 | } |
117 | return res; | |
118 | } | |
119 | ||
120 | #if DATA_SIZE <= 2 | |
e141ab52 BS |
121 | static inline int |
122 | glue(glue(glue(CPU_PREFIX, lds), SUFFIX), MEMSUFFIX)(ENV_PARAM | |
123 | target_ulong ptr) | |
b92e5a22 | 124 | { |
4d7a0880 | 125 | int res, page_index; |
c27004ec FB |
126 | target_ulong addr; |
127 | unsigned long physaddr; | |
6ebbf390 | 128 | int mmu_idx; |
61382a50 | 129 | |
c27004ec | 130 | addr = ptr; |
4d7a0880 | 131 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
6ebbf390 | 132 | mmu_idx = CPU_MMU_INDEX; |
551bd27f TS |
133 | if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != |
134 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { | |
e141ab52 BS |
135 | res = (DATA_STYPE)glue(glue(glue(HELPER_PREFIX, ld), SUFFIX), |
136 | MMUSUFFIX)(ENV_VAR addr, mmu_idx); | |
b92e5a22 | 137 | } else { |
4d7a0880 | 138 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; |
b92e5a22 FB |
139 | res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr); |
140 | } | |
141 | return res; | |
142 | } | |
143 | #endif | |
144 | ||
6ebbf390 | 145 | #if ACCESS_TYPE != (NB_MMU_MODES + 1) |
84b7b8e7 | 146 | |
e16c53fa FB |
147 | /* generic store macro */ |
148 | ||
e141ab52 BS |
149 | static inline void |
150 | glue(glue(glue(CPU_PREFIX, st), SUFFIX), MEMSUFFIX)(ENV_PARAM target_ulong ptr, | |
151 | RES_TYPE v) | |
b92e5a22 | 152 | { |
4d7a0880 | 153 | int page_index; |
c27004ec FB |
154 | target_ulong addr; |
155 | unsigned long physaddr; | |
6ebbf390 | 156 | int mmu_idx; |
61382a50 | 157 | |
c27004ec | 158 | addr = ptr; |
4d7a0880 | 159 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
6ebbf390 | 160 | mmu_idx = CPU_MMU_INDEX; |
551bd27f TS |
161 | if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write != |
162 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { | |
e141ab52 BS |
163 | glue(glue(glue(HELPER_PREFIX, st), SUFFIX), MMUSUFFIX)(ENV_VAR addr, v, |
164 | mmu_idx); | |
b92e5a22 | 165 | } else { |
4d7a0880 | 166 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; |
b92e5a22 FB |
167 | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v); |
168 | } | |
169 | } | |
170 | ||
6ebbf390 | 171 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ |
84b7b8e7 | 172 | |
6ebbf390 | 173 | #if ACCESS_TYPE != (NB_MMU_MODES + 1) |
e16c53fa | 174 | |
2d603d22 | 175 | #if DATA_SIZE == 8 |
e141ab52 BS |
176 | static inline float64 glue(glue(CPU_PREFIX, ldfq), MEMSUFFIX)(ENV_PARAM |
177 | target_ulong ptr) | |
2d603d22 FB |
178 | { |
179 | union { | |
3f87bf69 | 180 | float64 d; |
2d603d22 FB |
181 | uint64_t i; |
182 | } u; | |
e141ab52 | 183 | u.i = glue(glue(CPU_PREFIX, ldq), MEMSUFFIX)(ENV_VAR ptr); |
2d603d22 FB |
184 | return u.d; |
185 | } | |
186 | ||
e141ab52 BS |
187 | static inline void glue(glue(CPU_PREFIX, stfq), MEMSUFFIX)(ENV_PARAM |
188 | target_ulong ptr, | |
189 | float64 v) | |
2d603d22 FB |
190 | { |
191 | union { | |
3f87bf69 | 192 | float64 d; |
2d603d22 FB |
193 | uint64_t i; |
194 | } u; | |
195 | u.d = v; | |
e141ab52 | 196 | glue(glue(CPU_PREFIX, stq), MEMSUFFIX)(ENV_VAR ptr, u.i); |
2d603d22 FB |
197 | } |
198 | #endif /* DATA_SIZE == 8 */ | |
199 | ||
200 | #if DATA_SIZE == 4 | |
e141ab52 BS |
201 | static inline float32 glue(glue(CPU_PREFIX, ldfl), MEMSUFFIX)(ENV_PARAM |
202 | target_ulong ptr) | |
2d603d22 FB |
203 | { |
204 | union { | |
3f87bf69 | 205 | float32 f; |
2d603d22 FB |
206 | uint32_t i; |
207 | } u; | |
e141ab52 | 208 | u.i = glue(glue(CPU_PREFIX, ldl), MEMSUFFIX)(ENV_VAR ptr); |
2d603d22 FB |
209 | return u.f; |
210 | } | |
211 | ||
e141ab52 BS |
212 | static inline void glue(glue(CPU_PREFIX, stfl), MEMSUFFIX)(ENV_PARAM |
213 | target_ulong ptr, | |
214 | float32 v) | |
2d603d22 FB |
215 | { |
216 | union { | |
3f87bf69 | 217 | float32 f; |
2d603d22 FB |
218 | uint32_t i; |
219 | } u; | |
220 | u.f = v; | |
e141ab52 | 221 | glue(glue(CPU_PREFIX, stl), MEMSUFFIX)(ENV_VAR ptr, u.i); |
2d603d22 FB |
222 | } |
223 | #endif /* DATA_SIZE == 4 */ | |
224 | ||
6ebbf390 | 225 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ |
84b7b8e7 | 226 | |
b92e5a22 FB |
227 | #undef RES_TYPE |
228 | #undef DATA_TYPE | |
229 | #undef DATA_STYPE | |
230 | #undef SUFFIX | |
61382a50 | 231 | #undef USUFFIX |
b92e5a22 | 232 | #undef DATA_SIZE |
6ebbf390 | 233 | #undef CPU_MMU_INDEX |
61382a50 | 234 | #undef MMUSUFFIX |
84b7b8e7 | 235 | #undef ADDR_READ |
e141ab52 BS |
236 | #undef ENV_PARAM |
237 | #undef ENV_VAR | |
238 | #undef CPU_PREFIX | |
239 | #undef HELPER_PREFIX |