[qemu.git] / tests / tcg / test-i386-fprem.c

/*
 *  x86 FPREM test - executes the FPREM and FPREM1 instructions with corner case
 *  operands and prints the operands, result and FPU status word.
 *
 *  Run this on real hardware, then under QEMU, and diff the outputs, to compare
 *  QEMU's implementation to your hardware. The 'run-test-i386-fprem' make
 *  target does this.
 *
 *  Copyright (c) 2003 Fabrice Bellard
 *  Copyright (c) 2012 Catalin Patulea
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, see <http://www.gnu.org/licenses/>.
 */

#include "qemu/osdep.h"

/*
 * Inspired by <ieee754.h>'s union ieee854_long_double, but with single
 * long long mantissa fields and assuming little-endianness for simplicity.
 */
union float80u {
    long double d;

    /* This is the IEEE 854 double-extended-precision format.  */
    struct {
        unsigned long long mantissa:63;
        unsigned int one:1;
        unsigned int exponent:15;
        unsigned int negative:1;
        unsigned int empty:16;
    } QEMU_PACKED ieee;

    /* This is for NaNs in the IEEE 854 double-extended-precision format.  */
    struct {
        unsigned long long mantissa:62;
        unsigned int quiet_nan:1;
        unsigned int one:1;
        unsigned int exponent:15;
        unsigned int negative:1;
        unsigned int empty:16;
    } QEMU_PACKED ieee_nan;
};

#define IEEE854_LONG_DOUBLE_BIAS 0x3fff

static const union float80u q_nan = {
    .ieee_nan.negative = 0,  /* X */
    .ieee_nan.exponent = 0x7fff,
    .ieee_nan.one = 1,
    .ieee_nan.quiet_nan = 1,
    .ieee_nan.mantissa = 0,
};

static const union float80u s_nan = {
    .ieee_nan.negative = 0,  /* X */
    .ieee_nan.exponent = 0x7fff,
    .ieee_nan.one = 1,
    .ieee_nan.quiet_nan = 0,
    .ieee_nan.mantissa = 1,  /* nonzero */
};

static const union float80u pos_inf = {
    .ieee.negative = 0,
    .ieee.exponent = 0x7fff,
    .ieee.one = 1,
    .ieee.mantissa = 0,
};

static const union float80u pseudo_pos_inf = {  /* "unsupported" */
    .ieee.negative = 0,
    .ieee.exponent = 0x7fff,
    .ieee.one = 0,
    .ieee.mantissa = 0,
};

static const union float80u pos_denorm = {
    .ieee.negative = 0,
    .ieee.exponent = 0,
    .ieee.one = 0,
    .ieee.mantissa = 1,
};

static const union float80u smallest_positive_norm = {
    .ieee.negative = 0,
    .ieee.exponent = 1,
    .ieee.one = 1,
    .ieee.mantissa = 0,
};

static void fninit()
{
    asm volatile ("fninit\n");
}

static long double fprem(long double a, long double b, uint16_t *sw)
{
    long double result;
    asm volatile ("fprem\n"
                  "fnstsw %1\n"
                  : "=t" (result), "=m" (*sw)
                  : "0" (a), "u" (b)
                  : "st(1)");
    return result;
}

static long double fprem1(long double a, long double b, uint16_t *sw)
{
    long double result;
    asm volatile ("fprem1\n"
                  "fnstsw %1\n"
                  : "=t" (result), "=m" (*sw)
                  : "0" (a), "u" (b)
                  : "st(1)");
    return result;
}

#define FPUS_IE (1 << 0)
#define FPUS_DE (1 << 1)
#define FPUS_ZE (1 << 2)
#define FPUS_OE (1 << 3)
#define FPUS_UE (1 << 4)
#define FPUS_PE (1 << 5)
#define FPUS_SF (1 << 6)
#define FPUS_SE (1 << 7)
#define FPUS_C0 (1 << 8)
#define FPUS_C1 (1 << 9)
#define FPUS_C2 (1 << 10)
#define FPUS_TOP 0x3800
#define FPUS_C3 (1 << 14)
#define FPUS_B  (1 << 15)

#define FPUS_EMASK 0x007f

#define FPUC_EM 0x3f

static void psw(uint16_t sw)
{
    printf("SW:  C3 TopC2C1C0\n");
    printf("SW: %c %d %3d %d %d %d %c %c %c %c %c %c %c %c\n",
           sw & FPUS_B ? 'B' : 'b',
           !!(sw & FPUS_C3),
           (sw & FPUS_TOP) >> 11,
           !!(sw & FPUS_C2),
           !!(sw & FPUS_C1),
           !!(sw & FPUS_C0),
           (sw & FPUS_SE) ? 'S' : 's',
           (sw & FPUS_SF) ? 'F' : 'f',
           (sw & FPUS_PE) ? 'P' : 'p',
           (sw & FPUS_UE) ? 'U' : 'u',
           (sw & FPUS_OE) ? 'O' : 'o',
           (sw & FPUS_ZE) ? 'Z' : 'z',
           (sw & FPUS_DE) ? 'D' : 'd',
           (sw & FPUS_IE) ? 'I' : 'i');
}

static void do_fprem(long double a, long double b)
{
    const union float80u au = {.d = a};
    const union float80u bu = {.d = b};
    union float80u ru;
    uint16_t sw;

    printf("A: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           au.ieee.negative, au.ieee.exponent, au.ieee.one,
           au.ieee_nan.quiet_nan, (unsigned long long)au.ieee.mantissa,
           a);
    printf("B: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           bu.ieee.negative, bu.ieee.exponent, bu.ieee.one,
           bu.ieee_nan.quiet_nan, (unsigned long long)bu.ieee.mantissa,
           b);
    fflush(stdout);

    fninit();
    ru.d = fprem(a, b, &sw);
    psw(sw);

    printf("R : S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
           ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
           ru.d);

    fninit();
    ru.d = fprem1(a, b, &sw);
    psw(sw);

    printf("R1: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
           ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
           ru.d);

    printf("\n");
}

static void do_fprem_stack_underflow(void)
{
    const long double a = 1.0;
    union float80u ru;
    uint16_t sw;

    fninit();
    asm volatile ("fprem\n"
                  "fnstsw %1\n"
                  : "=t" (ru.d), "=m" (sw)
                  : "0" (a)
                  : "st(1)");
    psw(sw);

    printf("R: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
           ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
           ru.d);
    printf("\n");
}

static void test_fprem_cases(void)
{
    printf("= stack underflow =\n");
    do_fprem_stack_underflow();

    printf("= invalid operation =\n");
    do_fprem(s_nan.d, 1.0);
    do_fprem(1.0, 0.0);
    do_fprem(pos_inf.d, 1.0);
    do_fprem(pseudo_pos_inf.d, 1.0);

    printf("= denormal =\n");
    do_fprem(pos_denorm.d, 1.0);
    do_fprem(1.0, pos_denorm.d);

    /* printf("= underflow =\n"); */
    /* TODO: Is there a case where FPREM raises underflow? */
}

static void test_fprem_pairs(void)
{
    unsigned long long count;

    unsigned int negative_index_a = 0;
    unsigned int negative_index_b = 0;
    static const unsigned int negative_values[] = {
        0,
        1,
    };

    unsigned int exponent_index_a = 0;
    unsigned int exponent_index_b = 0;
    static const unsigned int exponent_values[] = {
        0,
        1,
        2,
        IEEE854_LONG_DOUBLE_BIAS - 1,
        IEEE854_LONG_DOUBLE_BIAS,
        IEEE854_LONG_DOUBLE_BIAS + 1,
        0x7ffd,
        0x7ffe,
        0x7fff,
    };

    unsigned int one_index_a = 0;
    unsigned int one_index_b = 0;
    static const unsigned int one_values[] = {
        0,
        1,
    };

    unsigned int quiet_nan_index_a = 0;
    unsigned int quiet_nan_index_b = 0;
    static const unsigned int quiet_nan_values[] = {
        0,
        1,
    };

    unsigned int mantissa_index_a = 0;
    unsigned int mantissa_index_b = 0;
    static const unsigned long long mantissa_values[] = {
        0,
        1,
        2,
        0x3ffffffffffffffdULL,
        0x3ffffffffffffffeULL,
        0x3fffffffffffffffULL,
    };

    for (count = 0; ; ++count) {
#define INIT_FIELD(var, field) \
            .ieee_nan.field = field##_values[field##_index_##var]
        const union float80u a = {
            INIT_FIELD(a, negative),
            INIT_FIELD(a, exponent),
            INIT_FIELD(a, one),
            INIT_FIELD(a, quiet_nan),
            INIT_FIELD(a, mantissa),
        };
        const union float80u b = {
            INIT_FIELD(b, negative),
            INIT_FIELD(b, exponent),
            INIT_FIELD(b, one),
            INIT_FIELD(b, quiet_nan),
            INIT_FIELD(b, mantissa),
        };
#undef INIT_FIELD

        do_fprem(a.d, b.d);

        int carry = 1;
#define CARRY_INTO(var, field) do { \
            if (carry) { \
                if (++field##_index_##var == ARRAY_SIZE(field##_values)) { \
                    field##_index_##var = 0; \
                } else { \
                    carry = 0; \
                } \
            } \
        } while (0)
        CARRY_INTO(b, mantissa);
        CARRY_INTO(b, quiet_nan);
        CARRY_INTO(b, one);
        CARRY_INTO(b, exponent);
        CARRY_INTO(b, negative);
        CARRY_INTO(a, mantissa);
        CARRY_INTO(a, quiet_nan);
        CARRY_INTO(a, one);
        CARRY_INTO(a, exponent);
        CARRY_INTO(a, negative);
#undef CARRY_INTO

        if (carry) {
            break;
        }
    }

    fprintf(stderr, "test-i386-fprem: tested %llu cases\n", count);
}

int main(int argc, char **argv)
{
    test_fprem_cases();
    test_fprem_pairs();
    return 0;
}
Commit	Line	Data
a9523d14 CP	1	/*
	2	* x86 FPREM test - executes the FPREM and FPREM1 instructions with corner case
	3	* operands and prints the operands, result and FPU status word.
	4	*
	5	* Run this on real hardware, then under QEMU, and diff the outputs, to compare
	6	* QEMU's implementation to your hardware. The 'run-test-i386-fprem' make
	7	* target does this.
	8	*
	9	* Copyright (c) 2003 Fabrice Bellard
	10	* Copyright (c) 2012 Catalin Patulea
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; either version 2 of the License, or
	15	* (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
	21	*
	22	* You should have received a copy of the GNU General Public License
	23	* along with this program; if not, see <http://www.gnu.org/licenses/>.
	24	*/
c80f6e9c	25
1de7afc9	26	#include "qemu/osdep.h"
a9523d14 CP	27
	28	/*
	29	* Inspired by <ieee754.h>'s union ieee854_long_double, but with single
	30	* long long mantissa fields and assuming little-endianness for simplicity.
	31	*/
	32	union float80u {
	33	long double d;
	34
	35	/* This is the IEEE 854 double-extended-precision format. */
	36	struct {
	37	unsigned long long mantissa:63;
	38	unsigned int one:1;
	39	unsigned int exponent:15;
	40	unsigned int negative:1;
	41	unsigned int empty:16;
	42	} QEMU_PACKED ieee;
	43
	44	/* This is for NaNs in the IEEE 854 double-extended-precision format. */
	45	struct {
	46	unsigned long long mantissa:62;
	47	unsigned int quiet_nan:1;
	48	unsigned int one:1;
	49	unsigned int exponent:15;
	50	unsigned int negative:1;
	51	unsigned int empty:16;
	52	} QEMU_PACKED ieee_nan;
	53	};
	54
	55	#define IEEE854_LONG_DOUBLE_BIAS 0x3fff
	56
	57	static const union float80u q_nan = {
	58	.ieee_nan.negative = 0, /* X */
	59	.ieee_nan.exponent = 0x7fff,
	60	.ieee_nan.one = 1,
	61	.ieee_nan.quiet_nan = 1,
	62	.ieee_nan.mantissa = 0,
	63	};
	64
	65	static const union float80u s_nan = {
	66	.ieee_nan.negative = 0, /* X */
	67	.ieee_nan.exponent = 0x7fff,
	68	.ieee_nan.one = 1,
	69	.ieee_nan.quiet_nan = 0,
	70	.ieee_nan.mantissa = 1, /* nonzero */
	71	};
	72
	73	static const union float80u pos_inf = {
	74	.ieee.negative = 0,
	75	.ieee.exponent = 0x7fff,
	76	.ieee.one = 1,
	77	.ieee.mantissa = 0,
	78	};
	79
	80	static const union float80u pseudo_pos_inf = { /* "unsupported" */
	81	.ieee.negative = 0,
	82	.ieee.exponent = 0x7fff,
	83	.ieee.one = 0,
	84	.ieee.mantissa = 0,
	85	};
	86
	87	static const union float80u pos_denorm = {
	88	.ieee.negative = 0,
	89	.ieee.exponent = 0,
	90	.ieee.one = 0,
91	.ieee.mantissa = 1,
92	};
93
94	static const union float80u smallest_positive_norm = {
95	.ieee.negative = 0,
96	.ieee.exponent = 1,
97	.ieee.one = 1,
98	.ieee.mantissa = 0,
99	};
100
101	static void fninit()
102	{
103	asm volatile ("fninit\n");
104	}
105
106	static long double fprem(long double a, long double b, uint16_t *sw)
107	{
108	long double result;
109	asm volatile ("fprem\n"
110	"fnstsw %1\n"
111	: "=t" (result), "=m" (*sw)
112	: "0" (a), "u" (b)
113	: "st(1)");
114	return result;
115	}
116
117	static long double fprem1(long double a, long double b, uint16_t *sw)
118	{
119	long double result;
120	asm volatile ("fprem1\n"
121	"fnstsw %1\n"
122	: "=t" (result), "=m" (*sw)
123	: "0" (a), "u" (b)
124	: "st(1)");
125	return result;
126	}
127
128	#define FPUS_IE (1 << 0)
129	#define FPUS_DE (1 << 1)
130	#define FPUS_ZE (1 << 2)
131	#define FPUS_OE (1 << 3)
132	#define FPUS_UE (1 << 4)
133	#define FPUS_PE (1 << 5)
134	#define FPUS_SF (1 << 6)
135	#define FPUS_SE (1 << 7)
136	#define FPUS_C0 (1 << 8)
137	#define FPUS_C1 (1 << 9)
138	#define FPUS_C2 (1 << 10)
139	#define FPUS_TOP 0x3800
140	#define FPUS_C3 (1 << 14)
141	#define FPUS_B (1 << 15)
142
143	#define FPUS_EMASK 0x007f
144
145	#define FPUC_EM 0x3f
146
147	static void psw(uint16_t sw)
148	{
149	printf("SW: C3 TopC2C1C0\n");
150	printf("SW: %c %d %3d %d %d %d %c %c %c %c %c %c %c %c\n",
151	sw & FPUS_B ? 'B' : 'b',
152	!!(sw & FPUS_C3),
153	(sw & FPUS_TOP) >> 11,
154	!!(sw & FPUS_C2),
155	!!(sw & FPUS_C1),
156	!!(sw & FPUS_C0),
157	(sw & FPUS_SE) ? 'S' : 's',
158	(sw & FPUS_SF) ? 'F' : 'f',
159	(sw & FPUS_PE) ? 'P' : 'p',
160	(sw & FPUS_UE) ? 'U' : 'u',
161	(sw & FPUS_OE) ? 'O' : 'o',
162	(sw & FPUS_ZE) ? 'Z' : 'z',
163	(sw & FPUS_DE) ? 'D' : 'd',
164	(sw & FPUS_IE) ? 'I' : 'i');
165	}
166
167	static void do_fprem(long double a, long double b)
168	{
169	const union float80u au = {.d = a};
170	const union float80u bu = {.d = b};
171	union float80u ru;
172	uint16_t sw;
173
174	printf("A: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
175	au.ieee.negative, au.ieee.exponent, au.ieee.one,
176	au.ieee_nan.quiet_nan, (unsigned long long)au.ieee.mantissa,
177	a);
178	printf("B: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
179	bu.ieee.negative, bu.ieee.exponent, bu.ieee.one,
180	bu.ieee_nan.quiet_nan, (unsigned long long)bu.ieee.mantissa,
181	b);
182	fflush(stdout);
183
184	fninit();
185	ru.d = fprem(a, b, &sw);
186	psw(sw);
187
188	printf("R : S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
189	ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
190	ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
191	ru.d);
192
193	fninit();
194	ru.d = fprem1(a, b, &sw);
195	psw(sw);
196
197	printf("R1: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
198	ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
199	ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
200	ru.d);
201
202	printf("\n");
203	}
204
205	static void do_fprem_stack_underflow(void)
206	{
207	const long double a = 1.0;
208	union float80u ru;
209	uint16_t sw;
210
211	fninit();
212	asm volatile ("fprem\n"
213	"fnstsw %1\n"
214	: "=t" (ru.d), "=m" (sw)
215	: "0" (a)
216	: "st(1)");
217	psw(sw);
218
219	printf("R: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
220	ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
221	ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
222	ru.d);
223	printf("\n");
224	}
225
226	static void test_fprem_cases(void)
227	{
228	printf("= stack underflow =\n");
229	do_fprem_stack_underflow();
230
231	printf("= invalid operation =\n");
232	do_fprem(s_nan.d, 1.0);
233	do_fprem(1.0, 0.0);
234	do_fprem(pos_inf.d, 1.0);
235	do_fprem(pseudo_pos_inf.d, 1.0);
236
237	printf("= denormal =\n");
238	do_fprem(pos_denorm.d, 1.0);
239	do_fprem(1.0, pos_denorm.d);
240
241	/* printf("= underflow =\n"); */
242	/* TODO: Is there a case where FPREM raises underflow? */
243	}
244
245	static void test_fprem_pairs(void)
246	{
247	unsigned long long count;
248
249	unsigned int negative_index_a = 0;
250	unsigned int negative_index_b = 0;
251	static const unsigned int negative_values[] = {
252	0,
253	1,
254	};
255
256	unsigned int exponent_index_a = 0;
257	unsigned int exponent_index_b = 0;
258	static const unsigned int exponent_values[] = {
259	0,
260	1,
261	2,
262	IEEE854_LONG_DOUBLE_BIAS - 1,
263	IEEE854_LONG_DOUBLE_BIAS,
264	IEEE854_LONG_DOUBLE_BIAS + 1,
265	0x7ffd,
266	0x7ffe,
267	0x7fff,
268	};
269
270	unsigned int one_index_a = 0;
271	unsigned int one_index_b = 0;
272	static const unsigned int one_values[] = {
273	0,
274	1,
275	};
276
277	unsigned int quiet_nan_index_a = 0;
278	unsigned int quiet_nan_index_b = 0;
279	static const unsigned int quiet_nan_values[] = {
280	0,
281	1,
282	};
283
284	unsigned int mantissa_index_a = 0;
285	unsigned int mantissa_index_b = 0;
286	static const unsigned long long mantissa_values[] = {
287	0,
288	1,
289	2,
290	0x3ffffffffffffffdULL,
291	0x3ffffffffffffffeULL,
292	0x3fffffffffffffffULL,
293	};
294
295	for (count = 0; ; ++count) {
296	#define INIT_FIELD(var, field) \
297	.ieee_nan.field = field##_values[field##_index_##var]
298	const union float80u a = {
299	INIT_FIELD(a, negative),
300	INIT_FIELD(a, exponent),
301	INIT_FIELD(a, one),
302	INIT_FIELD(a, quiet_nan),
303	INIT_FIELD(a, mantissa),
304	};
305	const union float80u b = {
306	INIT_FIELD(b, negative),
307	INIT_FIELD(b, exponent),
308	INIT_FIELD(b, one),
309	INIT_FIELD(b, quiet_nan),
310	INIT_FIELD(b, mantissa),
311	};
312	#undef INIT_FIELD
313
314	do_fprem(a.d, b.d);
315
316	int carry = 1;
317	#define CARRY_INTO(var, field) do { \
318	if (carry) { \
319	if (++field##_index_##var == ARRAY_SIZE(field##_values)) { \
320	field##_index_##var = 0; \
321	} else { \
322	carry = 0; \
323	} \
324	} \
325	} while (0)
326	CARRY_INTO(b, mantissa);
327	CARRY_INTO(b, quiet_nan);
328	CARRY_INTO(b, one);
329	CARRY_INTO(b, exponent);
330	CARRY_INTO(b, negative);
331	CARRY_INTO(a, mantissa);
332	CARRY_INTO(a, quiet_nan);
333	CARRY_INTO(a, one);
334	CARRY_INTO(a, exponent);
335	CARRY_INTO(a, negative);
336	#undef CARRY_INTO
337
338	if (carry) {
339	break;
340	}
341	}
342
343	fprintf(stderr, "test-i386-fprem: tested %llu cases\n", count);
344	}
345
346	int main(int argc, char **argv)
347	{
348	test_fprem_cases();
349	test_fprem_pairs();
350	return 0;
351	}