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5fafdf24 | 1 | /* |
cdbdb648 PB |
2 | * Generic ARM Programmable Interrupt Controller support. |
3 | * | |
4 | * Copyright (c) 2006 CodeSourcery. | |
5 | * Written by Paul Brook | |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the LGPL |
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8 | */ |
9 | ||
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10 | #include "hw.h" |
11 | #include "arm-misc.h" | |
cdbdb648 | 12 | |
d537cf6c | 13 | /* Input 0 is IRQ and input 1 is FIQ. */ |
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14 | static void arm_pic_cpu_handler(void *opaque, int irq, int level) |
15 | { | |
4bd74661 AF |
16 | ARMCPU *cpu = opaque; |
17 | CPUARMState *env = &cpu->env; | |
18 | ||
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19 | switch (irq) { |
20 | case ARM_PIC_CPU_IRQ: | |
21 | if (level) | |
d537cf6c | 22 | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
cdbdb648 | 23 | else |
d537cf6c | 24 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
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25 | break; |
26 | case ARM_PIC_CPU_FIQ: | |
27 | if (level) | |
d537cf6c | 28 | cpu_interrupt(env, CPU_INTERRUPT_FIQ); |
cdbdb648 | 29 | else |
d537cf6c | 30 | cpu_reset_interrupt(env, CPU_INTERRUPT_FIQ); |
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31 | break; |
32 | default: | |
47601f22 | 33 | hw_error("arm_pic_cpu_handler: Bad interrupt line %d\n", irq); |
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34 | } |
35 | } | |
36 | ||
4bd74661 | 37 | qemu_irq *arm_pic_init_cpu(ARMCPU *cpu) |
cdbdb648 | 38 | { |
4bd74661 | 39 | return qemu_allocate_irqs(arm_pic_cpu_handler, cpu, 2); |
cdbdb648 | 40 | } |