[qemu.git] / hw / display / ssd0303.c

/*
 * SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
 *
 * Copyright (c) 2006-2007 CodeSourcery.
 * Written by Paul Brook
 *
 * This code is licensed under the GPL.
 */

/* The controller can support a variety of different displays, but we only
   implement one.  Most of the commends relating to brightness and geometry
   setup are ignored. */
#include "qemu/osdep.h"
#include "hw/i2c/i2c.h"
#include "ui/console.h"

//#define DEBUG_SSD0303 1

#ifdef DEBUG_SSD0303
#define DPRINTF(fmt, ...) \
do { printf("ssd0303: " fmt , ## __VA_ARGS__); } while (0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
#else
#define DPRINTF(fmt, ...) do {} while(0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__);} while (0)
#endif

/* Scaling factor for pixels.  */
#define MAGNIFY 4

enum ssd0303_mode
{
    SSD0303_IDLE,
    SSD0303_DATA,
    SSD0303_CMD
};

enum ssd0303_cmd {
    SSD0303_CMD_NONE,
    SSD0303_CMD_SKIP1
};

#define TYPE_SSD0303 "ssd0303"
#define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303)

typedef struct {
    I2CSlave parent_obj;

    QemuConsole *con;
    int row;
    int col;
    int start_line;
    int mirror;
    int flash;
    int enabled;
    int inverse;
    int redraw;
    enum ssd0303_mode mode;
    enum ssd0303_cmd cmd_state;
    uint8_t framebuffer[132*8];
} ssd0303_state;

static int ssd0303_recv(I2CSlave *i2c)
{
    BADF("Reads not implemented\n");
    return -1;
}

static int ssd0303_send(I2CSlave *i2c, uint8_t data)
{
    ssd0303_state *s = SSD0303(i2c);
    enum ssd0303_cmd old_cmd_state;

    switch (s->mode) {
    case SSD0303_IDLE:
        DPRINTF("byte 0x%02x\n", data);
        if (data == 0x80)
            s->mode = SSD0303_CMD;
        else if (data == 0x40)
            s->mode = SSD0303_DATA;
        else
            BADF("Unexpected byte 0x%x\n", data);
        break;
    case SSD0303_DATA:
        DPRINTF("data 0x%02x\n", data);
        if (s->col < 132) {
            s->framebuffer[s->col + s->row * 132] = data;
            s->col++;
            s->redraw = 1;
        }
        break;
    case SSD0303_CMD:
        old_cmd_state = s->cmd_state;
        s->cmd_state = SSD0303_CMD_NONE;
        switch (old_cmd_state) {
        case SSD0303_CMD_NONE:
            DPRINTF("cmd 0x%02x\n", data);
            s->mode = SSD0303_IDLE;
            switch (data) {
            case 0x00 ... 0x0f: /* Set lower column address.  */
                s->col = (s->col & 0xf0) | (data & 0xf);
                break;
            case 0x10 ... 0x20: /* Set higher column address.  */
                s->col = (s->col & 0x0f) | ((data & 0xf) << 4);
                break;
            case 0x40 ... 0x7f: /* Set start line.  */
                s->start_line = 0;
                break;
            case 0x81: /* Set contrast (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xa0: /* Mirror off.  */
                s->mirror = 0;
                break;
            case 0xa1: /* Mirror off.  */
                s->mirror = 1;
                break;
            case 0xa4: /* Entire display off.  */
                s->flash = 0;
                break;
            case 0xa5: /* Entire display on.  */
                s->flash = 1;
                break;
            case 0xa6: /* Inverse off.  */
                s->inverse = 0;
                break;
            case 0xa7: /* Inverse on.  */
                s->inverse = 1;
                break;
            case 0xa8: /* Set multiplied ratio (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xad: /* DC-DC power control.  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xae: /* Display off.  */
                s->enabled = 0;
                break;
            case 0xaf: /* Display on.  */
                s->enabled = 1;
                break;
            case 0xb0 ... 0xbf: /* Set Page address.  */
                s->row = data & 7;
                break;
            case 0xc0 ... 0xc8: /* Set COM output direction (Ignored).  */
                break;
            case 0xd3: /* Set display offset (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xd5: /* Set display clock (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xd8: /* Set color and power mode (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xd9: /* Set pre-charge period (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xda: /* Set COM pin configuration (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xdb: /* Set VCOM dselect level (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xe3: /* no-op.  */
                break;
            default:
                BADF("Unknown command: 0x%x\n", data);
            }
            break;
        case SSD0303_CMD_SKIP1:
            DPRINTF("skip 0x%02x\n", data);
            break;
        }
        break;
    }
    return 0;
}

static int ssd0303_event(I2CSlave *i2c, enum i2c_event event)
{
    ssd0303_state *s = SSD0303(i2c);

    switch (event) {
    case I2C_FINISH:
        s->mode = SSD0303_IDLE;
        break;
    case I2C_START_RECV:
    case I2C_START_SEND:
    case I2C_NACK:
        /* Nothing to do.  */
        break;
    }

    return 0;
}

static void ssd0303_update_display(void *opaque)
{
    ssd0303_state *s = (ssd0303_state *)opaque;
    DisplaySurface *surface = qemu_console_surface(s->con);
    uint8_t *dest;
    uint8_t *src;
    int x;
    int y;
    int line;
    char *colors[2];
    char colortab[MAGNIFY * 8];
    int dest_width;
    uint8_t mask;

    if (!s->redraw)
        return;

    switch (surface_bits_per_pixel(surface)) {
    case 0:
        return;
    case 15:
        dest_width = 2;
        break;
    case 16:
        dest_width = 2;
        break;
    case 24:
        dest_width = 3;
        break;
    case 32:
        dest_width = 4;
        break;
    default:
        BADF("Bad color depth\n");
        return;
    }
    dest_width *= MAGNIFY;
    memset(colortab, 0xff, dest_width);
    memset(colortab + dest_width, 0, dest_width);
    if (s->flash) {
        colors[0] = colortab;
        colors[1] = colortab;
    } else if (s->inverse) {
        colors[0] = colortab;
        colors[1] = colortab + dest_width;
    } else {
        colors[0] = colortab + dest_width;
        colors[1] = colortab;
    }
    dest = surface_data(surface);
    for (y = 0; y < 16; y++) {
        line = (y + s->start_line) & 63;
        src = s->framebuffer + 132 * (line >> 3) + 36;
        mask = 1 << (line & 7);
        for (x = 0; x < 96; x++) {
            memcpy(dest, colors[(*src & mask) != 0], dest_width);
            dest += dest_width;
            src++;
        }
        for (x = 1; x < MAGNIFY; x++) {
            memcpy(dest, dest - dest_width * 96, dest_width * 96);
            dest += dest_width * 96;
        }
    }
    s->redraw = 0;
    dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
}

static void ssd0303_invalidate_display(void * opaque)
{
    ssd0303_state *s = (ssd0303_state *)opaque;
    s->redraw = 1;
}

static const VMStateDescription vmstate_ssd0303 = {
    .name = "ssd0303_oled",
    .version_id = 1,
    .minimum_version_id = 1,
    .fields = (VMStateField[]) {
        VMSTATE_INT32(row, ssd0303_state),
        VMSTATE_INT32(col, ssd0303_state),
        VMSTATE_INT32(start_line, ssd0303_state),
        VMSTATE_INT32(mirror, ssd0303_state),
        VMSTATE_INT32(flash, ssd0303_state),
        VMSTATE_INT32(enabled, ssd0303_state),
        VMSTATE_INT32(inverse, ssd0303_state),
        VMSTATE_INT32(redraw, ssd0303_state),
        VMSTATE_UINT32(mode, ssd0303_state),
        VMSTATE_UINT32(cmd_state, ssd0303_state),
        VMSTATE_BUFFER(framebuffer, ssd0303_state),
        VMSTATE_I2C_SLAVE(parent_obj, ssd0303_state),
        VMSTATE_END_OF_LIST()
    }
};

static const GraphicHwOps ssd0303_ops = {
    .invalidate  = ssd0303_invalidate_display,
    .gfx_update  = ssd0303_update_display,
};

static int ssd0303_init(I2CSlave *i2c)
{
    ssd0303_state *s = SSD0303(i2c);

    s->con = graphic_console_init(DEVICE(i2c), 0, &ssd0303_ops, s);
    qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
    return 0;
}

static void ssd0303_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);

    k->init = ssd0303_init;
    k->event = ssd0303_event;
    k->recv = ssd0303_recv;
    k->send = ssd0303_send;
    dc->vmsd = &vmstate_ssd0303;
}

static const TypeInfo ssd0303_info = {
    .name          = TYPE_SSD0303,
    .parent        = TYPE_I2C_SLAVE,
    .instance_size = sizeof(ssd0303_state),
    .class_init    = ssd0303_class_init,
};

static void ssd0303_register_types(void)
{
    type_register_static(&ssd0303_info);
}

type_init(ssd0303_register_types)
Commit	Line	Data
9ee6e8bb PB	1	/*
	2	* SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
	3	*
	4	* Copyright (c) 2006-2007 CodeSourcery.
	5	* Written by Paul Brook
	6	*
8e31bf38	7	* This code is licensed under the GPL.
9ee6e8bb PB	8	*/
	9
	10	/* The controller can support a variety of different displays, but we only
	11	implement one. Most of the commends relating to brightness and geometry
	12	setup are ignored. */
47df5154	13	#include "qemu/osdep.h"
0d09e41a	14	#include "hw/i2c/i2c.h"
28ecbaee	15	#include "ui/console.h"
9ee6e8bb PB	16
	17	//#define DEBUG_SSD0303 1
	18
	19	#ifdef DEBUG_SSD0303
001faf32 BS	20	#define DPRINTF(fmt, ...) \
	21	do { printf("ssd0303: " fmt , ## __VA_ARGS__); } while (0)
	22	#define BADF(fmt, ...) \
	23	do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
9ee6e8bb	24	#else
001faf32 BS	25	#define DPRINTF(fmt, ...) do {} while(0)
	26	#define BADF(fmt, ...) \
	27	do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__);} while (0)
9ee6e8bb PB	28	#endif
	29
	30	/* Scaling factor for pixels. */
	31	#define MAGNIFY 4
	32
	33	enum ssd0303_mode
	34	{
	35	SSD0303_IDLE,
	36	SSD0303_DATA,
	37	SSD0303_CMD
	38	};
	39
	40	enum ssd0303_cmd {
	41	SSD0303_CMD_NONE,
	42	SSD0303_CMD_SKIP1
	43	};
	44
b1be4515 AF	45	#define TYPE_SSD0303 "ssd0303"
	46	#define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303)
	47
9ee6e8bb	48	typedef struct {
b1be4515 AF	49	I2CSlave parent_obj;
b1be4515 AF	50
c78f7137	51	QemuConsole *con;
9ee6e8bb PB	52	int row;
	53	int col;
	54	int start_line;
	55	int mirror;
	56	int flash;
	57	int enabled;
	58	int inverse;
	59	int redraw;
	60	enum ssd0303_mode mode;
	61	enum ssd0303_cmd cmd_state;
	62	uint8_t framebuffer[132*8];
	63	} ssd0303_state;
	64
9e07bdf8	65	static int ssd0303_recv(I2CSlave *i2c)
9ee6e8bb PB	66	{
	67	BADF("Reads not implemented\n");
	68	return -1;
	69	}
	70
9e07bdf8	71	static int ssd0303_send(I2CSlave *i2c, uint8_t data)
9ee6e8bb	72	{
b1be4515	73	ssd0303_state *s = SSD0303(i2c);
9ee6e8bb	74	enum ssd0303_cmd old_cmd_state;
b1be4515	75
9ee6e8bb PB	76	switch (s->mode) {
	77	case SSD0303_IDLE:
	78	DPRINTF("byte 0x%02x\n", data);
	79	if (data == 0x80)
	80	s->mode = SSD0303_CMD;
	81	else if (data == 0x40)
	82	s->mode = SSD0303_DATA;
	83	else
	84	BADF("Unexpected byte 0x%x\n", data);
	85	break;
	86	case SSD0303_DATA:
	87	DPRINTF("data 0x%02x\n", data);
	88	if (s->col < 132) {
	89	s->framebuffer[s->col + s->row * 132] = data;
	90	s->col++;
	91	s->redraw = 1;
	92	}
	93	break;
	94	case SSD0303_CMD:
	95	old_cmd_state = s->cmd_state;
	96	s->cmd_state = SSD0303_CMD_NONE;
	97	switch (old_cmd_state) {
	98	case SSD0303_CMD_NONE:
	99	DPRINTF("cmd 0x%02x\n", data);
	100	s->mode = SSD0303_IDLE;
	101	switch (data) {
4e9a0b5b	102	case 0x00 ... 0x0f: /* Set lower column address. */
9ee6e8bb PB	103	s->col = (s->col & 0xf0) \| (data & 0xf);
	104	break;
	105	case 0x10 ... 0x20: /* Set higher column address. */
	106	s->col = (s->col & 0x0f) \| ((data & 0xf) << 4);
	107	break;
	108	case 0x40 ... 0x7f: /* Set start line. */
	109	s->start_line = 0;
	110	break;
	111	case 0x81: /* Set contrast (Ignored). */
	112	s->cmd_state = SSD0303_CMD_SKIP1;
	113	break;
	114	case 0xa0: /* Mirror off. */
	115	s->mirror = 0;
	116	break;
	117	case 0xa1: /* Mirror off. */
	118	s->mirror = 1;
	119	break;
	120	case 0xa4: /* Entire display off. */
	121	s->flash = 0;
	122	break;
	123	case 0xa5: /* Entire display on. */
	124	s->flash = 1;
	125	break;
	126	case 0xa6: /* Inverse off. */
	127	s->inverse = 0;
	128	break;
	129	case 0xa7: /* Inverse on. */
	130	s->inverse = 1;
	131	break;
26404edc	132	case 0xa8: /* Set multiplied ratio (Ignored). */
9ee6e8bb PB	133	s->cmd_state = SSD0303_CMD_SKIP1;
	134	break;
	135	case 0xad: /* DC-DC power control. */
	136	s->cmd_state = SSD0303_CMD_SKIP1;
	137	break;
	138	case 0xae: /* Display off. */
	139	s->enabled = 0;
	140	break;
	141	case 0xaf: /* Display on. */
	142	s->enabled = 1;
	143	break;
	144	case 0xb0 ... 0xbf: /* Set Page address. */
	145	s->row = data & 7;
	146	break;
	147	case 0xc0 ... 0xc8: /* Set COM output direction (Ignored). */
	148	break;
	149	case 0xd3: /* Set display offset (Ignored). */
	150	s->cmd_state = SSD0303_CMD_SKIP1;
	151	break;
	152	case 0xd5: /* Set display clock (Ignored). */
	153	s->cmd_state = SSD0303_CMD_SKIP1;
	154	break;
	155	case 0xd8: /* Set color and power mode (Ignored). */
	156	s->cmd_state = SSD0303_CMD_SKIP1;
	157	break;
	158	case 0xd9: /* Set pre-charge period (Ignored). */
	159	s->cmd_state = SSD0303_CMD_SKIP1;
	160	break;
	161	case 0xda: /* Set COM pin configuration (Ignored). */
	162	s->cmd_state = SSD0303_CMD_SKIP1;
	163	break;
	164	case 0xdb: /* Set VCOM dselect level (Ignored). */
	165	s->cmd_state = SSD0303_CMD_SKIP1;
	166	break;
	167	case 0xe3: /* no-op. */
	168	break;
	169	default:
	170	BADF("Unknown command: 0x%x\n", data);
	171	}
	172	break;
	173	case SSD0303_CMD_SKIP1:
	174	DPRINTF("skip 0x%02x\n", data);
	175	break;
	176	}
	177	break;
	178	}
	179	return 0;
	180	}
	181
d307c28c	182	static int ssd0303_event(I2CSlave *i2c, enum i2c_event event)
9ee6e8bb	183	{
b1be4515 AF	184	ssd0303_state *s = SSD0303(i2c);
b1be4515 AF	185
9ee6e8bb PB	186	switch (event) {
	187	case I2C_FINISH:
	188	s->mode = SSD0303_IDLE;
	189	break;
	190	case I2C_START_RECV:
	191	case I2C_START_SEND:
	192	case I2C_NACK:
	193	/* Nothing to do. */
	194	break;
	195	}
d307c28c CM	196
d307c28c CM	197	return 0;
9ee6e8bb PB	198	}
	199
	200	static void ssd0303_update_display(void *opaque)
	201	{
	202	ssd0303_state s = (ssd0303_state )opaque;
c78f7137	203	DisplaySurface *surface = qemu_console_surface(s->con);
9ee6e8bb PB	204	uint8_t *dest;
	205	uint8_t *src;
	206	int x;
	207	int y;
	208	int line;
	209	char *colors[2];
	210	char colortab[MAGNIFY * 8];
	211	int dest_width;
	212	uint8_t mask;
	213
b115bb3f PB	214	if (!s->redraw)
	215	return;
	216
c78f7137	217	switch (surface_bits_per_pixel(surface)) {
b115bb3f PB	218	case 0:
	219	return;
	220	case 15:
	221	dest_width = 2;
	222	break;
	223	case 16:
	224	dest_width = 2;
	225	break;
	226	case 24:
	227	dest_width = 3;
	228	break;
	229	case 32:
	230	dest_width = 4;
	231	break;
	232	default:
	233	BADF("Bad color depth\n");
	234	return;
	235	}
	236	dest_width *= MAGNIFY;
	237	memset(colortab, 0xff, dest_width);
	238	memset(colortab + dest_width, 0, dest_width);
	239	if (s->flash) {
	240	colors[0] = colortab;
	241	colors[1] = colortab;
	242	} else if (s->inverse) {
	243	colors[0] = colortab;
	244	colors[1] = colortab + dest_width;
	245	} else {
	246	colors[0] = colortab + dest_width;
	247	colors[1] = colortab;
	248	}
c78f7137	249	dest = surface_data(surface);
b115bb3f PB	250	for (y = 0; y < 16; y++) {
	251	line = (y + s->start_line) & 63;
	252	src = s->framebuffer + 132 * (line >> 3) + 36;
	253	mask = 1 << (line & 7);
	254	for (x = 0; x < 96; x++) {
	255	memcpy(dest, colors[(*src & mask) != 0], dest_width);
	256	dest += dest_width;
	257	src++;
9ee6e8bb	258	}
b115bb3f PB	259	for (x = 1; x < MAGNIFY; x++) {
	260	memcpy(dest, dest - dest_width * 96, dest_width * 96);
	261	dest += dest_width * 96;
9ee6e8bb PB	262	}
9ee6e8bb PB	263	}
b115bb3f	264	s->redraw = 0;
c78f7137	265	dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
9ee6e8bb PB	266	}
	267
	268	static void ssd0303_invalidate_display(void * opaque)
	269	{
	270	ssd0303_state s = (ssd0303_state )opaque;
	271	s->redraw = 1;
	272	}
	273
aed7278d JQ	274	static const VMStateDescription vmstate_ssd0303 = {
	275	.name = "ssd0303_oled",
	276	.version_id = 1,
	277	.minimum_version_id = 1,
8f1e884b	278	.fields = (VMStateField[]) {
aed7278d JQ	279	VMSTATE_INT32(row, ssd0303_state),
	280	VMSTATE_INT32(col, ssd0303_state),
	281	VMSTATE_INT32(start_line, ssd0303_state),
	282	VMSTATE_INT32(mirror, ssd0303_state),
	283	VMSTATE_INT32(flash, ssd0303_state),
	284	VMSTATE_INT32(enabled, ssd0303_state),
	285	VMSTATE_INT32(inverse, ssd0303_state),
	286	VMSTATE_INT32(redraw, ssd0303_state),
	287	VMSTATE_UINT32(mode, ssd0303_state),
	288	VMSTATE_UINT32(cmd_state, ssd0303_state),
	289	VMSTATE_BUFFER(framebuffer, ssd0303_state),
b1be4515	290	VMSTATE_I2C_SLAVE(parent_obj, ssd0303_state),
aed7278d JQ	291	VMSTATE_END_OF_LIST()
	292	}
	293	};
23e39294	294
380cd056 GH	295	static const GraphicHwOps ssd0303_ops = {
	296	.invalidate = ssd0303_invalidate_display,
	297	.gfx_update = ssd0303_update_display,
	298	};
	299
9e07bdf8	300	static int ssd0303_init(I2CSlave *i2c)
9ee6e8bb	301	{
b1be4515	302	ssd0303_state *s = SSD0303(i2c);
9ee6e8bb	303
5643706a	304	s->con = graphic_console_init(DEVICE(i2c), 0, &ssd0303_ops, s);
c78f7137	305	qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
81a322d4	306	return 0;
9ee6e8bb	307	}
d2199005	308
b5ea9327 AL	309	static void ssd0303_class_init(ObjectClass klass, void data)
b5ea9327 AL	310	{
39bffca2	311	DeviceClass *dc = DEVICE_CLASS(klass);
b5ea9327 AL	312	I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
	313
	314	k->init = ssd0303_init;
	315	k->event = ssd0303_event;
	316	k->recv = ssd0303_recv;
	317	k->send = ssd0303_send;
39bffca2	318	dc->vmsd = &vmstate_ssd0303;
b5ea9327 AL	319	}
b5ea9327 AL	320
8c43a6f0	321	static const TypeInfo ssd0303_info = {
b1be4515	322	.name = TYPE_SSD0303,
39bffca2 AL	323	.parent = TYPE_I2C_SLAVE,
	324	.instance_size = sizeof(ssd0303_state),
	325	.class_init = ssd0303_class_init,
d2199005 PB	326	};
d2199005 PB	327
83f7d43a	328	static void ssd0303_register_types(void)
d2199005	329	{
39bffca2	330	type_register_static(&ssd0303_info);
d2199005 PB	331	}
d2199005 PB	332
83f7d43a	333	type_init(ssd0303_register_types)