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1c7955c4 PX |
1 | /* |
2 | * QEMU emulation of common X86 IOMMU | |
3 | * | |
4 | * Copyright (C) 2016 Peter Xu, Red Hat <[email protected]> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | ||
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | ||
16 | * You should have received a copy of the GNU General Public License along | |
17 | * with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "qemu/osdep.h" | |
21 | #include "hw/sysbus.h" | |
22 | #include "hw/boards.h" | |
23 | #include "hw/i386/x86-iommu.h" | |
29396ed9 MG |
24 | #include "hw/i386/pc.h" |
25 | #include "qapi/error.h" | |
1cf5fd57 | 26 | #include "qemu/error-report.h" |
02a2cbc8 PX |
27 | #include "trace.h" |
28 | ||
29 | void x86_iommu_iec_register_notifier(X86IOMMUState *iommu, | |
30 | iec_notify_fn fn, void *data) | |
31 | { | |
32 | IEC_Notifier *notifier = g_new0(IEC_Notifier, 1); | |
33 | ||
34 | notifier->iec_notify = fn; | |
35 | notifier->private = data; | |
36 | ||
37 | QLIST_INSERT_HEAD(&iommu->iec_notifiers, notifier, list); | |
38 | } | |
39 | ||
40 | void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global, | |
41 | uint32_t index, uint32_t mask) | |
42 | { | |
43 | IEC_Notifier *notifier; | |
44 | ||
45 | trace_x86_iommu_iec_notify(global, index, mask); | |
46 | ||
47 | QLIST_FOREACH(notifier, &iommu->iec_notifiers, list) { | |
48 | if (notifier->iec_notify) { | |
49 | notifier->iec_notify(notifier->private, global, | |
50 | index, mask); | |
51 | } | |
52 | } | |
53 | } | |
1cf5fd57 PX |
54 | |
55 | /* Default X86 IOMMU device */ | |
56 | static X86IOMMUState *x86_iommu_default = NULL; | |
57 | ||
58 | static void x86_iommu_set_default(X86IOMMUState *x86_iommu) | |
59 | { | |
60 | assert(x86_iommu); | |
61 | ||
62 | if (x86_iommu_default) { | |
63 | error_report("QEMU does not support multiple vIOMMUs " | |
64 | "for x86 yet."); | |
65 | exit(1); | |
66 | } | |
67 | ||
68 | x86_iommu_default = x86_iommu; | |
69 | } | |
70 | ||
71 | X86IOMMUState *x86_iommu_get_default(void) | |
72 | { | |
73 | return x86_iommu_default; | |
74 | } | |
1c7955c4 | 75 | |
fb9f5926 DK |
76 | IommuType x86_iommu_get_type(void) |
77 | { | |
78 | return x86_iommu_default->type; | |
79 | } | |
80 | ||
1c7955c4 PX |
81 | static void x86_iommu_realize(DeviceState *dev, Error **errp) |
82 | { | |
02a2cbc8 | 83 | X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev); |
1c7955c4 | 84 | X86IOMMUClass *x86_class = X86_IOMMU_GET_CLASS(dev); |
29396ed9 MG |
85 | MachineState *ms = MACHINE(qdev_get_machine()); |
86 | MachineClass *mc = MACHINE_GET_CLASS(ms); | |
87 | PCMachineState *pcms = | |
88 | PC_MACHINE(object_dynamic_cast(OBJECT(ms), TYPE_PC_MACHINE)); | |
02a2cbc8 | 89 | QLIST_INIT(&x86_iommu->iec_notifiers); |
29396ed9 | 90 | |
a0c167a1 | 91 | if (!pcms || !pcms->bus) { |
29396ed9 MG |
92 | error_setg(errp, "Machine-type '%s' not supported by IOMMU", |
93 | mc->name); | |
94 | return; | |
95 | } | |
96 | ||
1c7955c4 PX |
97 | if (x86_class->realize) { |
98 | x86_class->realize(dev, errp); | |
99 | } | |
fb9f5926 | 100 | |
1cf5fd57 | 101 | x86_iommu_set_default(X86_IOMMU_DEVICE(dev)); |
1c7955c4 PX |
102 | } |
103 | ||
0b77d30a PX |
104 | static Property x86_iommu_properties[] = { |
105 | DEFINE_PROP_BOOL("intremap", X86IOMMUState, intr_supported, false), | |
106 | DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false), | |
dbaabb25 | 107 | DEFINE_PROP_BOOL("pt", X86IOMMUState, pt_supported, true), |
0b77d30a PX |
108 | DEFINE_PROP_END_OF_LIST(), |
109 | }; | |
110 | ||
1c7955c4 PX |
111 | static void x86_iommu_class_init(ObjectClass *klass, void *data) |
112 | { | |
113 | DeviceClass *dc = DEVICE_CLASS(klass); | |
114 | dc->realize = x86_iommu_realize; | |
0b77d30a | 115 | dc->props = x86_iommu_properties; |
1121e0af PX |
116 | } |
117 | ||
1c7955c4 PX |
118 | static const TypeInfo x86_iommu_info = { |
119 | .name = TYPE_X86_IOMMU_DEVICE, | |
120 | .parent = TYPE_SYS_BUS_DEVICE, | |
121 | .instance_size = sizeof(X86IOMMUState), | |
122 | .class_init = x86_iommu_class_init, | |
123 | .class_size = sizeof(X86IOMMUClass), | |
124 | .abstract = true, | |
125 | }; | |
126 | ||
127 | static void x86_iommu_register_types(void) | |
128 | { | |
129 | type_register_static(&x86_iommu_info); | |
130 | } | |
131 | ||
132 | type_init(x86_iommu_register_types) |