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Commit | Line | Data |
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4c9649a9 | 1 | /* |
c3082755 | 2 | * Helpers for loads and stores |
5fafdf24 | 3 | * |
4c9649a9 JM |
4 | * Copyright (c) 2007 Jocelyn Mayer |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
4c9649a9 JM |
18 | */ |
19 | ||
e2e5e114 | 20 | #include "qemu/osdep.h" |
3e457172 | 21 | #include "cpu.h" |
2ef6175a | 22 | #include "exec/helper-proto.h" |
f08b6170 | 23 | #include "exec/cpu_ldst.h" |
4c9649a9 | 24 | |
4c9649a9 | 25 | /* Softmmu support */ |
c3082755 RH |
26 | #ifndef CONFIG_USER_ONLY |
27 | ||
fdfba1a2 | 28 | uint64_t helper_ldl_phys(CPUAlphaState *env, uint64_t p) |
8bb6e981 | 29 | { |
d2810ffd | 30 | CPUState *cs = CPU(alpha_env_get_cpu(env)); |
fdfba1a2 | 31 | return (int32_t)ldl_phys(cs->as, p); |
8bb6e981 AJ |
32 | } |
33 | ||
2c17449b | 34 | uint64_t helper_ldq_phys(CPUAlphaState *env, uint64_t p) |
8bb6e981 | 35 | { |
d2810ffd | 36 | CPUState *cs = CPU(alpha_env_get_cpu(env)); |
2c17449b | 37 | return ldq_phys(cs->as, p); |
8bb6e981 AJ |
38 | } |
39 | ||
c3082755 | 40 | uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p) |
8bb6e981 | 41 | { |
d2810ffd | 42 | CPUState *cs = CPU(alpha_env_get_cpu(env)); |
2374e73e | 43 | env->lock_addr = p; |
fdfba1a2 | 44 | return env->lock_value = (int32_t)ldl_phys(cs->as, p); |
8bb6e981 AJ |
45 | } |
46 | ||
c3082755 | 47 | uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p) |
8bb6e981 | 48 | { |
d2810ffd | 49 | CPUState *cs = CPU(alpha_env_get_cpu(env)); |
2374e73e | 50 | env->lock_addr = p; |
2c17449b | 51 | return env->lock_value = ldq_phys(cs->as, p); |
8bb6e981 AJ |
52 | } |
53 | ||
ab1da857 | 54 | void helper_stl_phys(CPUAlphaState *env, uint64_t p, uint64_t v) |
8bb6e981 | 55 | { |
d2810ffd | 56 | CPUState *cs = CPU(alpha_env_get_cpu(env)); |
ab1da857 | 57 | stl_phys(cs->as, p, v); |
8bb6e981 AJ |
58 | } |
59 | ||
f606604f | 60 | void helper_stq_phys(CPUAlphaState *env, uint64_t p, uint64_t v) |
8bb6e981 | 61 | { |
d2810ffd | 62 | CPUState *cs = CPU(alpha_env_get_cpu(env)); |
f606604f | 63 | stq_phys(cs->as, p, v); |
8bb6e981 AJ |
64 | } |
65 | ||
c3082755 | 66 | uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v) |
8bb6e981 | 67 | { |
d2810ffd | 68 | CPUState *cs = CPU(alpha_env_get_cpu(env)); |
2374e73e | 69 | uint64_t ret = 0; |
8bb6e981 | 70 | |
2374e73e | 71 | if (p == env->lock_addr) { |
fdfba1a2 | 72 | int32_t old = ldl_phys(cs->as, p); |
2374e73e | 73 | if (old == (int32_t)env->lock_value) { |
ab1da857 | 74 | stl_phys(cs->as, p, v); |
2374e73e RH |
75 | ret = 1; |
76 | } | |
77 | } | |
78 | env->lock_addr = -1; | |
8bb6e981 AJ |
79 | |
80 | return ret; | |
81 | } | |
82 | ||
c3082755 | 83 | uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v) |
8bb6e981 | 84 | { |
d2810ffd | 85 | CPUState *cs = CPU(alpha_env_get_cpu(env)); |
2374e73e | 86 | uint64_t ret = 0; |
8bb6e981 | 87 | |
2374e73e | 88 | if (p == env->lock_addr) { |
2c17449b | 89 | uint64_t old = ldq_phys(cs->as, p); |
2374e73e | 90 | if (old == env->lock_value) { |
f606604f | 91 | stq_phys(cs->as, p, v); |
2374e73e RH |
92 | ret = 1; |
93 | } | |
94 | } | |
95 | env->lock_addr = -1; | |
8bb6e981 AJ |
96 | |
97 | return ret; | |
4c9649a9 JM |
98 | } |
99 | ||
93e22326 PB |
100 | void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr, |
101 | int is_write, int is_user, uintptr_t retaddr) | |
5b450407 | 102 | { |
93e22326 PB |
103 | AlphaCPU *cpu = ALPHA_CPU(cs); |
104 | CPUAlphaState *env = &cpu->env; | |
5b450407 RH |
105 | uint64_t pc; |
106 | uint32_t insn; | |
107 | ||
a8a826a3 | 108 | if (retaddr) { |
3f38f309 | 109 | cpu_restore_state(cs, retaddr); |
a8a826a3 | 110 | } |
5b450407 RH |
111 | |
112 | pc = env->pc; | |
c3082755 | 113 | insn = cpu_ldl_code(env, pc); |
5b450407 RH |
114 | |
115 | env->trap_arg0 = addr; | |
116 | env->trap_arg1 = insn >> 26; /* opcode */ | |
117 | env->trap_arg2 = (insn >> 21) & 31; /* dest regno */ | |
27103424 | 118 | cs->exception_index = EXCP_UNALIGN; |
b9f0923e | 119 | env->error_code = 0; |
5638d180 | 120 | cpu_loop_exit(cs); |
5b450407 RH |
121 | } |
122 | ||
c658b94f AF |
123 | void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr, |
124 | bool is_write, bool is_exec, int unused, | |
125 | unsigned size) | |
5b450407 | 126 | { |
c658b94f AF |
127 | AlphaCPU *cpu = ALPHA_CPU(cs); |
128 | CPUAlphaState *env = &cpu->env; | |
129 | ||
5b450407 | 130 | env->trap_arg0 = addr; |
c658b94f | 131 | env->trap_arg1 = is_write ? 1 : 0; |
ba9c5de5 RH |
132 | cs->exception_index = EXCP_MCHK; |
133 | env->error_code = 0; | |
134 | ||
135 | /* ??? We should cpu_restore_state to the faulting insn, but this hook | |
67cc32eb | 136 | does not have access to the retaddr value from the original helper. |
ba9c5de5 RH |
137 | It's all moot until the QEMU PALcode grows an MCHK handler. */ |
138 | ||
139 | cpu_loop_exit(cs); | |
5b450407 RH |
140 | } |
141 | ||
4c9649a9 JM |
142 | /* try to fill the TLB and return an exception if error. If retaddr is |
143 | NULL, it means that the function was called in C code (i.e. not | |
144 | from generated code or from helper.c) */ | |
145 | /* XXX: fix it to restore all registers */ | |
d5a11fef | 146 | void tlb_fill(CPUState *cs, target_ulong addr, int is_write, |
20503968 | 147 | int mmu_idx, uintptr_t retaddr) |
4c9649a9 | 148 | { |
4c9649a9 JM |
149 | int ret; |
150 | ||
d5a11fef | 151 | ret = alpha_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); |
2d9671d3 | 152 | if (unlikely(ret != 0)) { |
a8a826a3 | 153 | if (retaddr) { |
3f38f309 | 154 | cpu_restore_state(cs, retaddr); |
a8a826a3 | 155 | } |
4c9649a9 | 156 | /* Exception index and error code are already set */ |
5638d180 | 157 | cpu_loop_exit(cs); |
4c9649a9 | 158 | } |
4c9649a9 | 159 | } |
c3082755 | 160 | #endif /* CONFIG_USER_ONLY */ |