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79b97bf2 JQ |
1 | /* |
2 | * QEMU ISA MM VGA Emulator. | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include "hw.h" | |
25 | #include "console.h" | |
26 | #include "pc.h" | |
27 | #include "vga_int.h" | |
28 | #include "pixel_ops.h" | |
29 | #include "qemu-timer.h" | |
30 | ||
4a1e244e GH |
31 | #define VGA_RAM_SIZE (8192 * 1024) |
32 | ||
79b97bf2 JQ |
33 | typedef struct ISAVGAMMState { |
34 | VGACommonState vga; | |
35 | int it_shift; | |
36 | } ISAVGAMMState; | |
37 | ||
38 | /* Memory mapped interface */ | |
c227f099 | 39 | static uint32_t vga_mm_readb (void *opaque, target_phys_addr_t addr) |
79b97bf2 JQ |
40 | { |
41 | ISAVGAMMState *s = opaque; | |
42 | ||
43 | return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff; | |
44 | } | |
45 | ||
46 | static void vga_mm_writeb (void *opaque, | |
c227f099 | 47 | target_phys_addr_t addr, uint32_t value) |
79b97bf2 JQ |
48 | { |
49 | ISAVGAMMState *s = opaque; | |
50 | ||
51 | vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff); | |
52 | } | |
53 | ||
c227f099 | 54 | static uint32_t vga_mm_readw (void *opaque, target_phys_addr_t addr) |
79b97bf2 JQ |
55 | { |
56 | ISAVGAMMState *s = opaque; | |
57 | ||
58 | return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff; | |
59 | } | |
60 | ||
61 | static void vga_mm_writew (void *opaque, | |
c227f099 | 62 | target_phys_addr_t addr, uint32_t value) |
79b97bf2 JQ |
63 | { |
64 | ISAVGAMMState *s = opaque; | |
65 | ||
66 | vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff); | |
67 | } | |
68 | ||
c227f099 | 69 | static uint32_t vga_mm_readl (void *opaque, target_phys_addr_t addr) |
79b97bf2 JQ |
70 | { |
71 | ISAVGAMMState *s = opaque; | |
72 | ||
73 | return vga_ioport_read(&s->vga, addr >> s->it_shift); | |
74 | } | |
75 | ||
76 | static void vga_mm_writel (void *opaque, | |
c227f099 | 77 | target_phys_addr_t addr, uint32_t value) |
79b97bf2 JQ |
78 | { |
79 | ISAVGAMMState *s = opaque; | |
80 | ||
81 | vga_ioport_write(&s->vga, addr >> s->it_shift, value); | |
82 | } | |
83 | ||
b1950430 AK |
84 | static const MemoryRegionOps vga_mm_ctrl_ops = { |
85 | .old_mmio = { | |
86 | .read = { | |
87 | vga_mm_readb, | |
88 | vga_mm_readw, | |
89 | vga_mm_readl, | |
90 | }, | |
91 | .write = { | |
92 | vga_mm_writeb, | |
93 | vga_mm_writew, | |
94 | vga_mm_writel, | |
95 | }, | |
96 | }, | |
97 | .endianness = DEVICE_NATIVE_ENDIAN, | |
79b97bf2 JQ |
98 | }; |
99 | ||
c227f099 | 100 | static void vga_mm_init(ISAVGAMMState *s, target_phys_addr_t vram_base, |
be20f9e9 AK |
101 | target_phys_addr_t ctrl_base, int it_shift, |
102 | MemoryRegion *address_space) | |
79b97bf2 | 103 | { |
b1950430 | 104 | MemoryRegion *s_ioport_ctrl, *vga_io_memory; |
79b97bf2 JQ |
105 | |
106 | s->it_shift = it_shift; | |
7267c094 | 107 | s_ioport_ctrl = g_malloc(sizeof(*s_ioport_ctrl)); |
b1950430 AK |
108 | memory_region_init_io(s_ioport_ctrl, &vga_mm_ctrl_ops, s, |
109 | "vga-mm-ctrl", 0x100000); | |
110 | ||
7267c094 | 111 | vga_io_memory = g_malloc(sizeof(*vga_io_memory)); |
b1950430 AK |
112 | /* XXX: endianness? */ |
113 | memory_region_init_io(vga_io_memory, &vga_mem_ops, &s->vga, | |
114 | "vga-mem", 0x20000); | |
79b97bf2 | 115 | |
0be71e32 | 116 | vmstate_register(NULL, 0, &vmstate_vga_common, s); |
79b97bf2 | 117 | |
be20f9e9 | 118 | memory_region_add_subregion(address_space, ctrl_base, s_ioport_ctrl); |
79b97bf2 | 119 | s->vga.bank_offset = 0; |
be20f9e9 | 120 | memory_region_add_subregion(address_space, |
b1950430 AK |
121 | vram_base + 0x000a0000, vga_io_memory); |
122 | memory_region_set_coalescing(vga_io_memory); | |
79b97bf2 JQ |
123 | } |
124 | ||
c227f099 | 125 | int isa_vga_mm_init(target_phys_addr_t vram_base, |
be20f9e9 AK |
126 | target_phys_addr_t ctrl_base, int it_shift, |
127 | MemoryRegion *address_space) | |
79b97bf2 JQ |
128 | { |
129 | ISAVGAMMState *s; | |
130 | ||
7267c094 | 131 | s = g_malloc0(sizeof(*s)); |
79b97bf2 | 132 | |
4a1e244e GH |
133 | s->vga.vram_size_mb = VGA_RAM_SIZE >> 20; |
134 | vga_common_init(&s->vga); | |
be20f9e9 | 135 | vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space); |
79b97bf2 JQ |
136 | |
137 | s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate, | |
138 | s->vga.screen_dump, s->vga.text_update, s); | |
139 | ||
be20f9e9 | 140 | vga_init_vbe(&s->vga, address_space); |
79b97bf2 JQ |
141 | return 0; |
142 | } |