]> Git Repo - qemu.git/blame - hw/fmopl.c
projects / qemu.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
usb-redir: Get rid of local shadow copy of packet headers
[qemu.git] / hw / fmopl.c
CommitLineData
85571bc7
FB		 1/*
2**
3** File: fmopl.c -- software implementation of FM sound generator
4**
5** Copyright (C) 1999,2000 Tatsuyuki Satoh , MultiArcadeMachineEmurator development
6**
7** Version 0.37a
8**
9*/
10
11/*
12 preliminary :
13 Problem :
14 note:
15*/
16
17/* This version of fmopl.c is a fork of the MAME one, relicensed under the LGPL.
18 *
19 * This library is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU Lesser General Public
21 * License as published by the Free Software Foundation; either
22 * version 2.1 of the License, or (at your option) any later version.
23 *
24 * This library is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
27 * Lesser General Public License for more details.
28 *
29 * You should have received a copy of the GNU Lesser General Public
8167ee88 30 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
85571bc7
FB		 31 */
32
947f5fcb 33#define INLINE static inline
85571bc7
FB		 34#define HAS_YM3812 1
35
36#include <stdio.h>
37#include <stdlib.h>
38#include <string.h>
39#include <stdarg.h>
40#include <math.h>
41//#include "driver.h" /* use M.A.M.E. */
42#include "fmopl.h"
43
44#ifndef PI
45#define PI 3.14159265358979323846
46#endif
47
913895ab
SW		 48#ifndef ARRAY_SIZE
49#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
50#endif
51
85571bc7
FB		 52/* -------------------- for debug --------------------- */
53/* #define OPL_OUTPUT_LOG */
54#ifdef OPL_OUTPUT_LOG
55static FILE *opl_dbg_fp = NULL;
56static FM_OPL *opl_dbg_opl[16];
57static int opl_dbg_maxchip,opl_dbg_chip;
58#endif
59
60/* -------------------- preliminary define section --------------------- */
61/* attack/decay rate time rate */
62#define OPL_ARRATE 141280 /* RATE 4 = 2826.24ms @ 3.6MHz */
63#define OPL_DRRATE 1956000 /* RATE 4 = 39280.64ms @ 3.6MHz */
64
65#define DELTAT_MIXING_LEVEL (1) /* DELTA-T ADPCM MIXING LEVEL */
66
67#define FREQ_BITS 24 /* frequency turn */
68
69/* counter bits = 20 , octerve 7 */
70#define FREQ_RATE (1<<(FREQ_BITS-20))
71#define TL_BITS (FREQ_BITS+2)
72
73/* final output shift , limit minimum and maximum */
74#define OPL_OUTSB (TL_BITS+3-16) /* OPL output final shift 16bit */
75#define OPL_MAXOUT (0x7fff<<OPL_OUTSB)
76#define OPL_MINOUT (-0x8000<<OPL_OUTSB)
77
78/* -------------------- quality selection --------------------- */
79
80/* sinwave entries */
81/* used static memory = SIN_ENT * 4 (byte) */
82#define SIN_ENT 2048
83
84/* output level entries (envelope,sinwave) */
85/* envelope counter lower bits */
86#define ENV_BITS 16
87/* envelope output entries */
88#define EG_ENT 4096
89/* used dynamic memory = EG_ENT*4*4(byte)or EG_ENT*6*4(byte) */
90/* used static memory = EG_ENT*4 (byte) */
91
92#define EG_OFF ((2*EG_ENT)<<ENV_BITS) /* OFF */
93#define EG_DED EG_OFF
94#define EG_DST (EG_ENT<<ENV_BITS) /* DECAY START */
95#define EG_AED EG_DST
96#define EG_AST 0 /* ATTACK START */
97
98#define EG_STEP (96.0/EG_ENT) /* OPL is 0.1875 dB step */
99
100/* LFO table entries */
101#define VIB_ENT 512
102#define VIB_SHIFT (32-9)
103#define AMS_ENT 512
104#define AMS_SHIFT (32-9)
105
106#define VIB_RATE 256
107
108/* -------------------- local defines , macros --------------------- */
109
110/* register number to channel number , slot offset */
111#define SLOT1 0
112#define SLOT2 1
113
114/* envelope phase */
115#define ENV_MOD_RR 0x00
116#define ENV_MOD_DR 0x01
117#define ENV_MOD_AR 0x02
118
119/* -------------------- tables --------------------- */
120static const int slot_array[32]=
121{
122 0, 2, 4, 1, 3, 5,-1,-1,
123 6, 8,10, 7, 9,11,-1,-1,
124 12,14,16,13,15,17,-1,-1,
125 -1,-1,-1,-1,-1,-1,-1,-1
126};
127
128/* key scale level */
129/* table is 3dB/OCT , DV converts this in TL step at 6dB/OCT */
130#define DV (EG_STEP/2)
131static const UINT32 KSL_TABLE[8*16]=
132{
133 /* OCT 0 */
134 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
135 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
136 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
137 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
138 /* OCT 1 */
139 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
140 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
141 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
142 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
143 /* OCT 2 */
144 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
145 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
146 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
147 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
148 /* OCT 3 */
149 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
150 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
151 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
152 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
153 /* OCT 4 */
154 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
155 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
156 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
157 10.875/DV,11.250/DV,11.625/DV,12.000/DV,
158 /* OCT 5 */
159 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
160 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
161 12.000/DV,12.750/DV,13.125/DV,13.500/DV,
162 13.875/DV,14.250/DV,14.625/DV,15.000/DV,
163 /* OCT 6 */
164 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
165 12.000/DV,13.125/DV,13.875/DV,14.625/DV,
166 15.000/DV,15.750/DV,16.125/DV,16.500/DV,
167 16.875/DV,17.250/DV,17.625/DV,18.000/DV,
168 /* OCT 7 */
169 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
170 15.000/DV,16.125/DV,16.875/DV,17.625/DV,
171 18.000/DV,18.750/DV,19.125/DV,19.500/DV,
172 19.875/DV,20.250/DV,20.625/DV,21.000/DV
173};
174#undef DV
175
176/* sustain lebel table (3db per step) */
177/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
178#define SC(db) (db*((3/EG_STEP)*(1<<ENV_BITS)))+EG_DST
179static const INT32 SL_TABLE[16]={
180 SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
181 SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
182};
183#undef SC
184
185#define TL_MAX (EG_ENT*2) /* limit(tl + ksr + envelope) + sinwave */
186/* TotalLevel : 48 24 12 6 3 1.5 0.75 (dB) */
187/* TL_TABLE[ 0 to TL_MAX ] : plus section */
188/* TL_TABLE[ TL_MAX to TL_MAX+TL_MAX-1 ] : minus section */
189static INT32 *TL_TABLE;
190
191/* pointers to TL_TABLE with sinwave output offset */
192static INT32 **SIN_TABLE;
193
194/* LFO table */
195static INT32 *AMS_TABLE;
196static INT32 *VIB_TABLE;
197
198/* envelope output curve table */
199/* attack + decay + OFF */
200static INT32 ENV_CURVE[2*EG_ENT+1];
201
202/* multiple table */
203#define ML 2
204static const UINT32 MUL_TABLE[16]= {
205/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15 */
206 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
207 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
208};
209#undef ML
210
211/* dummy attack / decay rate ( when rate == 0 ) */
212static INT32 RATE_0[16]=
213{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
214
215/* -------------------- static state --------------------- */
216
217/* lock level of common table */
218static int num_lock = 0;
219
220/* work table */
221static void *cur_chip = NULL; /* current chip point */
222/* currenct chip state */
223/* static OPLSAMPLE *bufL,*bufR; */
224static OPL_CH *S_CH;
225static OPL_CH *E_CH;
226OPL_SLOT *SLOT7_1,*SLOT7_2,*SLOT8_1,*SLOT8_2;
227
228static INT32 outd[1];
229static INT32 ams;
230static INT32 vib;
231INT32 *ams_table;
232INT32 *vib_table;
233static INT32 amsIncr;
234static INT32 vibIncr;
235static INT32 feedback2; /* connect for SLOT 2 */
236
237/* log output level */
238#define LOG_ERR 3 /* ERROR */
239#define LOG_WAR 2 /* WARNING */
240#define LOG_INF 1 /* INFORMATION */
241
242//#define LOG_LEVEL LOG_INF
243#define LOG_LEVEL LOG_ERR
244
245//#define LOG(n,x) if( (n)>=LOG_LEVEL ) logerror x
246#define LOG(n,x)
247
248/* --------------------- subroutines --------------------- */
249
250INLINE int Limit( int val, int max, int min ) {
251 if ( val > max )
252 val = max;
253 else if ( val < min )
254 val = min;
255
256 return val;
257}
258
259/* status set and IRQ handling */
260INLINE void OPL_STATUS_SET(FM_OPL *OPL,int flag)
261{
262 /* set status flag */
263 OPL->status |= flag;
264 if(!(OPL->status & 0x80))
265 {
266 if(OPL->status & OPL->statusmask)
267 { /* IRQ on */
268 OPL->status |= 0x80;
269 /* callback user interrupt handler (IRQ is OFF to ON) */
270 if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,1);
271 }
272 }
273}
274
275/* status reset and IRQ handling */
276INLINE void OPL_STATUS_RESET(FM_OPL *OPL,int flag)
277{
278 /* reset status flag */
279 OPL->status &=~flag;
280 if((OPL->status & 0x80))
281 {
282 if (!(OPL->status & OPL->statusmask) )
283 {
284 OPL->status &= 0x7f;
285 /* callback user interrupt handler (IRQ is ON to OFF) */
286 if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,0);
287 }
288 }
289}
290
291/* IRQ mask set */
292INLINE void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag)
293{
294 OPL->statusmask = flag;
295 /* IRQ handling check */
296 OPL_STATUS_SET(OPL,0);
297 OPL_STATUS_RESET(OPL,0);
298}
299
300/* ----- key on ----- */
301INLINE void OPL_KEYON(OPL_SLOT *SLOT)
302{
303 /* sin wave restart */
304 SLOT->Cnt = 0;
305 /* set attack */
306 SLOT->evm = ENV_MOD_AR;
307 SLOT->evs = SLOT->evsa;
308 SLOT->evc = EG_AST;
309 SLOT->eve = EG_AED;
310}
311/* ----- key off ----- */
312INLINE void OPL_KEYOFF(OPL_SLOT *SLOT)
313{
314 if( SLOT->evm > ENV_MOD_RR)
315 {
316 /* set envelope counter from envleope output */
317 SLOT->evm = ENV_MOD_RR;
318 if( !(SLOT->evc&EG_DST) )
319 //SLOT->evc = (ENV_CURVE[SLOT->evc>>ENV_BITS]<<ENV_BITS) + EG_DST;
320 SLOT->evc = EG_DST;
321 SLOT->eve = EG_DED;
322 SLOT->evs = SLOT->evsr;
323 }
324}
325
326/* ---------- calcrate Envelope Generator & Phase Generator ---------- */
327/* return : envelope output */
328INLINE UINT32 OPL_CALC_SLOT( OPL_SLOT *SLOT )
329{
330 /* calcrate envelope generator */
331 if( (SLOT->evc+=SLOT->evs) >= SLOT->eve )
332 {
333 switch( SLOT->evm ){
334 case ENV_MOD_AR: /* ATTACK -> DECAY1 */
335 /* next DR */
336 SLOT->evm = ENV_MOD_DR;
337 SLOT->evc = EG_DST;
338 SLOT->eve = SLOT->SL;
339 SLOT->evs = SLOT->evsd;
340 break;
341 case ENV_MOD_DR: /* DECAY -> SL or RR */
342 SLOT->evc = SLOT->SL;
343 SLOT->eve = EG_DED;
344 if(SLOT->eg_typ)
345 {
346 SLOT->evs = 0;
347 }
348 else
349 {
350 SLOT->evm = ENV_MOD_RR;
351 SLOT->evs = SLOT->evsr;
352 }
353 break;
354 case ENV_MOD_RR: /* RR -> OFF */
355 SLOT->evc = EG_OFF;
356 SLOT->eve = EG_OFF+1;
357 SLOT->evs = 0;
358 break;
359 }
360 }
361 /* calcrate envelope */
362 return SLOT->TLL+ENV_CURVE[SLOT->evc>>ENV_BITS]+(SLOT->ams ? ams : 0);
363}
364
c11e80e2
SW		 365/* set algorithm connection */
366static void set_algorithm( OPL_CH *CH)
85571bc7
FB		 367{
368 INT32 *carrier = &outd[0];
369 CH->connect1 = CH->CON ? carrier : &feedback2;
370 CH->connect2 = carrier;
371}
372
373/* ---------- frequency counter for operater update ---------- */
374INLINE void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT)
375{
376 int ksr;
377
378 /* frequency step counter */
379 SLOT->Incr = CH->fc * SLOT->mul;
380 ksr = CH->kcode >> SLOT->KSR;
381
382 if( SLOT->ksr != ksr )
383 {
384 SLOT->ksr = ksr;
385 /* attack , decay rate recalcration */
386 SLOT->evsa = SLOT->AR[ksr];
387 SLOT->evsd = SLOT->DR[ksr];
388 SLOT->evsr = SLOT->RR[ksr];
389 }
390 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
391}
392
393/* set multi,am,vib,EG-TYP,KSR,mul */
394INLINE void set_mul(FM_OPL *OPL,int slot,int v)
395{
396 OPL_CH *CH = &OPL->P_CH[slot/2];
397 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
398
399 SLOT->mul = MUL_TABLE[v&0x0f];
400 SLOT->KSR = (v&0x10) ? 0 : 2;
401 SLOT->eg_typ = (v&0x20)>>5;
402 SLOT->vib = (v&0x40);
403 SLOT->ams = (v&0x80);
404 CALC_FCSLOT(CH,SLOT);
405}
406
407/* set ksl & tl */
408INLINE void set_ksl_tl(FM_OPL *OPL,int slot,int v)
409{
410 OPL_CH *CH = &OPL->P_CH[slot/2];
411 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
412 int ksl = v>>6; /* 0 / 1.5 / 3 / 6 db/OCT */
413
414 SLOT->ksl = ksl ? 3-ksl : 31;
415 SLOT->TL = (v&0x3f)*(0.75/EG_STEP); /* 0.75db step */
416
417 if( !(OPL->mode&0x80) )
418 { /* not CSM latch total level */
419 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
420 }
421}
422
423/* set attack rate & decay rate */
424INLINE void set_ar_dr(FM_OPL *OPL,int slot,int v)
425{
426 OPL_CH *CH = &OPL->P_CH[slot/2];
427 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
428 int ar = v>>4;
429 int dr = v&0x0f;
430
431 SLOT->AR = ar ? &OPL->AR_TABLE[ar<<2] : RATE_0;
432 SLOT->evsa = SLOT->AR[SLOT->ksr];
433 if( SLOT->evm == ENV_MOD_AR ) SLOT->evs = SLOT->evsa;
434
435 SLOT->DR = dr ? &OPL->DR_TABLE[dr<<2] : RATE_0;
436 SLOT->evsd = SLOT->DR[SLOT->ksr];
437 if( SLOT->evm == ENV_MOD_DR ) SLOT->evs = SLOT->evsd;
438}
439
440/* set sustain level & release rate */
441INLINE void set_sl_rr(FM_OPL *OPL,int slot,int v)
442{
443 OPL_CH *CH = &OPL->P_CH[slot/2];
444 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
445 int sl = v>>4;
446 int rr = v & 0x0f;
447
448 SLOT->SL = SL_TABLE[sl];
449 if( SLOT->evm == ENV_MOD_DR ) SLOT->eve = SLOT->SL;
450 SLOT->RR = &OPL->DR_TABLE[rr<<2];
451 SLOT->evsr = SLOT->RR[SLOT->ksr];
452 if( SLOT->evm == ENV_MOD_RR ) SLOT->evs = SLOT->evsr;
453}
454
455/* operator output calcrator */
456#define OP_OUT(slot,env,con) slot->wavetable[((slot->Cnt+con)/(0x1000000/SIN_ENT))&(SIN_ENT-1)][env]
457/* ---------- calcrate one of channel ---------- */
458INLINE void OPL_CALC_CH( OPL_CH *CH )
459{
460 UINT32 env_out;
461 OPL_SLOT *SLOT;
462
463 feedback2 = 0;
464 /* SLOT 1 */
465 SLOT = &CH->SLOT[SLOT1];
466 env_out=OPL_CALC_SLOT(SLOT);
467 if( env_out < EG_ENT-1 )
468 {
469 /* PG */
470 if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
471 else SLOT->Cnt += SLOT->Incr;
472 /* connectoion */
473 if(CH->FB)
474 {
475 int feedback1 = (CH->op1_out[0]+CH->op1_out[1])>>CH->FB;
476 CH->op1_out[1] = CH->op1_out[0];
477 *CH->connect1 += CH->op1_out[0] = OP_OUT(SLOT,env_out,feedback1);
478 }
479 else
480 {
481 *CH->connect1 += OP_OUT(SLOT,env_out,0);
482 }
483 }else
484 {
485 CH->op1_out[1] = CH->op1_out[0];
486 CH->op1_out[0] = 0;
487 }
488 /* SLOT 2 */
489 SLOT = &CH->SLOT[SLOT2];
490 env_out=OPL_CALC_SLOT(SLOT);
491 if( env_out < EG_ENT-1 )
492 {
493 /* PG */
494 if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
495 else SLOT->Cnt += SLOT->Incr;
496 /* connectoion */
497 outd[0] += OP_OUT(SLOT,env_out, feedback2);
498 }
499}
500
c11e80e2 501/* ---------- calcrate rhythm block ---------- */
85571bc7
FB		 502#define WHITE_NOISE_db 6.0
503INLINE void OPL_CALC_RH( OPL_CH *CH )
504{
505 UINT32 env_tam,env_sd,env_top,env_hh;
506 int whitenoise = (rand()&1)*(WHITE_NOISE_db/EG_STEP);
507 INT32 tone8;
508
509 OPL_SLOT *SLOT;
510 int env_out;
511
512 /* BD : same as FM serial mode and output level is large */
513 feedback2 = 0;
514 /* SLOT 1 */
515 SLOT = &CH[6].SLOT[SLOT1];
516 env_out=OPL_CALC_SLOT(SLOT);
517 if( env_out < EG_ENT-1 )
518 {
519 /* PG */
520 if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
521 else SLOT->Cnt += SLOT->Incr;
522 /* connectoion */
523 if(CH[6].FB)
524 {
525 int feedback1 = (CH[6].op1_out[0]+CH[6].op1_out[1])>>CH[6].FB;
526 CH[6].op1_out[1] = CH[6].op1_out[0];
527 feedback2 = CH[6].op1_out[0] = OP_OUT(SLOT,env_out,feedback1);
528 }
529 else
530 {
531 feedback2 = OP_OUT(SLOT,env_out,0);
532 }
533 }else
534 {
535 feedback2 = 0;
536 CH[6].op1_out[1] = CH[6].op1_out[0];
537 CH[6].op1_out[0] = 0;
538 }
539 /* SLOT 2 */
540 SLOT = &CH[6].SLOT[SLOT2];
541 env_out=OPL_CALC_SLOT(SLOT);
542 if( env_out < EG_ENT-1 )
543 {
544 /* PG */
545 if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
546 else SLOT->Cnt += SLOT->Incr;
547 /* connectoion */
548 outd[0] += OP_OUT(SLOT,env_out, feedback2)*2;
549 }
550
551 // SD (17) = mul14[fnum7] + white noise
552 // TAM (15) = mul15[fnum8]
553 // TOP (18) = fnum6(mul18[fnum8]+whitenoise)
554 // HH (14) = fnum7(mul18[fnum8]+whitenoise) + white noise
555 env_sd =OPL_CALC_SLOT(SLOT7_2) + whitenoise;
556 env_tam=OPL_CALC_SLOT(SLOT8_1);
557 env_top=OPL_CALC_SLOT(SLOT8_2);
558 env_hh =OPL_CALC_SLOT(SLOT7_1) + whitenoise;
559
560 /* PG */
561 if(SLOT7_1->vib) SLOT7_1->Cnt += (2*SLOT7_1->Incr*vib/VIB_RATE);
562 else SLOT7_1->Cnt += 2*SLOT7_1->Incr;
563 if(SLOT7_2->vib) SLOT7_2->Cnt += ((CH[7].fc*8)*vib/VIB_RATE);
564 else SLOT7_2->Cnt += (CH[7].fc*8);
565 if(SLOT8_1->vib) SLOT8_1->Cnt += (SLOT8_1->Incr*vib/VIB_RATE);
566 else SLOT8_1->Cnt += SLOT8_1->Incr;
567 if(SLOT8_2->vib) SLOT8_2->Cnt += ((CH[8].fc*48)*vib/VIB_RATE);
568 else SLOT8_2->Cnt += (CH[8].fc*48);
569
570 tone8 = OP_OUT(SLOT8_2,whitenoise,0 );
571
572 /* SD */
573 if( env_sd < EG_ENT-1 )
574 outd[0] += OP_OUT(SLOT7_1,env_sd, 0)*8;
575 /* TAM */
576 if( env_tam < EG_ENT-1 )
577 outd[0] += OP_OUT(SLOT8_1,env_tam, 0)*2;
578 /* TOP-CY */
579 if( env_top < EG_ENT-1 )
580 outd[0] += OP_OUT(SLOT7_2,env_top,tone8)*2;
581 /* HH */
582 if( env_hh < EG_ENT-1 )
583 outd[0] += OP_OUT(SLOT7_2,env_hh,tone8)*2;
584}
585
586/* ----------- initialize time tabls ----------- */
587static void init_timetables( FM_OPL *OPL , int ARRATE , int DRRATE )
588{
589 int i;
590 double rate;
591
592 /* make attack rate & decay rate tables */
593 for (i = 0;i < 4;i++) OPL->AR_TABLE[i] = OPL->DR_TABLE[i] = 0;
594 for (i = 4;i <= 60;i++){
595 rate = OPL->freqbase; /* frequency rate */
596 if( i < 60 ) rate *= 1.0+(i&3)*0.25; /* b0-1 : x1 , x1.25 , x1.5 , x1.75 */
597 rate *= 1<<((i>>2)-1); /* b2-5 : shift bit */
598 rate *= (double)(EG_ENT<<ENV_BITS);
599 OPL->AR_TABLE[i] = rate / ARRATE;
600 OPL->DR_TABLE[i] = rate / DRRATE;
601 }
913895ab 602 for (i = 60; i < ARRAY_SIZE(OPL->AR_TABLE); i++)
85571bc7
FB		 603 {
604 OPL->AR_TABLE[i] = EG_AED-1;
605 OPL->DR_TABLE[i] = OPL->DR_TABLE[60];
606 }
607#if 0
608 for (i = 0;i < 64 ;i++){ /* make for overflow area */
b2bedb21 609 LOG(LOG_WAR, ("rate %2d , ar %f ms , dr %f ms\n", i,
85571bc7
FB		 610 ((double)(EG_ENT<<ENV_BITS) / OPL->AR_TABLE[i]) * (1000.0 / OPL->rate),
611 ((double)(EG_ENT<<ENV_BITS) / OPL->DR_TABLE[i]) * (1000.0 / OPL->rate) ));
612 }
613#endif
614}
615
616/* ---------- generic table initialize ---------- */
617static int OPLOpenTable( void )
618{
619 int s,t;
620 double rate;
621 int i,j;
622 double pom;
623
624 /* allocate dynamic tables */
809c130c
AL		 625 if( (TL_TABLE = malloc(TL_MAX*2*sizeof(INT32))) == NULL)
626 return 0;
627 if( (SIN_TABLE = malloc(SIN_ENT*4 *sizeof(INT32 *))) == NULL)
628 {
629 free(TL_TABLE);
630 return 0;
631 }
632 if( (AMS_TABLE = malloc(AMS_ENT*2 *sizeof(INT32))) == NULL)
633 {
634 free(TL_TABLE);
635 free(SIN_TABLE);
636 return 0;
637 }
638 if( (VIB_TABLE = malloc(VIB_ENT*2 *sizeof(INT32))) == NULL)
639 {
640 free(TL_TABLE);
641 free(SIN_TABLE);
642 free(AMS_TABLE);
643 return 0;
644 }
85571bc7
FB		 645 /* make total level table */
646 for (t = 0;t < EG_ENT-1 ;t++){
647 rate = ((1<<TL_BITS)-1)/pow(10,EG_STEP*t/20); /* dB -> voltage */
648 TL_TABLE[ t] = (int)rate;
649 TL_TABLE[TL_MAX+t] = -TL_TABLE[t];
650/* LOG(LOG_INF,("TotalLevel(%3d) = %x\n",t,TL_TABLE[t]));*/
651 }
652 /* fill volume off area */
653 for ( t = EG_ENT-1; t < TL_MAX ;t++){
654 TL_TABLE[t] = TL_TABLE[TL_MAX+t] = 0;
655 }
656
657 /* make sinwave table (total level offet) */
658 /* degree 0 = degree 180 = off */
659 SIN_TABLE[0] = SIN_TABLE[SIN_ENT/2] = &TL_TABLE[EG_ENT-1];
660 for (s = 1;s <= SIN_ENT/4;s++){
661 pom = sin(2*PI*s/SIN_ENT); /* sin */
662 pom = 20*log10(1/pom); /* decibel */
663 j = pom / EG_STEP; /* TL_TABLE steps */
664
665 /* degree 0 - 90 , degree 180 - 90 : plus section */
666 SIN_TABLE[ s] = SIN_TABLE[SIN_ENT/2-s] = &TL_TABLE[j];
667 /* degree 180 - 270 , degree 360 - 270 : minus section */
668 SIN_TABLE[SIN_ENT/2+s] = SIN_TABLE[SIN_ENT -s] = &TL_TABLE[TL_MAX+j];
669/* LOG(LOG_INF,("sin(%3d) = %f:%f db\n",s,pom,(double)j * EG_STEP));*/
670 }
671 for (s = 0;s < SIN_ENT;s++)
672 {
673 SIN_TABLE[SIN_ENT*1+s] = s<(SIN_ENT/2) ? SIN_TABLE[s] : &TL_TABLE[EG_ENT];
674 SIN_TABLE[SIN_ENT*2+s] = SIN_TABLE[s % (SIN_ENT/2)];
675 SIN_TABLE[SIN_ENT*3+s] = (s/(SIN_ENT/4))&1 ? &TL_TABLE[EG_ENT] : SIN_TABLE[SIN_ENT*2+s];
676 }
677
678 /* envelope counter -> envelope output table */
679 for (i=0; i<EG_ENT; i++)
680 {
681 /* ATTACK curve */
682 pom = pow( ((double)(EG_ENT-1-i)/EG_ENT) , 8 ) * EG_ENT;
683 /* if( pom >= EG_ENT ) pom = EG_ENT-1; */
684 ENV_CURVE[i] = (int)pom;
685 /* DECAY ,RELEASE curve */
686 ENV_CURVE[(EG_DST>>ENV_BITS)+i]= i;
687 }
688 /* off */
689 ENV_CURVE[EG_OFF>>ENV_BITS]= EG_ENT-1;
690 /* make LFO ams table */
691 for (i=0; i<AMS_ENT; i++)
692 {
693 pom = (1.0+sin(2*PI*i/AMS_ENT))/2; /* sin */
694 AMS_TABLE[i] = (1.0/EG_STEP)*pom; /* 1dB */
695 AMS_TABLE[AMS_ENT+i] = (4.8/EG_STEP)*pom; /* 4.8dB */
696 }
697 /* make LFO vibrate table */
698 for (i=0; i<VIB_ENT; i++)
699 {
700 /* 100cent = 1seminote = 6% ?? */
701 pom = (double)VIB_RATE*0.06*sin(2*PI*i/VIB_ENT); /* +-100sect step */
702 VIB_TABLE[i] = VIB_RATE + (pom*0.07); /* +- 7cent */
703 VIB_TABLE[VIB_ENT+i] = VIB_RATE + (pom*0.14); /* +-14cent */
704 /* LOG(LOG_INF,("vib %d=%d\n",i,VIB_TABLE[VIB_ENT+i])); */
705 }
706 return 1;
707}
708
709
710static void OPLCloseTable( void )
711{
712 free(TL_TABLE);
713 free(SIN_TABLE);
714 free(AMS_TABLE);
715 free(VIB_TABLE);
716}
717
66a0a2cb 718/* CSM Key Control */
85571bc7
FB		 719INLINE void CSMKeyControll(OPL_CH *CH)
720{
721 OPL_SLOT *slot1 = &CH->SLOT[SLOT1];
722 OPL_SLOT *slot2 = &CH->SLOT[SLOT2];
723 /* all key off */
724 OPL_KEYOFF(slot1);
725 OPL_KEYOFF(slot2);
726 /* total level latch */
727 slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl);
728 slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl);
729 /* key on */
730 CH->op1_out[0] = CH->op1_out[1] = 0;
731 OPL_KEYON(slot1);
732 OPL_KEYON(slot2);
733}
734
735/* ---------- opl initialize ---------- */
31de8314 736static void OPL_initialize(FM_OPL *OPL)
85571bc7
FB		 737{
738 int fn;
739
740 /* frequency base */
741 OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / OPL->rate) / 72 : 0;
742 /* Timer base time */
743 OPL->TimerBase = 1.0/((double)OPL->clock / 72.0 );
744 /* make time tables */
745 init_timetables( OPL , OPL_ARRATE , OPL_DRRATE );
746 /* make fnumber -> increment counter table */
747 for( fn=0 ; fn < 1024 ; fn++ )
748 {
749 OPL->FN_TABLE[fn] = OPL->freqbase * fn * FREQ_RATE * (1<<7) / 2;
750 }
751 /* LFO freq.table */
752 OPL->amsIncr = OPL->rate ? (double)AMS_ENT*(1<<AMS_SHIFT) / OPL->rate * 3.7 * ((double)OPL->clock/3600000) : 0;
753 OPL->vibIncr = OPL->rate ? (double)VIB_ENT*(1<<VIB_SHIFT) / OPL->rate * 6.4 * ((double)OPL->clock/3600000) : 0;
754}
755
756/* ---------- write a OPL registers ---------- */
757static void OPLWriteReg(FM_OPL *OPL, int r, int v)
758{
759 OPL_CH *CH;
760 int slot;
761 int block_fnum;
762
763 switch(r&0xe0)
764 {
66a0a2cb 765 case 0x00: /* 00-1f:control */
85571bc7
FB		 766 switch(r&0x1f)
767 {
768 case 0x01:
769 /* wave selector enable */
770 if(OPL->type&OPL_TYPE_WAVESEL)
771 {
772 OPL->wavesel = v&0x20;
773 if(!OPL->wavesel)
774 {
775 /* preset compatible mode */
776 int c;
777 for(c=0;c<OPL->max_ch;c++)
778 {
779 OPL->P_CH[c].SLOT[SLOT1].wavetable = &SIN_TABLE[0];
780 OPL->P_CH[c].SLOT[SLOT2].wavetable = &SIN_TABLE[0];
781 }
782 }
783 }
784 return;
785 case 0x02: /* Timer 1 */
786 OPL->T[0] = (256-v)*4;
787 break;
788 case 0x03: /* Timer 2 */
789 OPL->T[1] = (256-v)*16;
790 return;
791 case 0x04: /* IRQ clear / mask and Timer enable */
792 if(v&0x80)
793 { /* IRQ flag clear */
794 OPL_STATUS_RESET(OPL,0x7f);
795 }
796 else
797 { /* set IRQ mask ,timer enable*/
798 UINT8 st1 = v&1;
799 UINT8 st2 = (v>>1)&1;
800 /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */
801 OPL_STATUS_RESET(OPL,v&0x78);
802 OPL_STATUSMASK_SET(OPL,((~v)&0x78)|0x01);
803 /* timer 2 */
804 if(OPL->st[1] != st2)
805 {
806 double interval = st2 ? (double)OPL->T[1]*OPL->TimerBase : 0.0;
807 OPL->st[1] = st2;
808 if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+1,interval);
809 }
810 /* timer 1 */
811 if(OPL->st[0] != st1)
812 {
813 double interval = st1 ? (double)OPL->T[0]*OPL->TimerBase : 0.0;
814 OPL->st[0] = st1;
815 if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+0,interval);
816 }
817 }
818 return;
819#if BUILD_Y8950
820 case 0x06: /* Key Board OUT */
821 if(OPL->type&OPL_TYPE_KEYBOARD)
822 {
823 if(OPL->keyboardhandler_w)
824 OPL->keyboardhandler_w(OPL->keyboard_param,v);
825 else
826 LOG(LOG_WAR,("OPL:write unmapped KEYBOARD port\n"));
827 }
828 return;
66a0a2cb 829 case 0x07: /* DELTA-T control : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
85571bc7
FB		 830 if(OPL->type&OPL_TYPE_ADPCM)
831 YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
832 return;
833 case 0x08: /* MODE,DELTA-T : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
834 OPL->mode = v;
835 v&=0x1f; /* for DELTA-T unit */
836 case 0x09: /* START ADD */
837 case 0x0a:
838 case 0x0b: /* STOP ADD */
839 case 0x0c:
840 case 0x0d: /* PRESCALE */
841 case 0x0e:
842 case 0x0f: /* ADPCM data */
843 case 0x10: /* DELTA-N */
844 case 0x11: /* DELTA-N */
845 case 0x12: /* EG-CTRL */
846 if(OPL->type&OPL_TYPE_ADPCM)
847 YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
848 return;
849#if 0
850 case 0x15: /* DAC data */
851 case 0x16:
852 case 0x17: /* SHIFT */
853 return;
854 case 0x18: /* I/O CTRL (Direction) */
855 if(OPL->type&OPL_TYPE_IO)
856 OPL->portDirection = v&0x0f;
857 return;
858 case 0x19: /* I/O DATA */
859 if(OPL->type&OPL_TYPE_IO)
860 {
861 OPL->portLatch = v;
862 if(OPL->porthandler_w)
863 OPL->porthandler_w(OPL->port_param,v&OPL->portDirection);
864 }
865 return;
866 case 0x1a: /* PCM data */
867 return;
868#endif
869#endif
870 }
871 break;
872 case 0x20: /* am,vib,ksr,eg type,mul */
873 slot = slot_array[r&0x1f];
874 if(slot == -1) return;
875 set_mul(OPL,slot,v);
876 return;
877 case 0x40:
878 slot = slot_array[r&0x1f];
879 if(slot == -1) return;
880 set_ksl_tl(OPL,slot,v);
881 return;
882 case 0x60:
883 slot = slot_array[r&0x1f];
884 if(slot == -1) return;
885 set_ar_dr(OPL,slot,v);
886 return;
887 case 0x80:
888 slot = slot_array[r&0x1f];
889 if(slot == -1) return;
890 set_sl_rr(OPL,slot,v);
891 return;
892 case 0xa0:
893 switch(r)
894 {
895 case 0xbd:
896 /* amsep,vibdep,r,bd,sd,tom,tc,hh */
897 {
c11e80e2 898 UINT8 rkey = OPL->rhythm^v;
85571bc7
FB		 899 OPL->ams_table = &AMS_TABLE[v&0x80 ? AMS_ENT : 0];
900 OPL->vib_table = &VIB_TABLE[v&0x40 ? VIB_ENT : 0];
c11e80e2
SW		 901 OPL->rhythm = v&0x3f;
902 if(OPL->rhythm&0x20)
85571bc7
FB		 903 {
904#if 0
c11e80e2 905 usrintf_showmessage("OPL Rhythm mode select");
85571bc7
FB		 906#endif
907 /* BD key on/off */
908 if(rkey&0x10)
909 {
910 if(v&0x10)
911 {
912 OPL->P_CH[6].op1_out[0] = OPL->P_CH[6].op1_out[1] = 0;
913 OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT1]);
914 OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT2]);
915 }
916 else
917 {
918 OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1]);
919 OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2]);
920 }
921 }
922 /* SD key on/off */
923 if(rkey&0x08)
924 {
925 if(v&0x08) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT2]);
926 else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2]);
927 }/* TAM key on/off */
928 if(rkey&0x04)
929 {
930 if(v&0x04) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT1]);
931 else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1]);
932 }
933 /* TOP-CY key on/off */
934 if(rkey&0x02)
935 {
936 if(v&0x02) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT2]);
937 else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2]);
938 }
939 /* HH key on/off */
940 if(rkey&0x01)
941 {
942 if(v&0x01) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT1]);
943 else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1]);
944 }
945 }
946 }
947 return;
948 }
949 /* keyon,block,fnum */
950 if( (r&0x0f) > 8) return;
951 CH = &OPL->P_CH[r&0x0f];
952 if(!(r&0x10))
953 { /* a0-a8 */
954 block_fnum = (CH->block_fnum&0x1f00) | v;
955 }
956 else
957 { /* b0-b8 */
958 int keyon = (v>>5)&1;
959 block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff);
960 if(CH->keyon != keyon)
961 {
962 if( (CH->keyon=keyon) )
963 {
964 CH->op1_out[0] = CH->op1_out[1] = 0;
965 OPL_KEYON(&CH->SLOT[SLOT1]);
966 OPL_KEYON(&CH->SLOT[SLOT2]);
967 }
968 else
969 {
970 OPL_KEYOFF(&CH->SLOT[SLOT1]);
971 OPL_KEYOFF(&CH->SLOT[SLOT2]);
972 }
973 }
974 }
975 /* update */
976 if(CH->block_fnum != block_fnum)
977 {
978 int blockRv = 7-(block_fnum>>10);
979 int fnum = block_fnum&0x3ff;
980 CH->block_fnum = block_fnum;
981
982 CH->ksl_base = KSL_TABLE[block_fnum>>6];
983 CH->fc = OPL->FN_TABLE[fnum]>>blockRv;
984 CH->kcode = CH->block_fnum>>9;
985 if( (OPL->mode&0x40) && CH->block_fnum&0x100) CH->kcode |=1;
986 CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
987 CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
988 }
989 return;
990 case 0xc0:
991 /* FB,C */
992 if( (r&0x0f) > 8) return;
993 CH = &OPL->P_CH[r&0x0f];
994 {
995 int feedback = (v>>1)&7;
996 CH->FB = feedback ? (8+1) - feedback : 0;
997 CH->CON = v&1;
c11e80e2 998 set_algorithm(CH);
85571bc7
FB		 999 }
1000 return;
1001 case 0xe0: /* wave type */
1002 slot = slot_array[r&0x1f];
1003 if(slot == -1) return;
1004 CH = &OPL->P_CH[slot/2];
1005 if(OPL->wavesel)
1006 {
1007 /* LOG(LOG_INF,("OPL SLOT %d wave select %d\n",slot,v&3)); */
1008 CH->SLOT[slot&1].wavetable = &SIN_TABLE[(v&0x03)*SIN_ENT];
1009 }
1010 return;
1011 }
1012}
1013
1014/* lock/unlock for common table */
1015static int OPL_LockTable(void)
1016{
1017 num_lock++;
1018 if(num_lock>1) return 0;
1019 /* first time */
1020 cur_chip = NULL;
1021 /* allocate total level table (128kb space) */
1022 if( !OPLOpenTable() )
1023 {
1024 num_lock--;
1025 return -1;
1026 }
1027 return 0;
1028}
1029
1030static void OPL_UnLockTable(void)
1031{
1032 if(num_lock) num_lock--;
1033 if(num_lock) return;
1034 /* last time */
1035 cur_chip = NULL;
1036 OPLCloseTable();
1037}
1038
1039#if (BUILD_YM3812 || BUILD_YM3526)
1040/*******************************************************************************/
1041/* YM3812 local section */
1042/*******************************************************************************/
1043
1044/* ---------- update one of chip ----------- */
1045void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length)
1046{
1047 int i;
1048 int data;
1049 OPLSAMPLE *buf = buffer;
1050 UINT32 amsCnt = OPL->amsCnt;
1051 UINT32 vibCnt = OPL->vibCnt;
c11e80e2 1052 UINT8 rhythm = OPL->rhythm&0x20;
85571bc7
FB		 1053 OPL_CH *CH,*R_CH;
1054
1055 if( (void *)OPL != cur_chip ){
1056 cur_chip = (void *)OPL;
1057 /* channel pointers */
1058 S_CH = OPL->P_CH;
1059 E_CH = &S_CH[9];
c11e80e2 1060 /* rhythm slot */
85571bc7
FB		 1061 SLOT7_1 = &S_CH[7].SLOT[SLOT1];
1062 SLOT7_2 = &S_CH[7].SLOT[SLOT2];
1063 SLOT8_1 = &S_CH[8].SLOT[SLOT1];
1064 SLOT8_2 = &S_CH[8].SLOT[SLOT2];
1065 /* LFO state */
1066 amsIncr = OPL->amsIncr;
1067 vibIncr = OPL->vibIncr;
1068 ams_table = OPL->ams_table;
1069 vib_table = OPL->vib_table;
1070 }
c11e80e2 1071 R_CH = rhythm ? &S_CH[6] : E_CH;
85571bc7
FB		 1072 for( i=0; i < length ; i++ )
1073 {
1074 /* channel A channel B channel C */
1075 /* LFO */
1076 ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT];
1077 vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT];
1078 outd[0] = 0;
1079 /* FM part */
1080 for(CH=S_CH ; CH < R_CH ; CH++)
1081 OPL_CALC_CH(CH);
1082 /* Rythn part */
c11e80e2 1083 if(rhythm)
85571bc7
FB		 1084 OPL_CALC_RH(S_CH);
1085 /* limit check */
1086 data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT );
1087 /* store to sound buffer */
1088 buf[i] = data >> OPL_OUTSB;
1089 }
1090
1091 OPL->amsCnt = amsCnt;
1092 OPL->vibCnt = vibCnt;
1093#ifdef OPL_OUTPUT_LOG
1094 if(opl_dbg_fp)
1095 {
1096 for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++)
1097 if( opl_dbg_opl[opl_dbg_chip] == OPL) break;
1098 fprintf(opl_dbg_fp,"%c%c%c",0x20+opl_dbg_chip,length&0xff,length/256);
1099 }
1100#endif
1101}
1102#endif /* (BUILD_YM3812 || BUILD_YM3526) */
1103
1104#if BUILD_Y8950
1105
1106void Y8950UpdateOne(FM_OPL *OPL, INT16 *buffer, int length)
1107{
1108 int i;
1109 int data;
1110 OPLSAMPLE *buf = buffer;
1111 UINT32 amsCnt = OPL->amsCnt;
1112 UINT32 vibCnt = OPL->vibCnt;
c11e80e2 1113 UINT8 rhythm = OPL->rhythm&0x20;
85571bc7
FB		 1114 OPL_CH *CH,*R_CH;
1115 YM_DELTAT *DELTAT = OPL->deltat;
1116
1117 /* setup DELTA-T unit */
1118 YM_DELTAT_DECODE_PRESET(DELTAT);
1119
1120 if( (void *)OPL != cur_chip ){
1121 cur_chip = (void *)OPL;
1122 /* channel pointers */
1123 S_CH = OPL->P_CH;
1124 E_CH = &S_CH[9];
c11e80e2 1125 /* rhythm slot */
85571bc7
FB		 1126 SLOT7_1 = &S_CH[7].SLOT[SLOT1];
1127 SLOT7_2 = &S_CH[7].SLOT[SLOT2];
1128 SLOT8_1 = &S_CH[8].SLOT[SLOT1];
1129 SLOT8_2 = &S_CH[8].SLOT[SLOT2];
1130 /* LFO state */
1131 amsIncr = OPL->amsIncr;
1132 vibIncr = OPL->vibIncr;
1133 ams_table = OPL->ams_table;
1134 vib_table = OPL->vib_table;
1135 }
c11e80e2 1136 R_CH = rhythm ? &S_CH[6] : E_CH;
85571bc7
FB		 1137 for( i=0; i < length ; i++ )
1138 {
1139 /* channel A channel B channel C */
1140 /* LFO */
1141 ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT];
1142 vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT];
1143 outd[0] = 0;
1144 /* deltaT ADPCM */
1145 if( DELTAT->portstate )
1146 YM_DELTAT_ADPCM_CALC(DELTAT);
1147 /* FM part */
1148 for(CH=S_CH ; CH < R_CH ; CH++)
1149 OPL_CALC_CH(CH);
1150 /* Rythn part */
c11e80e2 1151 if(rhythm)
85571bc7
FB		 1152 OPL_CALC_RH(S_CH);
1153 /* limit check */
1154 data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT );
1155 /* store to sound buffer */
1156 buf[i] = data >> OPL_OUTSB;
1157 }
1158 OPL->amsCnt = amsCnt;
1159 OPL->vibCnt = vibCnt;
1160 /* deltaT START flag */
1161 if( !DELTAT->portstate )
1162 OPL->status &= 0xfe;
1163}
1164#endif
1165
1166/* ---------- reset one of chip ---------- */
1167void OPLResetChip(FM_OPL *OPL)
1168{
1169 int c,s;
1170 int i;
1171
1172 /* reset chip */
1173 OPL->mode = 0; /* normal mode */
1174 OPL_STATUS_RESET(OPL,0x7f);
1175 /* reset with register write */
1176 OPLWriteReg(OPL,0x01,0); /* wabesel disable */
1177 OPLWriteReg(OPL,0x02,0); /* Timer1 */
1178 OPLWriteReg(OPL,0x03,0); /* Timer2 */
1179 OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */
1180 for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0);
1181 /* reset OPerator paramater */
1182 for( c = 0 ; c < OPL->max_ch ; c++ )
1183 {
1184 OPL_CH *CH = &OPL->P_CH[c];
1185 /* OPL->P_CH[c].PAN = OPN_CENTER; */
1186 for(s = 0 ; s < 2 ; s++ )
1187 {
1188 /* wave table */
1189 CH->SLOT[s].wavetable = &SIN_TABLE[0];
1190 /* CH->SLOT[s].evm = ENV_MOD_RR; */
1191 CH->SLOT[s].evc = EG_OFF;
1192 CH->SLOT[s].eve = EG_OFF+1;
1193 CH->SLOT[s].evs = 0;
1194 }
1195 }
1196#if BUILD_Y8950
1197 if(OPL->type&OPL_TYPE_ADPCM)
1198 {
1199 YM_DELTAT *DELTAT = OPL->deltat;
1200
1201 DELTAT->freqbase = OPL->freqbase;
1202 DELTAT->output_pointer = outd;
1203 DELTAT->portshift = 5;
1204 DELTAT->output_range = DELTAT_MIXING_LEVEL<<TL_BITS;
1205 YM_DELTAT_ADPCM_Reset(DELTAT,0);
1206 }
1207#endif
1208}
1209
1210/* ---------- Create one of vietual YM3812 ---------- */
1211/* 'rate' is sampling rate and 'bufsiz' is the size of the */
1212FM_OPL *OPLCreate(int type, int clock, int rate)
1213{
1214 char *ptr;
1215 FM_OPL *OPL;
1216 int state_size;
1217 int max_ch = 9; /* normaly 9 channels */
1218
1219 if( OPL_LockTable() ==-1) return NULL;
1220 /* allocate OPL state space */
1221 state_size = sizeof(FM_OPL);
1222 state_size += sizeof(OPL_CH)*max_ch;
1223#if BUILD_Y8950
1224 if(type&OPL_TYPE_ADPCM) state_size+= sizeof(YM_DELTAT);
1225#endif
1226 /* allocate memory block */
809c130c
AL		 1227 ptr = malloc(state_size);
1228 if(ptr==NULL) return NULL;
85571bc7
FB		 1229 /* clear */
1230 memset(ptr,0,state_size);
1231 OPL = (FM_OPL *)ptr; ptr+=sizeof(FM_OPL);
1232 OPL->P_CH = (OPL_CH *)ptr; ptr+=sizeof(OPL_CH)*max_ch;
1233#if BUILD_Y8950
1234 if(type&OPL_TYPE_ADPCM) OPL->deltat = (YM_DELTAT *)ptr; ptr+=sizeof(YM_DELTAT);
1235#endif
1236 /* set channel state pointer */
1237 OPL->type = type;
1238 OPL->clock = clock;
1239 OPL->rate = rate;
1240 OPL->max_ch = max_ch;
1241 /* init grobal tables */
31de8314 1242 OPL_initialize(OPL);
85571bc7
FB		 1243 /* reset chip */
1244 OPLResetChip(OPL);
1245#ifdef OPL_OUTPUT_LOG
1246 if(!opl_dbg_fp)
1247 {
1248 opl_dbg_fp = fopen("opllog.opl","wb");
1249 opl_dbg_maxchip = 0;
1250 }
1251 if(opl_dbg_fp)
1252 {
1253 opl_dbg_opl[opl_dbg_maxchip] = OPL;
1254 fprintf(opl_dbg_fp,"%c%c%c%c%c%c",0x00+opl_dbg_maxchip,
1255 type,
1256 clock&0xff,
1257 (clock/0x100)&0xff,
1258 (clock/0x10000)&0xff,
1259 (clock/0x1000000)&0xff);
1260 opl_dbg_maxchip++;
1261 }
1262#endif
1263 return OPL;
1264}
1265
1266/* ---------- Destroy one of vietual YM3812 ---------- */
1267void OPLDestroy(FM_OPL *OPL)
1268{
1269#ifdef OPL_OUTPUT_LOG
1270 if(opl_dbg_fp)
1271 {
1272 fclose(opl_dbg_fp);
1273 opl_dbg_fp = NULL;
1274 }
1275#endif
1276 OPL_UnLockTable();
1277 free(OPL);
1278}
1279
1280/* ---------- Option handlers ---------- */
1281
1282void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset)
1283{
1284 OPL->TimerHandler = TimerHandler;
1285 OPL->TimerParam = channelOffset;
1286}
1287void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,int param)
1288{
1289 OPL->IRQHandler = IRQHandler;
1290 OPL->IRQParam = param;
1291}
1292void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,int param)
1293{
1294 OPL->UpdateHandler = UpdateHandler;
1295 OPL->UpdateParam = param;
1296}
1297#if BUILD_Y8950
1298void OPLSetPortHandler(FM_OPL *OPL,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,int param)
1299{
1300 OPL->porthandler_w = PortHandler_w;
1301 OPL->porthandler_r = PortHandler_r;
1302 OPL->port_param = param;
1303}
1304
1305void OPLSetKeyboardHandler(FM_OPL *OPL,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,int param)
1306{
1307 OPL->keyboardhandler_w = KeyboardHandler_w;
1308 OPL->keyboardhandler_r = KeyboardHandler_r;
1309 OPL->keyboard_param = param;
1310}
1311#endif
1312/* ---------- YM3812 I/O interface ---------- */
1313int OPLWrite(FM_OPL *OPL,int a,int v)
1314{
1315 if( !(a&1) )
1316 { /* address port */
1317 OPL->address = v & 0xff;
1318 }
1319 else
1320 { /* data port */
1321 if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
1322#ifdef OPL_OUTPUT_LOG
1323 if(opl_dbg_fp)
1324 {
1325 for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++)
1326 if( opl_dbg_opl[opl_dbg_chip] == OPL) break;
1327 fprintf(opl_dbg_fp,"%c%c%c",0x10+opl_dbg_chip,OPL->address,v);
1328 }
1329#endif
1330 OPLWriteReg(OPL,OPL->address,v);
1331 }
1332 return OPL->status>>7;
1333}
1334
1335unsigned char OPLRead(FM_OPL *OPL,int a)
1336{
1337 if( !(a&1) )
1338 { /* status port */
1339 return OPL->status & (OPL->statusmask|0x80);
1340 }
1341 /* data port */
1342 switch(OPL->address)
1343 {
1344 case 0x05: /* KeyBoard IN */
1345 if(OPL->type&OPL_TYPE_KEYBOARD)
1346 {
1347 if(OPL->keyboardhandler_r)
1348 return OPL->keyboardhandler_r(OPL->keyboard_param);
c973a36d 1349 else {
85571bc7 1350 LOG(LOG_WAR,("OPL:read unmapped KEYBOARD port\n"));
c973a36d 1351 }
85571bc7
FB		 1352 }
1353 return 0;
1354#if 0
1355 case 0x0f: /* ADPCM-DATA */
1356 return 0;
1357#endif
1358 case 0x19: /* I/O DATA */
1359 if(OPL->type&OPL_TYPE_IO)
1360 {
1361 if(OPL->porthandler_r)
1362 return OPL->porthandler_r(OPL->port_param);
c973a36d 1363 else {
85571bc7 1364 LOG(LOG_WAR,("OPL:read unmapped I/O port\n"));
c973a36d 1365 }
85571bc7
FB		 1366 }
1367 return 0;
1368 case 0x1a: /* PCM-DATA */
1369 return 0;
1370 }
1371 return 0;
1372}
1373
1374int OPLTimerOver(FM_OPL *OPL,int c)
1375{
1376 if( c )
1377 { /* Timer B */
1378 OPL_STATUS_SET(OPL,0x20);
1379 }
1380 else
1381 { /* Timer A */
1382 OPL_STATUS_SET(OPL,0x40);
66a0a2cb 1383 /* CSM mode key,TL control */
85571bc7
FB		 1384 if( OPL->mode & 0x80 )
1385 { /* CSM mode total level latch and auto key on */
1386 int ch;
1387 if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
1388 for(ch=0;ch<9;ch++)
1389 CSMKeyControll( &OPL->P_CH[ch] );
1390 }
1391 }
1392 /* reload timer */
1393 if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+c,(double)OPL->T[c]*OPL->TimerBase);
1394 return OPL->status>>7;
1395}
Empty description
This page took 0.775117 seconds and 4 git commands to generate.