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Commit | Line | Data |
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5fafdf24 | 1 | /* |
0ff596d0 PB |
2 | * QEMU I2C bus interface. |
3 | * | |
4 | * Copyright (c) 2007 CodeSourcery. | |
5 | * Written by Paul Brook | |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the LGPL. |
0ff596d0 PB |
8 | */ |
9 | ||
0430891c | 10 | #include "qemu/osdep.h" |
0d09e41a | 11 | #include "hw/i2c/i2c.h" |
a27bd6c7 | 12 | #include "hw/qdev-properties.h" |
d6454270 | 13 | #include "migration/vmstate.h" |
0b8fa32f | 14 | #include "qemu/module.h" |
08bb9b34 | 15 | #include "trace.h" |
0ff596d0 | 16 | |
71ae65e5 IM |
17 | #define I2C_BROADCAST 0x00 |
18 | ||
3cb75a7c PB |
19 | static Property i2c_props[] = { |
20 | DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0), | |
21 | DEFINE_PROP_END_OF_LIST(), | |
22 | }; | |
23 | ||
0d936928 AL |
24 | static const TypeInfo i2c_bus_info = { |
25 | .name = TYPE_I2C_BUS, | |
26 | .parent = TYPE_BUS, | |
a5c82852 | 27 | .instance_size = sizeof(I2CBus), |
10c4c98a GH |
28 | }; |
29 | ||
44b1ff31 | 30 | static int i2c_bus_pre_save(void *opaque) |
c701b35b | 31 | { |
a5c82852 | 32 | I2CBus *bus = opaque; |
c701b35b | 33 | |
2293c27f FK |
34 | bus->saved_address = -1; |
35 | if (!QLIST_EMPTY(&bus->current_devs)) { | |
36 | if (!bus->broadcast) { | |
37 | bus->saved_address = QLIST_FIRST(&bus->current_devs)->elt->address; | |
71ae65e5 IM |
38 | } else { |
39 | bus->saved_address = I2C_BROADCAST; | |
2293c27f FK |
40 | } |
41 | } | |
44b1ff31 DDAG |
42 | |
43 | return 0; | |
c701b35b PB |
44 | } |
45 | ||
8d0eb050 JQ |
46 | static const VMStateDescription vmstate_i2c_bus = { |
47 | .name = "i2c_bus", | |
48 | .version_id = 1, | |
49 | .minimum_version_id = 1, | |
8d0eb050 | 50 | .pre_save = i2c_bus_pre_save, |
35d08458 | 51 | .fields = (VMStateField[]) { |
a5c82852 | 52 | VMSTATE_UINT8(saved_address, I2CBus), |
8d0eb050 JQ |
53 | VMSTATE_END_OF_LIST() |
54 | } | |
55 | }; | |
56 | ||
0ff596d0 | 57 | /* Create a new I2C bus. */ |
a5c82852 | 58 | I2CBus *i2c_init_bus(DeviceState *parent, const char *name) |
0ff596d0 | 59 | { |
a5c82852 | 60 | I2CBus *bus; |
0ff596d0 | 61 | |
fef7fbc9 | 62 | bus = I2C_BUS(qbus_create(TYPE_I2C_BUS, parent, name)); |
2293c27f | 63 | QLIST_INIT(&bus->current_devs); |
1df2c9a2 | 64 | vmstate_register(NULL, VMSTATE_INSTANCE_ID_ANY, &vmstate_i2c_bus, bus); |
0ff596d0 PB |
65 | return bus; |
66 | } | |
67 | ||
9e07bdf8 | 68 | void i2c_set_slave_address(I2CSlave *dev, uint8_t address) |
0ff596d0 PB |
69 | { |
70 | dev->address = address; | |
71 | } | |
72 | ||
73 | /* Return nonzero if bus is busy. */ | |
a5c82852 | 74 | int i2c_bus_busy(I2CBus *bus) |
0ff596d0 | 75 | { |
2293c27f | 76 | return !QLIST_EMPTY(&bus->current_devs); |
0ff596d0 PB |
77 | } |
78 | ||
d307c28c | 79 | /* TODO: Make this handle multiple masters. */ |
cc083d8a | 80 | /* |
d307c28c CM |
81 | * Start or continue an i2c transaction. When this is called for the |
82 | * first time or after an i2c_end_transfer(), if it returns an error | |
83 | * the bus transaction is terminated (or really never started). If | |
84 | * this is called after another i2c_start_transfer() without an | |
85 | * intervening i2c_end_transfer(), and it returns an error, the | |
86 | * transaction will not be terminated. The caller must do it. | |
87 | * | |
88 | * This corresponds with the way real hardware works. The SMBus | |
89 | * protocol uses a start transfer to switch from write to read mode | |
90 | * without releasing the bus. If that fails, the bus is still | |
91 | * in a transaction. | |
cc083d8a | 92 | */ |
a5c82852 | 93 | int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv) |
0ff596d0 | 94 | { |
0866aca1 | 95 | BusChild *kid; |
b5ea9327 | 96 | I2CSlaveClass *sc; |
2293c27f | 97 | I2CNode *node; |
d307c28c | 98 | bool bus_scanned = false; |
2293c27f | 99 | |
71ae65e5 | 100 | if (address == I2C_BROADCAST) { |
2293c27f FK |
101 | /* |
102 | * This is a broadcast, the current_devs will be all the devices of the | |
103 | * bus. | |
104 | */ | |
105 | bus->broadcast = true; | |
106 | } | |
0ff596d0 | 107 | |
0fa758c3 CM |
108 | /* |
109 | * If there are already devices in the list, that means we are in | |
110 | * the middle of a transaction and we shouldn't rescan the bus. | |
111 | * | |
112 | * This happens with any SMBus transaction, even on a pure I2C | |
113 | * device. The interface does a transaction start without | |
114 | * terminating the previous transaction. | |
115 | */ | |
116 | if (QLIST_EMPTY(&bus->current_devs)) { | |
117 | QTAILQ_FOREACH(kid, &bus->qbus.children, sibling) { | |
118 | DeviceState *qdev = kid->child; | |
119 | I2CSlave *candidate = I2C_SLAVE(qdev); | |
120 | if ((candidate->address == address) || (bus->broadcast)) { | |
121 | node = g_malloc(sizeof(struct I2CNode)); | |
122 | node->elt = candidate; | |
123 | QLIST_INSERT_HEAD(&bus->current_devs, node, next); | |
124 | if (!bus->broadcast) { | |
125 | break; | |
126 | } | |
2293c27f | 127 | } |
b3a21988 | 128 | } |
d307c28c | 129 | bus_scanned = true; |
0ff596d0 PB |
130 | } |
131 | ||
2293c27f | 132 | if (QLIST_EMPTY(&bus->current_devs)) { |
0ff596d0 | 133 | return 1; |
b5ea9327 | 134 | } |
0ff596d0 | 135 | |
2293c27f | 136 | QLIST_FOREACH(node, &bus->current_devs, next) { |
08bb9b34 | 137 | I2CSlave *s = node->elt; |
d307c28c CM |
138 | int rv; |
139 | ||
08bb9b34 | 140 | sc = I2C_SLAVE_GET_CLASS(s); |
2293c27f FK |
141 | /* If the bus is already busy, assume this is a repeated |
142 | start condition. */ | |
d307c28c | 143 | |
2293c27f | 144 | if (sc->event) { |
08bb9b34 PMD |
145 | trace_i2c_event("start", s->address); |
146 | rv = sc->event(s, recv ? I2C_START_RECV : I2C_START_SEND); | |
d307c28c CM |
147 | if (rv && !bus->broadcast) { |
148 | if (bus_scanned) { | |
149 | /* First call, terminate the transfer. */ | |
150 | i2c_end_transfer(bus); | |
151 | } | |
152 | return rv; | |
153 | } | |
2293c27f | 154 | } |
b5ea9327 | 155 | } |
0ff596d0 PB |
156 | return 0; |
157 | } | |
158 | ||
a5c82852 | 159 | void i2c_end_transfer(I2CBus *bus) |
0ff596d0 | 160 | { |
b5ea9327 | 161 | I2CSlaveClass *sc; |
2293c27f | 162 | I2CNode *node, *next; |
0ff596d0 | 163 | |
2293c27f | 164 | QLIST_FOREACH_SAFE(node, &bus->current_devs, next, next) { |
08bb9b34 PMD |
165 | I2CSlave *s = node->elt; |
166 | sc = I2C_SLAVE_GET_CLASS(s); | |
2293c27f | 167 | if (sc->event) { |
08bb9b34 PMD |
168 | trace_i2c_event("finish", s->address); |
169 | sc->event(s, I2C_FINISH); | |
2293c27f FK |
170 | } |
171 | QLIST_REMOVE(node, next); | |
172 | g_free(node); | |
b5ea9327 | 173 | } |
2293c27f | 174 | bus->broadcast = false; |
0ff596d0 PB |
175 | } |
176 | ||
056fca7b | 177 | int i2c_send_recv(I2CBus *bus, uint8_t *data, bool send) |
0ff596d0 | 178 | { |
b5ea9327 | 179 | I2CSlaveClass *sc; |
08bb9b34 | 180 | I2CSlave *s; |
2293c27f FK |
181 | I2CNode *node; |
182 | int ret = 0; | |
183 | ||
056fca7b PC |
184 | if (send) { |
185 | QLIST_FOREACH(node, &bus->current_devs, next) { | |
08bb9b34 PMD |
186 | s = node->elt; |
187 | sc = I2C_SLAVE_GET_CLASS(s); | |
056fca7b | 188 | if (sc->send) { |
08bb9b34 PMD |
189 | trace_i2c_send(s->address, *data); |
190 | ret = ret || sc->send(s, *data); | |
056fca7b PC |
191 | } else { |
192 | ret = -1; | |
193 | } | |
194 | } | |
195 | return ret ? -1 : 0; | |
196 | } else { | |
2ac4c5f4 CM |
197 | ret = 0xff; |
198 | if (!QLIST_EMPTY(&bus->current_devs) && !bus->broadcast) { | |
199 | sc = I2C_SLAVE_GET_CLASS(QLIST_FIRST(&bus->current_devs)->elt); | |
200 | if (sc->recv) { | |
201 | s = QLIST_FIRST(&bus->current_devs)->elt; | |
202 | ret = sc->recv(s); | |
203 | trace_i2c_recv(s->address, ret); | |
056fca7b PC |
204 | } |
205 | } | |
2ac4c5f4 CM |
206 | *data = ret; |
207 | return 0; | |
b5ea9327 | 208 | } |
0ff596d0 PB |
209 | } |
210 | ||
056fca7b | 211 | int i2c_send(I2CBus *bus, uint8_t data) |
0ff596d0 | 212 | { |
056fca7b PC |
213 | return i2c_send_recv(bus, &data, true); |
214 | } | |
0ff596d0 | 215 | |
2ac4c5f4 | 216 | uint8_t i2c_recv(I2CBus *bus) |
056fca7b | 217 | { |
2ac4c5f4 | 218 | uint8_t data = 0xff; |
b5ea9327 | 219 | |
2ac4c5f4 CM |
220 | i2c_send_recv(bus, &data, false); |
221 | return data; | |
0ff596d0 PB |
222 | } |
223 | ||
a5c82852 | 224 | void i2c_nack(I2CBus *bus) |
0ff596d0 | 225 | { |
b5ea9327 | 226 | I2CSlaveClass *sc; |
2293c27f | 227 | I2CNode *node; |
0ff596d0 | 228 | |
2293c27f | 229 | if (QLIST_EMPTY(&bus->current_devs)) { |
0ff596d0 | 230 | return; |
b5ea9327 | 231 | } |
0ff596d0 | 232 | |
2293c27f FK |
233 | QLIST_FOREACH(node, &bus->current_devs, next) { |
234 | sc = I2C_SLAVE_GET_CLASS(node->elt); | |
235 | if (sc->event) { | |
08bb9b34 | 236 | trace_i2c_event("nack", node->elt->address); |
2293c27f FK |
237 | sc->event(node->elt, I2C_NACK); |
238 | } | |
b5ea9327 | 239 | } |
0ff596d0 PB |
240 | } |
241 | ||
bcbe8068 | 242 | static int i2c_slave_post_load(void *opaque, int version_id) |
aa941b94 | 243 | { |
9e07bdf8 | 244 | I2CSlave *dev = opaque; |
a5c82852 | 245 | I2CBus *bus; |
2293c27f FK |
246 | I2CNode *node; |
247 | ||
fef7fbc9 | 248 | bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev))); |
71ae65e5 IM |
249 | if ((bus->saved_address == dev->address) || |
250 | (bus->saved_address == I2C_BROADCAST)) { | |
2293c27f FK |
251 | node = g_malloc(sizeof(struct I2CNode)); |
252 | node->elt = dev; | |
253 | QLIST_INSERT_HEAD(&bus->current_devs, node, next); | |
fe8de492 | 254 | } |
bcbe8068 JQ |
255 | return 0; |
256 | } | |
257 | ||
1894839f | 258 | const VMStateDescription vmstate_i2c_slave = { |
9e07bdf8 | 259 | .name = "I2CSlave", |
bcbe8068 JQ |
260 | .version_id = 1, |
261 | .minimum_version_id = 1, | |
bcbe8068 | 262 | .post_load = i2c_slave_post_load, |
35d08458 | 263 | .fields = (VMStateField[]) { |
9e07bdf8 | 264 | VMSTATE_UINT8(address, I2CSlave), |
bcbe8068 JQ |
265 | VMSTATE_END_OF_LIST() |
266 | } | |
267 | }; | |
268 | ||
a5c82852 | 269 | DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr) |
fe8de492 PB |
270 | { |
271 | DeviceState *dev; | |
272 | ||
02e2da45 | 273 | dev = qdev_create(&bus->qbus, name); |
5b7f5327 | 274 | qdev_prop_set_uint8(dev, "address", addr); |
e23a1b33 | 275 | qdev_init_nofail(dev); |
fe8de492 | 276 | return dev; |
aa941b94 | 277 | } |
b5ea9327 | 278 | |
39bffca2 AL |
279 | static void i2c_slave_class_init(ObjectClass *klass, void *data) |
280 | { | |
281 | DeviceClass *k = DEVICE_CLASS(klass); | |
125ee0ed | 282 | set_bit(DEVICE_CATEGORY_MISC, k->categories); |
0d936928 | 283 | k->bus_type = TYPE_I2C_BUS; |
4f67d30b | 284 | device_class_set_props(k, i2c_props); |
39bffca2 AL |
285 | } |
286 | ||
8c43a6f0 | 287 | static const TypeInfo i2c_slave_type_info = { |
b5ea9327 AL |
288 | .name = TYPE_I2C_SLAVE, |
289 | .parent = TYPE_DEVICE, | |
290 | .instance_size = sizeof(I2CSlave), | |
291 | .abstract = true, | |
292 | .class_size = sizeof(I2CSlaveClass), | |
39bffca2 | 293 | .class_init = i2c_slave_class_init, |
b5ea9327 AL |
294 | }; |
295 | ||
83f7d43a | 296 | static void i2c_slave_register_types(void) |
b5ea9327 | 297 | { |
0d936928 | 298 | type_register_static(&i2c_bus_info); |
b5ea9327 AL |
299 | type_register_static(&i2c_slave_type_info); |
300 | } | |
301 | ||
83f7d43a | 302 | type_init(i2c_slave_register_types) |