]> Git Repo - qemu.git/blame - hw/core/ptimer.c
qdev: add clock input&output support to devices.
[qemu.git] / hw / core / ptimer.c
CommitLineData
5fafdf24 1/*
423f0742
PB
2 * General purpose implementation of a simple periodic countdown timer.
3 *
4 * Copyright (c) 2007 CodeSourcery.
5 *
8e31bf38 6 * This code is licensed under the GNU LGPL.
423f0742 7 */
d6454270 8
18c86e2b 9#include "qemu/osdep.h"
1de7afc9 10#include "qemu/timer.h"
83c9f4ca 11#include "hw/ptimer.h"
d6454270 12#include "migration/vmstate.h"
1de7afc9 13#include "qemu/host-utils.h"
8a354bd9 14#include "sysemu/replay.h"
2a8b5870 15#include "sysemu/qtest.h"
072bdb07 16#include "block/aio.h"
d2528bdc 17#include "sysemu/cpus.h"
423f0742 18
22471b8a
DO
19#define DELTA_ADJUST 1
20#define DELTA_NO_ADJUST -1
2b5c0322 21
423f0742
PB
22struct ptimer_state
23{
852f771e 24 uint8_t enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot. */
8d05ea8a
BS
25 uint64_t limit;
26 uint64_t delta;
423f0742
PB
27 uint32_t period_frac;
28 int64_t period;
29 int64_t last_event;
30 int64_t next_event;
e7ea81c3 31 uint8_t policy_mask;
423f0742 32 QEMUTimer *timer;
78b6eaa6
PM
33 ptimer_cb callback;
34 void *callback_opaque;
35 /*
36 * These track whether we're in a transaction block, and if we
37 * need to do a timer reload when the block finishes. They don't
38 * need to be migrated because migration can never happen in the
39 * middle of a transaction block.
40 */
41 bool in_transaction;
42 bool need_reload;
423f0742
PB
43};
44
45/* Use a bottom-half routine to avoid reentrancy issues. */
46static void ptimer_trigger(ptimer_state *s)
47{
af2a580f 48 s->callback(s->callback_opaque);
423f0742
PB
49}
50
2b5c0322 51static void ptimer_reload(ptimer_state *s, int delta_adjust)
423f0742 52{
78b6eaa6
PM
53 uint32_t period_frac;
54 uint64_t period;
55 uint64_t delta;
086ede32 56 bool suppress_trigger = false;
e91171e3 57
086ede32
PM
58 /*
59 * Note that if delta_adjust is 0 then we must be here because of
60 * a count register write or timer start, not because of timer expiry.
61 * In that case the policy might require us to suppress the timer trigger
62 * that we would otherwise generate for a zero delta.
63 */
64 if (delta_adjust == 0 &&
65 (s->policy_mask & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT)) {
66 suppress_trigger = true;
67 }
78b6eaa6 68 if (s->delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)
086ede32 69 && !suppress_trigger) {
423f0742 70 ptimer_trigger(s);
22471b8a
DO
71 }
72
78b6eaa6
PM
73 /*
74 * Note that ptimer_trigger() might call the device callback function,
75 * which can then modify timer state, so we must not cache any fields
76 * from ptimer_state until after we have called it.
77 */
78 delta = s->delta;
79 period = s->period;
80 period_frac = s->period_frac;
81
3f6e6a13 82 if (delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_RELOAD)) {
2b5c0322 83 delta = s->delta = s->limit;
423f0742 84 }
ef0a9984
DO
85
86 if (s->period == 0) {
2a8b5870
DO
87 if (!qtest_enabled()) {
88 fprintf(stderr, "Timer with period zero, disabling\n");
89 }
780d23e5 90 timer_del(s->timer);
423f0742
PB
91 s->enabled = 0;
92 return;
93 }
94
2b5c0322 95 if (s->policy_mask & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD) {
22471b8a
DO
96 if (delta_adjust != DELTA_NO_ADJUST) {
97 delta += delta_adjust;
98 }
2b5c0322
DO
99 }
100
ef0a9984
DO
101 if (delta == 0 && (s->policy_mask & PTIMER_POLICY_CONTINUOUS_TRIGGER)) {
102 if (s->enabled == 1 && s->limit == 0) {
103 delta = 1;
104 }
105 }
106
22471b8a
DO
107 if (delta == 0 && (s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)) {
108 if (delta_adjust != DELTA_NO_ADJUST) {
109 delta = 1;
110 }
111 }
112
3f6e6a13
DO
113 if (delta == 0 && (s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_RELOAD)) {
114 if (s->enabled == 1 && s->limit != 0) {
115 delta = 1;
116 }
117 }
118
ef0a9984
DO
119 if (delta == 0) {
120 if (!qtest_enabled()) {
121 fprintf(stderr, "Timer with delta zero, disabling\n");
122 }
123 timer_del(s->timer);
124 s->enabled = 0;
125 return;
126 }
127
e91171e3
DO
128 /*
129 * Artificially limit timeout rate to something
130 * achievable under QEMU. Otherwise, QEMU spends all
131 * its time generating timer interrupts, and there
132 * is no forward progress.
133 * About ten microseconds is the fastest that really works
134 * on the current generation of host machines.
135 */
136
2b5c0322
DO
137 if (s->enabled == 1 && (delta * period < 10000) && !use_icount) {
138 period = 10000 / delta;
e91171e3
DO
139 period_frac = 0;
140 }
141
423f0742 142 s->last_event = s->next_event;
2b5c0322 143 s->next_event = s->last_event + delta * period;
e91171e3 144 if (period_frac) {
2b5c0322 145 s->next_event += ((int64_t)period_frac * delta) >> 32;
423f0742 146 }
bc72ad67 147 timer_mod(s->timer, s->next_event);
423f0742
PB
148}
149
150static void ptimer_tick(void *opaque)
151{
152 ptimer_state *s = (ptimer_state *)opaque;
3f6e6a13
DO
153 bool trigger = true;
154
78b6eaa6
PM
155 /*
156 * We perform all the tick actions within a begin/commit block
157 * because the callback function that ptimer_trigger() calls
158 * might make calls into the ptimer APIs that provoke another
159 * trigger, and we want that to cause the callback function
160 * to be called iteratively, not recursively.
161 */
162 ptimer_transaction_begin(s);
163
423f0742 164 if (s->enabled == 2) {
3f6e6a13 165 s->delta = 0;
423f0742
PB
166 s->enabled = 0;
167 } else {
ef0a9984
DO
168 int delta_adjust = DELTA_ADJUST;
169
3f6e6a13 170 if (s->delta == 0 || s->limit == 0) {
ef0a9984 171 /* If a "continuous trigger" policy is not used and limit == 0,
3f6e6a13
DO
172 we should error out. delta == 0 means that this tick is
173 caused by a "no immediate reload" policy, so it shouldn't
174 be adjusted. */
22471b8a 175 delta_adjust = DELTA_NO_ADJUST;
ef0a9984
DO
176 }
177
3f6e6a13
DO
178 if (!(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)) {
179 /* Avoid re-trigger on deferred reload if "no immediate trigger"
180 policy isn't used. */
181 trigger = (delta_adjust == DELTA_ADJUST);
182 }
183
184 s->delta = s->limit;
185
ef0a9984 186 ptimer_reload(s, delta_adjust);
423f0742 187 }
3f6e6a13
DO
188
189 if (trigger) {
190 ptimer_trigger(s);
191 }
78b6eaa6
PM
192
193 ptimer_transaction_commit(s);
423f0742
PB
194}
195
8d05ea8a 196uint64_t ptimer_get_count(ptimer_state *s)
423f0742 197{
8d05ea8a 198 uint64_t counter;
423f0742 199
ef0a9984 200 if (s->enabled && s->delta != 0) {
5a50307b
DO
201 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
202 int64_t next = s->next_event;
2b5c0322 203 int64_t last = s->last_event;
5a50307b
DO
204 bool expired = (now - next >= 0);
205 bool oneshot = (s->enabled == 2);
206
423f0742 207 /* Figure out the current counter value. */
56215da3 208 if (expired) {
423f0742
PB
209 /* Prevent timer underflowing if it should already have
210 triggered. */
211 counter = 0;
212 } else {
8d05ea8a
BS
213 uint64_t rem;
214 uint64_t div;
d0a981b2
PB
215 int clz1, clz2;
216 int shift;
e91171e3
DO
217 uint32_t period_frac = s->period_frac;
218 uint64_t period = s->period;
219
5a50307b 220 if (!oneshot && (s->delta * period < 10000) && !use_icount) {
e91171e3
DO
221 period = 10000 / s->delta;
222 period_frac = 0;
223 }
d0a981b2
PB
224
225 /* We need to divide time by period, where time is stored in
226 rem (64-bit integer) and period is stored in period/period_frac
227 (64.32 fixed point).
2b5c0322 228
d0a981b2
PB
229 Doing full precision division is hard, so scale values and
230 do a 64-bit division. The result should be rounded down,
231 so that the rounding error never causes the timer to go
232 backwards.
233 */
423f0742 234
56215da3 235 rem = next - now;
e91171e3 236 div = period;
d0a981b2
PB
237
238 clz1 = clz64(rem);
239 clz2 = clz64(div);
240 shift = clz1 < clz2 ? clz1 : clz2;
241
242 rem <<= shift;
243 div <<= shift;
244 if (shift >= 32) {
e91171e3 245 div |= ((uint64_t)period_frac << (shift - 32));
d0a981b2
PB
246 } else {
247 if (shift != 0)
e91171e3 248 div |= (period_frac >> (32 - shift));
d0a981b2
PB
249 /* Look at remaining bits of period_frac and round div up if
250 necessary. */
e91171e3 251 if ((uint32_t)(period_frac << shift))
d0a981b2
PB
252 div += 1;
253 }
423f0742 254 counter = rem / div;
2b5c0322
DO
255
256 if (s->policy_mask & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD) {
257 /* Before wrapping around, timer should stay with counter = 0
258 for a one period. */
259 if (!oneshot && s->delta == s->limit) {
260 if (now == last) {
261 /* Counter == delta here, check whether it was
262 adjusted and if it was, then right now it is
263 that "one period". */
264 if (counter == s->limit + DELTA_ADJUST) {
265 return 0;
266 }
267 } else if (counter == s->limit) {
268 /* Since the counter is rounded down and now != last,
269 the counter == limit means that delta was adjusted
270 by +1 and right now it is that adjusted period. */
271 return 0;
272 }
273 }
274 }
423f0742 275 }
5580ea45
DO
276
277 if (s->policy_mask & PTIMER_POLICY_NO_COUNTER_ROUND_DOWN) {
278 /* If now == last then delta == limit, i.e. the counter already
279 represents the correct value. It would be rounded down a 1ns
280 later. */
281 if (now != last) {
282 counter += 1;
283 }
284 }
423f0742
PB
285 } else {
286 counter = s->delta;
287 }
288 return counter;
289}
290
8d05ea8a 291void ptimer_set_count(ptimer_state *s, uint64_t count)
423f0742 292{
af2a580f 293 assert(s->in_transaction);
423f0742
PB
294 s->delta = count;
295 if (s->enabled) {
af2a580f 296 s->need_reload = true;
423f0742
PB
297 }
298}
299
300void ptimer_run(ptimer_state *s, int oneshot)
301{
869e92b5
DO
302 bool was_disabled = !s->enabled;
303
af2a580f 304 assert(s->in_transaction);
78b6eaa6 305
869e92b5 306 if (was_disabled && s->period == 0) {
2a8b5870
DO
307 if (!qtest_enabled()) {
308 fprintf(stderr, "Timer with period zero, disabling\n");
309 }
423f0742
PB
310 return;
311 }
312 s->enabled = oneshot ? 2 : 1;
869e92b5 313 if (was_disabled) {
af2a580f 314 s->need_reload = true;
869e92b5 315 }
423f0742
PB
316}
317
8d05ea8a 318/* Pause a timer. Note that this may cause it to "lose" time, even if it
423f0742
PB
319 is immediately restarted. */
320void ptimer_stop(ptimer_state *s)
321{
af2a580f 322 assert(s->in_transaction);
78b6eaa6 323
423f0742
PB
324 if (!s->enabled)
325 return;
326
327 s->delta = ptimer_get_count(s);
bc72ad67 328 timer_del(s->timer);
423f0742 329 s->enabled = 0;
af2a580f 330 s->need_reload = false;
423f0742
PB
331}
332
333/* Set counter increment interval in nanoseconds. */
334void ptimer_set_period(ptimer_state *s, int64_t period)
335{
af2a580f 336 assert(s->in_transaction);
7ef6e3cf 337 s->delta = ptimer_get_count(s);
423f0742
PB
338 s->period = period;
339 s->period_frac = 0;
8d05ea8a 340 if (s->enabled) {
af2a580f 341 s->need_reload = true;
8d05ea8a 342 }
423f0742
PB
343}
344
345/* Set counter frequency in Hz. */
346void ptimer_set_freq(ptimer_state *s, uint32_t freq)
347{
af2a580f 348 assert(s->in_transaction);
7ef6e3cf 349 s->delta = ptimer_get_count(s);
423f0742
PB
350 s->period = 1000000000ll / freq;
351 s->period_frac = (1000000000ll << 32) / freq;
8d05ea8a 352 if (s->enabled) {
af2a580f 353 s->need_reload = true;
8d05ea8a 354 }
423f0742
PB
355}
356
357/* Set the initial countdown value. If reload is nonzero then also set
358 count = limit. */
8d05ea8a 359void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload)
423f0742 360{
af2a580f 361 assert(s->in_transaction);
423f0742
PB
362 s->limit = limit;
363 if (reload)
364 s->delta = limit;
62ea5b0b 365 if (s->enabled && reload) {
af2a580f 366 s->need_reload = true;
8d05ea8a
BS
367 }
368}
369
578c4b2f
DO
370uint64_t ptimer_get_limit(ptimer_state *s)
371{
372 return s->limit;
373}
374
78b6eaa6
PM
375void ptimer_transaction_begin(ptimer_state *s)
376{
af2a580f 377 assert(!s->in_transaction);
78b6eaa6
PM
378 s->in_transaction = true;
379 s->need_reload = false;
380}
381
382void ptimer_transaction_commit(ptimer_state *s)
383{
384 assert(s->in_transaction);
385 /*
386 * We must loop here because ptimer_reload() can call the callback
387 * function, which might then update ptimer state in a way that
388 * means we need to do another reload and possibly another callback.
389 * A disabled timer never needs reloading (and if we don't check
390 * this then we loop forever if ptimer_reload() disables the timer).
391 */
392 while (s->need_reload && s->enabled) {
393 s->need_reload = false;
394 s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
395 ptimer_reload(s, 0);
396 }
397 /* Now we've finished reload we can leave the transaction block. */
398 s->in_transaction = false;
399}
400
852f771e 401const VMStateDescription vmstate_ptimer = {
55a6e51f 402 .name = "ptimer",
852f771e
JQ
403 .version_id = 1,
404 .minimum_version_id = 1,
35d08458 405 .fields = (VMStateField[]) {
852f771e
JQ
406 VMSTATE_UINT8(enabled, ptimer_state),
407 VMSTATE_UINT64(limit, ptimer_state),
408 VMSTATE_UINT64(delta, ptimer_state),
409 VMSTATE_UINT32(period_frac, ptimer_state),
410 VMSTATE_INT64(period, ptimer_state),
411 VMSTATE_INT64(last_event, ptimer_state),
412 VMSTATE_INT64(next_event, ptimer_state),
e720677e 413 VMSTATE_TIMER_PTR(timer, ptimer_state),
852f771e
JQ
414 VMSTATE_END_OF_LIST()
415 }
55a6e51f
BS
416};
417
78b6eaa6
PM
418ptimer_state *ptimer_init(ptimer_cb callback, void *callback_opaque,
419 uint8_t policy_mask)
420{
421 ptimer_state *s;
422
af2a580f 423 /* The callback function is mandatory. */
78b6eaa6
PM
424 assert(callback);
425
426 s = g_new0(ptimer_state, 1);
427 s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ptimer_tick, s);
428 s->policy_mask = policy_mask;
429 s->callback = callback;
430 s->callback_opaque = callback_opaque;
431
432 /*
433 * These two policies are incompatible -- trigger-on-decrement implies
434 * a timer trigger when the count becomes 0, but no-immediate-trigger
435 * implies a trigger when the count stops being 0.
436 */
437 assert(!((policy_mask & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT) &&
438 (policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)));
439 return s;
440}
441
072bdb07
MAL
442void ptimer_free(ptimer_state *s)
443{
072bdb07
MAL
444 timer_free(s->timer);
445 g_free(s);
446}
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