[qemu.git] / target-s390x / gdbstub.c

/*
 * s390x gdb server stub
 *
 * Copyright (c) 2003-2005 Fabrice Bellard
 * Copyright (c) 2013 SUSE LINUX Products GmbH
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */
#include "config.h"
#include "qemu-common.h"
#include "exec/gdbstub.h"
#include "qemu/bitops.h"

int s390_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
    S390CPU *cpu = S390_CPU(cs);
    CPUS390XState *env = &cpu->env;
    uint64_t val;
    int cc_op;

    switch (n) {
    case S390_PSWM_REGNUM:
        if (tcg_enabled()) {
            cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst,
                            env->cc_vr);
            val = deposit64(env->psw.mask, 44, 2, cc_op);
            return gdb_get_regl(mem_buf, val);
        }
        return gdb_get_regl(mem_buf, env->psw.mask);
    case S390_PSWA_REGNUM:
        return gdb_get_regl(mem_buf, env->psw.addr);
    case S390_R0_REGNUM ... S390_R15_REGNUM:
        return gdb_get_regl(mem_buf, env->regs[n - S390_R0_REGNUM]);
    }
    return 0;
}

int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
    S390CPU *cpu = S390_CPU(cs);
    CPUS390XState *env = &cpu->env;
    target_ulong tmpl = ldtul_p(mem_buf);

    switch (n) {
    case S390_PSWM_REGNUM:
        env->psw.mask = tmpl;
        if (tcg_enabled()) {
            env->cc_op = extract64(tmpl, 44, 2);
        }
        break;
    case S390_PSWA_REGNUM:
        env->psw.addr = tmpl;
        break;
    case S390_R0_REGNUM ... S390_R15_REGNUM:
        env->regs[n - S390_R0_REGNUM] = tmpl;
        break;
    default:
        return 0;
    }
    return 8;
}

/* the values represent the positions in s390-acr.xml */
#define S390_A0_REGNUM 0
#define S390_A15_REGNUM 15
/* total number of registers in s390-acr.xml */
#define S390_NUM_AC_REGS 16

static int cpu_read_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_A0_REGNUM ... S390_A15_REGNUM:
        return gdb_get_reg32(mem_buf, env->aregs[n]);
    default:
        return 0;
    }
}

static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_A0_REGNUM ... S390_A15_REGNUM:
        env->aregs[n] = ldl_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 4;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-fpr.xml */
#define S390_FPC_REGNUM 0
#define S390_F0_REGNUM 1
#define S390_F15_REGNUM 16
/* total number of registers in s390-fpr.xml */
#define S390_NUM_FP_REGS 17

static int cpu_read_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_FPC_REGNUM:
        return gdb_get_reg32(mem_buf, env->fpc);
    case S390_F0_REGNUM ... S390_F15_REGNUM:
        return gdb_get_reg64(mem_buf, get_freg(env, n - S390_F0_REGNUM)->ll);
    default:
        return 0;
    }
}

static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_FPC_REGNUM:
        env->fpc = ldl_p(mem_buf);
        return 4;
    case S390_F0_REGNUM ... S390_F15_REGNUM:
        get_freg(env, n - S390_F0_REGNUM)->ll = ldtul_p(mem_buf);
        return 8;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-vx.xml */
#define S390_V0L_REGNUM 0
#define S390_V15L_REGNUM 15
#define S390_V16_REGNUM 16
#define S390_V31_REGNUM 31
/* total number of registers in s390-vx.xml */
#define S390_NUM_VREGS 32

static int cpu_read_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    int ret;

    switch (n) {
    case S390_V0L_REGNUM ... S390_V15L_REGNUM:
        ret = gdb_get_reg64(mem_buf, env->vregs[n][1].ll);
        break;
    case S390_V16_REGNUM ... S390_V31_REGNUM:
        ret = gdb_get_reg64(mem_buf, env->vregs[n][0].ll);
        ret += gdb_get_reg64(mem_buf + 8, env->vregs[n][1].ll);
        break;
    default:
        ret = 0;
    }

    return ret;
}

static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_V0L_REGNUM ... S390_V15L_REGNUM:
        env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
        return 8;
    case S390_V16_REGNUM ... S390_V31_REGNUM:
        env->vregs[n][0].ll = ldtul_p(mem_buf);
        env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
        return 16;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-cr.xml */
#define S390_C0_REGNUM 0
#define S390_C15_REGNUM 15
/* total number of registers in s390-cr.xml */
#define S390_NUM_C_REGS 16

#ifndef CONFIG_USER_ONLY
static int cpu_read_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_C0_REGNUM ... S390_C15_REGNUM:
        return gdb_get_regl(mem_buf, env->cregs[n]);
    default:
        return 0;
    }
}

static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_C0_REGNUM ... S390_C15_REGNUM:
        env->cregs[n] = ldtul_p(mem_buf);
        if (tcg_enabled()) {
            tlb_flush(ENV_GET_CPU(env), 1);
        }
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-virt.xml */
#define S390_VIRT_CKC_REGNUM    0
#define S390_VIRT_CPUTM_REGNUM  1
#define S390_VIRT_BEA_REGNUM    2
#define S390_VIRT_PREFIX_REGNUM 3
#define S390_VIRT_PP_REGNUM     4
#define S390_VIRT_PFT_REGNUM    5
#define S390_VIRT_PFS_REGNUM    6
#define S390_VIRT_PFC_REGNUM    7
/* total number of registers in s390-virt.xml */
#define S390_NUM_VIRT_REGS 8

static int cpu_read_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_VIRT_CKC_REGNUM:
        return gdb_get_regl(mem_buf, env->ckc);
    case S390_VIRT_CPUTM_REGNUM:
        return gdb_get_regl(mem_buf, env->cputm);
    case S390_VIRT_BEA_REGNUM:
        return gdb_get_regl(mem_buf, env->gbea);
    case S390_VIRT_PREFIX_REGNUM:
        return gdb_get_regl(mem_buf, env->psa);
    case S390_VIRT_PP_REGNUM:
        return gdb_get_regl(mem_buf, env->pp);
    case S390_VIRT_PFT_REGNUM:
        return gdb_get_regl(mem_buf, env->pfault_token);
    case S390_VIRT_PFS_REGNUM:
        return gdb_get_regl(mem_buf, env->pfault_select);
    case S390_VIRT_PFC_REGNUM:
        return gdb_get_regl(mem_buf, env->pfault_compare);
    default:
        return 0;
    }
}

static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_VIRT_CKC_REGNUM:
        env->ckc = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_CPUTM_REGNUM:
        env->cputm = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_BEA_REGNUM:
        env->gbea = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PREFIX_REGNUM:
        env->psa = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PP_REGNUM:
        env->pp = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PFT_REGNUM:
        env->pfault_token = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PFS_REGNUM:
        env->pfault_select = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PFC_REGNUM:
        env->pfault_compare = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    default:
        return 0;
    }
}
#endif

void s390_cpu_gdb_init(CPUState *cs)
{
    gdb_register_coprocessor(cs, cpu_read_ac_reg,
                             cpu_write_ac_reg,
                             S390_NUM_AC_REGS, "s390-acr.xml", 0);

    gdb_register_coprocessor(cs, cpu_read_fp_reg,
                             cpu_write_fp_reg,
                             S390_NUM_FP_REGS, "s390-fpr.xml", 0);

    gdb_register_coprocessor(cs, cpu_read_vreg,
                             cpu_write_vreg,
                             S390_NUM_VREGS, "s390-vx.xml", 0);

#ifndef CONFIG_USER_ONLY
    gdb_register_coprocessor(cs, cpu_read_c_reg,
                             cpu_write_c_reg,
                             S390_NUM_C_REGS, "s390-cr.xml", 0);

    if (kvm_enabled()) {
        gdb_register_coprocessor(cs, cpu_read_virt_reg,
                                 cpu_write_virt_reg,
                                 S390_NUM_VIRT_REGS, "s390-virt.xml", 0);
    }
#endif
}
Commit	Line	Data
cfae5c90 AF	1	/*
	2	* s390x gdb server stub
	3	*
	4	* Copyright (c) 2003-2005 Fabrice Bellard
	5	* Copyright (c) 2013 SUSE LINUX Products GmbH
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*/
5b50e790 AF	20	#include "config.h"
	21	#include "qemu-common.h"
	22	#include "exec/gdbstub.h"
	23	#include "qemu/bitops.h"
cfae5c90	24
5b50e790	25	int s390_cpu_gdb_read_register(CPUState cs, uint8_t mem_buf, int n)
cfae5c90	26	{
5b50e790 AF	27	S390CPU *cpu = S390_CPU(cs);
5b50e790 AF	28	CPUS390XState *env = &cpu->env;
cfae5c90 AF	29	uint64_t val;
	30	int cc_op;
	31
	32	switch (n) {
	33	case S390_PSWM_REGNUM:
97fa52f0 DH	34	if (tcg_enabled()) {
	35	cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst,
	36	env->cc_vr);
	37	val = deposit64(env->psw.mask, 44, 2, cc_op);
	38	return gdb_get_regl(mem_buf, val);
	39	}
	40	return gdb_get_regl(mem_buf, env->psw.mask);
cfae5c90	41	case S390_PSWA_REGNUM:
986a2998	42	return gdb_get_regl(mem_buf, env->psw.addr);
cfae5c90	43	case S390_R0_REGNUM ... S390_R15_REGNUM:
218829db	44	return gdb_get_regl(mem_buf, env->regs[n - S390_R0_REGNUM]);
cfae5c90	45	}
cfae5c90 AF	46	return 0;
	47	}
	48
5b50e790	49	int s390_cpu_gdb_write_register(CPUState cs, uint8_t mem_buf, int n)
cfae5c90	50	{
5b50e790 AF	51	S390CPU *cpu = S390_CPU(cs);
5b50e790 AF	52	CPUS390XState *env = &cpu->env;
73d510c9	53	target_ulong tmpl = ldtul_p(mem_buf);
cfae5c90 AF	54
	55	switch (n) {
	56	case S390_PSWM_REGNUM:
	57	env->psw.mask = tmpl;
97fa52f0 DH	58	if (tcg_enabled()) {
	59	env->cc_op = extract64(tmpl, 44, 2);
	60	}
cfae5c90 AF	61	break;
	62	case S390_PSWA_REGNUM:
	63	env->psw.addr = tmpl;
	64	break;
	65	case S390_R0_REGNUM ... S390_R15_REGNUM:
218829db	66	env->regs[n - S390_R0_REGNUM] = tmpl;
cfae5c90	67	break;
73d510c9 DH	68	default:
	69	return 0;
	70	}
	71	return 8;
	72	}
	73
	74	/* the values represent the positions in s390-acr.xml */
	75	#define S390_A0_REGNUM 0
	76	#define S390_A15_REGNUM 15
	77	/* total number of registers in s390-acr.xml */
	78	#define S390_NUM_AC_REGS 16
	79
	80	static int cpu_read_ac_reg(CPUS390XState env, uint8_t mem_buf, int n)
	81	{
	82	switch (n) {
cfae5c90	83	case S390_A0_REGNUM ... S390_A15_REGNUM:
73d510c9 DH	84	return gdb_get_reg32(mem_buf, env->aregs[n]);
	85	default:
	86	return 0;
	87	}
	88	}
	89
	90	static int cpu_write_ac_reg(CPUS390XState env, uint8_t mem_buf, int n)
	91	{
	92	switch (n) {
	93	case S390_A0_REGNUM ... S390_A15_REGNUM:
	94	env->aregs[n] = ldl_p(mem_buf);
55b1b753	95	cpu_synchronize_post_init(ENV_GET_CPU(env));
73d510c9 DH	96	return 4;
	97	default:
	98	return 0;
	99	}
	100	}
	101
	102	/* the values represent the positions in s390-fpr.xml */
	103	#define S390_FPC_REGNUM 0
	104	#define S390_F0_REGNUM 1
	105	#define S390_F15_REGNUM 16
	106	/* total number of registers in s390-fpr.xml */
	107	#define S390_NUM_FP_REGS 17
	108
	109	static int cpu_read_fp_reg(CPUS390XState env, uint8_t mem_buf, int n)
	110	{
	111	switch (n) {
cfae5c90	112	case S390_FPC_REGNUM:
73d510c9	113	return gdb_get_reg32(mem_buf, env->fpc);
cfae5c90	114	case S390_F0_REGNUM ... S390_F15_REGNUM:
c498d8e3	115	return gdb_get_reg64(mem_buf, get_freg(env, n - S390_F0_REGNUM)->ll);
cfae5c90 AF	116	default:
	117	return 0;
	118	}
73d510c9 DH	119	}
	120
	121	static int cpu_write_fp_reg(CPUS390XState env, uint8_t mem_buf, int n)
	122	{
	123	switch (n) {
	124	case S390_FPC_REGNUM:
	125	env->fpc = ldl_p(mem_buf);
	126	return 4;
	127	case S390_F0_REGNUM ... S390_F15_REGNUM:
c498d8e3	128	get_freg(env, n - S390_F0_REGNUM)->ll = ldtul_p(mem_buf);
73d510c9 DH	129	return 8;
	130	default:
	131	return 0;
	132	}
	133	}
	134
ca343c7a EF	135	/* the values represent the positions in s390-vx.xml */
	136	#define S390_V0L_REGNUM 0
	137	#define S390_V15L_REGNUM 15
	138	#define S390_V16_REGNUM 16
	139	#define S390_V31_REGNUM 31
	140	/* total number of registers in s390-vx.xml */
	141	#define S390_NUM_VREGS 32
	142
	143	static int cpu_read_vreg(CPUS390XState env, uint8_t mem_buf, int n)
	144	{
	145	int ret;
	146
	147	switch (n) {
	148	case S390_V0L_REGNUM ... S390_V15L_REGNUM:
	149	ret = gdb_get_reg64(mem_buf, env->vregs[n][1].ll);
	150	break;
	151	case S390_V16_REGNUM ... S390_V31_REGNUM:
	152	ret = gdb_get_reg64(mem_buf, env->vregs[n][0].ll);
	153	ret += gdb_get_reg64(mem_buf + 8, env->vregs[n][1].ll);
	154	break;
	155	default:
	156	ret = 0;
	157	}
	158
	159	return ret;
	160	}
	161
	162	static int cpu_write_vreg(CPUS390XState env, uint8_t mem_buf, int n)
	163	{
	164	switch (n) {
	165	case S390_V0L_REGNUM ... S390_V15L_REGNUM:
	166	env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
	167	return 8;
	168	case S390_V16_REGNUM ... S390_V31_REGNUM:
	169	env->vregs[n][0].ll = ldtul_p(mem_buf);
	170	env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
	171	return 16;
	172	default:
	173	return 0;
	174	}
	175	}
	176
5b9f6345 DH	177	/* the values represent the positions in s390-cr.xml */
	178	#define S390_C0_REGNUM 0
	179	#define S390_C15_REGNUM 15
	180	/* total number of registers in s390-cr.xml */
	181	#define S390_NUM_C_REGS 16
	182
	183	#ifndef CONFIG_USER_ONLY
	184	static int cpu_read_c_reg(CPUS390XState env, uint8_t mem_buf, int n)
	185	{
	186	switch (n) {
	187	case S390_C0_REGNUM ... S390_C15_REGNUM:
	188	return gdb_get_regl(mem_buf, env->cregs[n]);
	189	default:
	190	return 0;
	191	}
	192	}
	193
	194	static int cpu_write_c_reg(CPUS390XState env, uint8_t mem_buf, int n)
	195	{
	196	switch (n) {
	197	case S390_C0_REGNUM ... S390_C15_REGNUM:
	198	env->cregs[n] = ldtul_p(mem_buf);
	199	if (tcg_enabled()) {
	200	tlb_flush(ENV_GET_CPU(env), 1);
	201	}
	202	cpu_synchronize_post_init(ENV_GET_CPU(env));
	203	return 8;
	204	default:
	205	return 0;
	206	}
	207	}
8a641ff6 DH	208
	209	/* the values represent the positions in s390-virt.xml */
	210	#define S390_VIRT_CKC_REGNUM 0
	211	#define S390_VIRT_CPUTM_REGNUM 1
	212	#define S390_VIRT_BEA_REGNUM 2
	213	#define S390_VIRT_PREFIX_REGNUM 3
	214	#define S390_VIRT_PP_REGNUM 4
	215	#define S390_VIRT_PFT_REGNUM 5
	216	#define S390_VIRT_PFS_REGNUM 6
	217	#define S390_VIRT_PFC_REGNUM 7
	218	/* total number of registers in s390-virt.xml */
	219	#define S390_NUM_VIRT_REGS 8
	220
	221	static int cpu_read_virt_reg(CPUS390XState env, uint8_t mem_buf, int n)
	222	{
	223	switch (n) {
	224	case S390_VIRT_CKC_REGNUM:
	225	return gdb_get_regl(mem_buf, env->ckc);
	226	case S390_VIRT_CPUTM_REGNUM:
	227	return gdb_get_regl(mem_buf, env->cputm);
	228	case S390_VIRT_BEA_REGNUM:
	229	return gdb_get_regl(mem_buf, env->gbea);
	230	case S390_VIRT_PREFIX_REGNUM:
	231	return gdb_get_regl(mem_buf, env->psa);
	232	case S390_VIRT_PP_REGNUM:
	233	return gdb_get_regl(mem_buf, env->pp);
	234	case S390_VIRT_PFT_REGNUM:
	235	return gdb_get_regl(mem_buf, env->pfault_token);
	236	case S390_VIRT_PFS_REGNUM:
	237	return gdb_get_regl(mem_buf, env->pfault_select);
	238	case S390_VIRT_PFC_REGNUM:
	239	return gdb_get_regl(mem_buf, env->pfault_compare);
	240	default:
	241	return 0;
	242	}
	243	}
	244
	245	static int cpu_write_virt_reg(CPUS390XState env, uint8_t mem_buf, int n)
	246	{
	247	switch (n) {
	248	case S390_VIRT_CKC_REGNUM:
	249	env->ckc = ldtul_p(mem_buf);
	250	cpu_synchronize_post_init(ENV_GET_CPU(env));
	251	return 8;
	252	case S390_VIRT_CPUTM_REGNUM:
	253	env->cputm = ldtul_p(mem_buf);
	254	cpu_synchronize_post_init(ENV_GET_CPU(env));
	255	return 8;
	256	case S390_VIRT_BEA_REGNUM:
	257	env->gbea = ldtul_p(mem_buf);
	258	cpu_synchronize_post_init(ENV_GET_CPU(env));
	259	return 8;
	260	case S390_VIRT_PREFIX_REGNUM:
	261	env->psa = ldtul_p(mem_buf);
	262	cpu_synchronize_post_init(ENV_GET_CPU(env));
	263	return 8;
	264	case S390_VIRT_PP_REGNUM:
	265	env->pp = ldtul_p(mem_buf);
	266	cpu_synchronize_post_init(ENV_GET_CPU(env));
	267	return 8;
	268	case S390_VIRT_PFT_REGNUM:
	269	env->pfault_token = ldtul_p(mem_buf);
	270	cpu_synchronize_post_init(ENV_GET_CPU(env));
	271	return 8;
272	case S390_VIRT_PFS_REGNUM:
273	env->pfault_select = ldtul_p(mem_buf);
274	cpu_synchronize_post_init(ENV_GET_CPU(env));
275	return 8;
276	case S390_VIRT_PFC_REGNUM:
277	env->pfault_compare = ldtul_p(mem_buf);
278	cpu_synchronize_post_init(ENV_GET_CPU(env));
279	return 8;
280	default:
281	return 0;
282	}
283	}
5b9f6345 DH	284	#endif
5b9f6345 DH	285
73d510c9 DH	286	void s390_cpu_gdb_init(CPUState *cs)
	287	{
	288	gdb_register_coprocessor(cs, cpu_read_ac_reg,
	289	cpu_write_ac_reg,
	290	S390_NUM_AC_REGS, "s390-acr.xml", 0);
	291
	292	gdb_register_coprocessor(cs, cpu_read_fp_reg,
	293	cpu_write_fp_reg,
	294	S390_NUM_FP_REGS, "s390-fpr.xml", 0);
ca343c7a EF	295
	296	gdb_register_coprocessor(cs, cpu_read_vreg,
	297	cpu_write_vreg,
	298	S390_NUM_VREGS, "s390-vx.xml", 0);
5b9f6345 DH	299
	300	#ifndef CONFIG_USER_ONLY
	301	gdb_register_coprocessor(cs, cpu_read_c_reg,
	302	cpu_write_c_reg,
	303	S390_NUM_C_REGS, "s390-cr.xml", 0);
8a641ff6 DH	304
	305	if (kvm_enabled()) {
	306	gdb_register_coprocessor(cs, cpu_read_virt_reg,
	307	cpu_write_virt_reg,
	308	S390_NUM_VIRT_REGS, "s390-virt.xml", 0);
	309	}
5b9f6345	310	#endif
cfae5c90	311	}