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[qemu.git] / target-ppc / op_mem.h
CommitLineData
76a66253
JM
1/*
2 * PowerPC emulation micro-operations for qemu.
5fafdf24 3 *
76a66253
JM
4 * Copyright (c) 2003-2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
9a64fbe4 20
e7c24003 21#include "op_mem_access.h"
d9bce9d9 22
9a64fbe4
FB
23/*** Integer load ***/
24#define PPC_LD_OP(name, op) \
d9bce9d9 25void OPPROTO glue(glue(op_l, name), MEMSUFFIX) (void) \
9a64fbe4 26{ \
d9bce9d9 27 T1 = glue(op, MEMSUFFIX)((uint32_t)T0); \
9a64fbe4
FB
28 RETURN(); \
29}
30
d9bce9d9
JM
31#if defined(TARGET_PPC64)
32#define PPC_LD_OP_64(name, op) \
33void OPPROTO glue(glue(glue(op_l, name), _64), MEMSUFFIX) (void) \
34{ \
35 T1 = glue(op, MEMSUFFIX)((uint64_t)T0); \
36 RETURN(); \
37}
38#endif
39
9a64fbe4 40#define PPC_ST_OP(name, op) \
d9bce9d9 41void OPPROTO glue(glue(op_st, name), MEMSUFFIX) (void) \
9a64fbe4 42{ \
d9bce9d9 43 glue(op, MEMSUFFIX)((uint32_t)T0, T1); \
9a64fbe4
FB
44 RETURN(); \
45}
46
d9bce9d9
JM
47#if defined(TARGET_PPC64)
48#define PPC_ST_OP_64(name, op) \
49void OPPROTO glue(glue(glue(op_st, name), _64), MEMSUFFIX) (void) \
50{ \
51 glue(op, MEMSUFFIX)((uint64_t)T0, T1); \
52 RETURN(); \
53}
54#endif
55
e7c24003
JM
56PPC_LD_OP(bz, ldu8);
57PPC_LD_OP(ha, lds16);
58PPC_LD_OP(hz, ldu16);
59PPC_LD_OP(wz, ldu32);
d9bce9d9 60#if defined(TARGET_PPC64)
e7c24003
JM
61PPC_LD_OP(wa, lds32);
62PPC_LD_OP(d, ldu64);
63PPC_LD_OP_64(bz, ldu8);
64PPC_LD_OP_64(ha, lds16);
65PPC_LD_OP_64(hz, ldu16);
66PPC_LD_OP_64(wz, ldu32);
67PPC_LD_OP_64(wa, lds32);
68PPC_LD_OP_64(d, ldu64);
d9bce9d9 69#endif
9a64fbe4 70
e7c24003
JM
71PPC_LD_OP(ha_le, lds16r);
72PPC_LD_OP(hz_le, ldu16r);
73PPC_LD_OP(wz_le, ldu32r);
d9bce9d9 74#if defined(TARGET_PPC64)
e7c24003
JM
75PPC_LD_OP(wa_le, lds32r);
76PPC_LD_OP(d_le, ldu64r);
77PPC_LD_OP_64(ha_le, lds16r);
78PPC_LD_OP_64(hz_le, ldu16r);
79PPC_LD_OP_64(wz_le, ldu32r);
80PPC_LD_OP_64(wa_le, lds32r);
81PPC_LD_OP_64(d_le, ldu64r);
d9bce9d9 82#endif
111bfab3 83
9a64fbe4 84/*** Integer store ***/
e7c24003
JM
85PPC_ST_OP(b, st8);
86PPC_ST_OP(h, st16);
87PPC_ST_OP(w, st32);
d9bce9d9 88#if defined(TARGET_PPC64)
e7c24003
JM
89PPC_ST_OP(d, st64);
90PPC_ST_OP_64(b, st8);
91PPC_ST_OP_64(h, st16);
92PPC_ST_OP_64(w, st32);
93PPC_ST_OP_64(d, st64);
d9bce9d9 94#endif
9a64fbe4 95
111bfab3
FB
96PPC_ST_OP(h_le, st16r);
97PPC_ST_OP(w_le, st32r);
d9bce9d9
JM
98#if defined(TARGET_PPC64)
99PPC_ST_OP(d_le, st64r);
d9bce9d9
JM
100PPC_ST_OP_64(h_le, st16r);
101PPC_ST_OP_64(w_le, st32r);
e7c24003 102PPC_ST_OP_64(d_le, st64r);
d9bce9d9 103#endif
111bfab3 104
9a64fbe4 105/*** Integer load and store with byte reverse ***/
e7c24003
JM
106PPC_LD_OP(hbr, ldu16r);
107PPC_LD_OP(wbr, ldu32r);
ac9eb073
FB
108PPC_ST_OP(hbr, st16r);
109PPC_ST_OP(wbr, st32r);
d9bce9d9 110#if defined(TARGET_PPC64)
e7c24003
JM
111PPC_LD_OP_64(hbr, ldu16r);
112PPC_LD_OP_64(wbr, ldu32r);
d9bce9d9
JM
113PPC_ST_OP_64(hbr, st16r);
114PPC_ST_OP_64(wbr, st32r);
115#endif
9a64fbe4 116
e7c24003
JM
117PPC_LD_OP(hbr_le, ldu16);
118PPC_LD_OP(wbr_le, ldu32);
119PPC_ST_OP(hbr_le, st16);
120PPC_ST_OP(wbr_le, st32);
d9bce9d9 121#if defined(TARGET_PPC64)
e7c24003
JM
122PPC_LD_OP_64(hbr_le, ldu16);
123PPC_LD_OP_64(wbr_le, ldu32);
124PPC_ST_OP_64(hbr_le, st16);
125PPC_ST_OP_64(wbr_le, st32);
d9bce9d9 126#endif
111bfab3 127
9a64fbe4 128/*** Integer load and store multiple ***/
d9bce9d9 129void OPPROTO glue(op_lmw, MEMSUFFIX) (void)
9a64fbe4 130{
76a66253 131 glue(do_lmw, MEMSUFFIX)(PARAM1);
9a64fbe4
FB
132 RETURN();
133}
134
d9bce9d9
JM
135#if defined(TARGET_PPC64)
136void OPPROTO glue(op_lmw_64, MEMSUFFIX) (void)
137{
138 glue(do_lmw_64, MEMSUFFIX)(PARAM1);
139 RETURN();
140}
141#endif
142
143void OPPROTO glue(op_lmw_le, MEMSUFFIX) (void)
9a64fbe4 144{
76a66253 145 glue(do_lmw_le, MEMSUFFIX)(PARAM1);
9a64fbe4
FB
146 RETURN();
147}
148
d9bce9d9
JM
149#if defined(TARGET_PPC64)
150void OPPROTO glue(op_lmw_le_64, MEMSUFFIX) (void)
151{
152 glue(do_lmw_le_64, MEMSUFFIX)(PARAM1);
153 RETURN();
154}
155#endif
156
157void OPPROTO glue(op_stmw, MEMSUFFIX) (void)
111bfab3 158{
76a66253 159 glue(do_stmw, MEMSUFFIX)(PARAM1);
111bfab3
FB
160 RETURN();
161}
162
d9bce9d9
JM
163#if defined(TARGET_PPC64)
164void OPPROTO glue(op_stmw_64, MEMSUFFIX) (void)
165{
166 glue(do_stmw_64, MEMSUFFIX)(PARAM1);
167 RETURN();
168}
169#endif
170
171void OPPROTO glue(op_stmw_le, MEMSUFFIX) (void)
111bfab3 172{
76a66253 173 glue(do_stmw_le, MEMSUFFIX)(PARAM1);
111bfab3
FB
174 RETURN();
175}
176
d9bce9d9
JM
177#if defined(TARGET_PPC64)
178void OPPROTO glue(op_stmw_le_64, MEMSUFFIX) (void)
179{
180 glue(do_stmw_le_64, MEMSUFFIX)(PARAM1);
181 RETURN();
182}
183#endif
184
9a64fbe4 185/*** Integer load and store strings ***/
d9bce9d9
JM
186void OPPROTO glue(op_lswi, MEMSUFFIX) (void)
187{
188 glue(do_lsw, MEMSUFFIX)(PARAM1);
189 RETURN();
190}
191
192#if defined(TARGET_PPC64)
193void OPPROTO glue(op_lswi_64, MEMSUFFIX) (void)
9a64fbe4 194{
d9bce9d9 195 glue(do_lsw_64, MEMSUFFIX)(PARAM1);
9a64fbe4
FB
196 RETURN();
197}
d9bce9d9 198#endif
9a64fbe4
FB
199
200/* PPC32 specification says we must generate an exception if
201 * rA is in the range of registers to be loaded.
202 * In an other hand, IBM says this is valid, but rA won't be loaded.
203 * For now, I'll follow the spec...
204 */
d9bce9d9
JM
205void OPPROTO glue(op_lswx, MEMSUFFIX) (void)
206{
207 /* Note: T1 comes from xer_bc then no cast is needed */
208 if (likely(T1 != 0)) {
209 if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
210 (PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) {
e1833e1f
JM
211 do_raise_exception_err(POWERPC_EXCP_PROGRAM,
212 POWERPC_EXCP_INVAL |
213 POWERPC_EXCP_INVAL_LSWX);
d9bce9d9
JM
214 } else {
215 glue(do_lsw, MEMSUFFIX)(PARAM1);
216 }
217 }
218 RETURN();
219}
220
221#if defined(TARGET_PPC64)
222void OPPROTO glue(op_lswx_64, MEMSUFFIX) (void)
223{
224 /* Note: T1 comes from xer_bc then no cast is needed */
225 if (likely(T1 != 0)) {
226 if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
227 (PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) {
e1833e1f
JM
228 do_raise_exception_err(POWERPC_EXCP_PROGRAM,
229 POWERPC_EXCP_INVAL |
230 POWERPC_EXCP_INVAL_LSWX);
d9bce9d9
JM
231 } else {
232 glue(do_lsw_64, MEMSUFFIX)(PARAM1);
233 }
234 }
235 RETURN();
236}
237#endif
238
d9bce9d9
JM
239void OPPROTO glue(op_stsw, MEMSUFFIX) (void)
240{
241 glue(do_stsw, MEMSUFFIX)(PARAM1);
242 RETURN();
243}
244
245#if defined(TARGET_PPC64)
246void OPPROTO glue(op_stsw_64, MEMSUFFIX) (void)
247{
248 glue(do_stsw_64, MEMSUFFIX)(PARAM1);
249 RETURN();
250}
251#endif
111bfab3 252
9a64fbe4
FB
253/*** Floating-point store ***/
254#define PPC_STF_OP(name, op) \
d9bce9d9
JM
255void OPPROTO glue(glue(op_st, name), MEMSUFFIX) (void) \
256{ \
257 glue(op, MEMSUFFIX)((uint32_t)T0, FT0); \
258 RETURN(); \
259}
260
261#if defined(TARGET_PPC64)
262#define PPC_STF_OP_64(name, op) \
263void OPPROTO glue(glue(glue(op_st, name), _64), MEMSUFFIX) (void) \
9a64fbe4 264{ \
d9bce9d9 265 glue(op, MEMSUFFIX)((uint64_t)T0, FT0); \
9a64fbe4
FB
266 RETURN(); \
267}
d9bce9d9 268#endif
9a64fbe4 269
0ca9d380 270static always_inline void glue(stfs, MEMSUFFIX) (target_ulong EA, float64 d)
477023a6
JM
271{
272 glue(stfl, MEMSUFFIX)(EA, float64_to_float32(d, &env->fp_status));
273}
274
0ca9d380 275static always_inline void glue(stfiw, MEMSUFFIX) (target_ulong EA, float64 d)
477023a6 276{
0ca9d380 277 CPU_DoubleU u;
477023a6
JM
278
279 /* Store the low order 32 bits without any conversion */
280 u.d = d;
0ca9d380 281 glue(st32, MEMSUFFIX)(EA, u.l.lower);
477023a6
JM
282}
283
9a64fbe4 284PPC_STF_OP(fd, stfq);
477023a6 285PPC_STF_OP(fs, stfs);
5b8105fa 286PPC_STF_OP(fiw, stfiw);
d9bce9d9
JM
287#if defined(TARGET_PPC64)
288PPC_STF_OP_64(fd, stfq);
477023a6 289PPC_STF_OP_64(fs, stfs);
5b8105fa 290PPC_STF_OP_64(fiw, stfiw);
d9bce9d9 291#endif
9a64fbe4 292
0ca9d380 293static always_inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, float64 d)
111bfab3 294{
0ca9d380 295 CPU_DoubleU u;
111bfab3
FB
296
297 u.d = d;
0ca9d380 298 u.ll = bswap64(u.ll);
111bfab3
FB
299 glue(stfq, MEMSUFFIX)(EA, u.d);
300}
301
0ca9d380 302static always_inline void glue(stfsr, MEMSUFFIX) (target_ulong EA, float64 d)
111bfab3 303{
0ca9d380 304 CPU_FloatU u;
111bfab3 305
477023a6 306 u.f = float64_to_float32(d, &env->fp_status);
0ca9d380 307 u.l = bswap32(u.l);
111bfab3
FB
308 glue(stfl, MEMSUFFIX)(EA, u.f);
309}
310
0ca9d380 311static always_inline void glue(stfiwr, MEMSUFFIX) (target_ulong EA, float64 d)
477023a6 312{
0ca9d380 313 CPU_DoubleU u;
477023a6
JM
314
315 /* Store the low order 32 bits without any conversion */
316 u.d = d;
0ca9d380
AJ
317 u.l.lower = bswap32(u.l.lower);
318 glue(st32, MEMSUFFIX)(EA, u.l.lower);
477023a6
JM
319}
320
111bfab3 321PPC_STF_OP(fd_le, stfqr);
477023a6 322PPC_STF_OP(fs_le, stfsr);
5b8105fa 323PPC_STF_OP(fiw_le, stfiwr);
d9bce9d9
JM
324#if defined(TARGET_PPC64)
325PPC_STF_OP_64(fd_le, stfqr);
477023a6 326PPC_STF_OP_64(fs_le, stfsr);
5b8105fa 327PPC_STF_OP_64(fiw_le, stfiwr);
d9bce9d9 328#endif
111bfab3 329
9a64fbe4
FB
330/*** Floating-point load ***/
331#define PPC_LDF_OP(name, op) \
d9bce9d9
JM
332void OPPROTO glue(glue(op_l, name), MEMSUFFIX) (void) \
333{ \
334 FT0 = glue(op, MEMSUFFIX)((uint32_t)T0); \
335 RETURN(); \
336}
337
338#if defined(TARGET_PPC64)
339#define PPC_LDF_OP_64(name, op) \
340void OPPROTO glue(glue(glue(op_l, name), _64), MEMSUFFIX) (void) \
9a64fbe4 341{ \
d9bce9d9 342 FT0 = glue(op, MEMSUFFIX)((uint64_t)T0); \
9a64fbe4
FB
343 RETURN(); \
344}
d9bce9d9 345#endif
9a64fbe4 346
0ca9d380 347static always_inline float64 glue(ldfs, MEMSUFFIX) (target_ulong EA)
477023a6
JM
348{
349 return float32_to_float64(glue(ldfl, MEMSUFFIX)(EA), &env->fp_status);
350}
351
9a64fbe4 352PPC_LDF_OP(fd, ldfq);
477023a6 353PPC_LDF_OP(fs, ldfs);
d9bce9d9
JM
354#if defined(TARGET_PPC64)
355PPC_LDF_OP_64(fd, ldfq);
477023a6 356PPC_LDF_OP_64(fs, ldfs);
d9bce9d9 357#endif
9a64fbe4 358
0ca9d380 359static always_inline float64 glue(ldfqr, MEMSUFFIX) (target_ulong EA)
111bfab3 360{
0ca9d380 361 CPU_DoubleU u;
111bfab3
FB
362
363 u.d = glue(ldfq, MEMSUFFIX)(EA);
0ca9d380 364 u.ll = bswap64(u.ll);
111bfab3
FB
365
366 return u.d;
367}
368
0ca9d380 369static always_inline float64 glue(ldfsr, MEMSUFFIX) (target_ulong EA)
111bfab3 370{
0ca9d380 371 CPU_FloatU u;
111bfab3
FB
372
373 u.f = glue(ldfl, MEMSUFFIX)(EA);
0ca9d380 374 u.l = bswap32(u.l);
111bfab3 375
477023a6 376 return float32_to_float64(u.f, &env->fp_status);
111bfab3
FB
377}
378
379PPC_LDF_OP(fd_le, ldfqr);
477023a6 380PPC_LDF_OP(fs_le, ldfsr);
d9bce9d9
JM
381#if defined(TARGET_PPC64)
382PPC_LDF_OP_64(fd_le, ldfqr);
477023a6 383PPC_LDF_OP_64(fs_le, ldfsr);
d9bce9d9 384#endif
111bfab3 385
985a19d6 386/* Load and set reservation */
d9bce9d9
JM
387void OPPROTO glue(op_lwarx, MEMSUFFIX) (void)
388{
389 if (unlikely(T0 & 0x03)) {
e1833e1f 390 do_raise_exception(POWERPC_EXCP_ALIGN);
d9bce9d9 391 } else {
e7c24003 392 T1 = glue(ldu32, MEMSUFFIX)((uint32_t)T0);
36081602 393 env->reserve = (uint32_t)T0;
d9bce9d9
JM
394 }
395 RETURN();
396}
397
398#if defined(TARGET_PPC64)
399void OPPROTO glue(op_lwarx_64, MEMSUFFIX) (void)
400{
401 if (unlikely(T0 & 0x03)) {
e1833e1f 402 do_raise_exception(POWERPC_EXCP_ALIGN);
d9bce9d9 403 } else {
e7c24003 404 T1 = glue(ldu32, MEMSUFFIX)((uint64_t)T0);
36081602 405 env->reserve = (uint64_t)T0;
d9bce9d9
JM
406 }
407 RETURN();
408}
409
426613db
JM
410void OPPROTO glue(op_ldarx, MEMSUFFIX) (void)
411{
412 if (unlikely(T0 & 0x03)) {
e1833e1f 413 do_raise_exception(POWERPC_EXCP_ALIGN);
426613db 414 } else {
e7c24003 415 T1 = glue(ldu64, MEMSUFFIX)((uint32_t)T0);
36081602 416 env->reserve = (uint32_t)T0;
426613db
JM
417 }
418 RETURN();
419}
420
d9bce9d9
JM
421void OPPROTO glue(op_ldarx_64, MEMSUFFIX) (void)
422{
423 if (unlikely(T0 & 0x03)) {
e1833e1f 424 do_raise_exception(POWERPC_EXCP_ALIGN);
d9bce9d9 425 } else {
e7c24003 426 T1 = glue(ldu64, MEMSUFFIX)((uint64_t)T0);
36081602 427 env->reserve = (uint64_t)T0;
d9bce9d9
JM
428 }
429 RETURN();
430}
431#endif
432
433void OPPROTO glue(op_lwarx_le, MEMSUFFIX) (void)
434{
435 if (unlikely(T0 & 0x03)) {
e1833e1f 436 do_raise_exception(POWERPC_EXCP_ALIGN);
d9bce9d9 437 } else {
e7c24003 438 T1 = glue(ldu32r, MEMSUFFIX)((uint32_t)T0);
36081602 439 env->reserve = (uint32_t)T0;
d9bce9d9
JM
440 }
441 RETURN();
442}
443
444#if defined(TARGET_PPC64)
445void OPPROTO glue(op_lwarx_le_64, MEMSUFFIX) (void)
985a19d6 446{
76a66253 447 if (unlikely(T0 & 0x03)) {
e1833e1f 448 do_raise_exception(POWERPC_EXCP_ALIGN);
985a19d6 449 } else {
e7c24003 450 T1 = glue(ldu32r, MEMSUFFIX)((uint64_t)T0);
36081602 451 env->reserve = (uint64_t)T0;
985a19d6
FB
452 }
453 RETURN();
454}
455
426613db
JM
456void OPPROTO glue(op_ldarx_le, MEMSUFFIX) (void)
457{
458 if (unlikely(T0 & 0x03)) {
e1833e1f 459 do_raise_exception(POWERPC_EXCP_ALIGN);
426613db 460 } else {
e7c24003 461 T1 = glue(ldu64r, MEMSUFFIX)((uint32_t)T0);
36081602 462 env->reserve = (uint32_t)T0;
426613db
JM
463 }
464 RETURN();
465}
466
d9bce9d9 467void OPPROTO glue(op_ldarx_le_64, MEMSUFFIX) (void)
111bfab3 468{
76a66253 469 if (unlikely(T0 & 0x03)) {
e1833e1f 470 do_raise_exception(POWERPC_EXCP_ALIGN);
111bfab3 471 } else {
e7c24003 472 T1 = glue(ldu64r, MEMSUFFIX)((uint64_t)T0);
36081602 473 env->reserve = (uint64_t)T0;
111bfab3
FB
474 }
475 RETURN();
476}
d9bce9d9 477#endif
111bfab3 478
9a64fbe4 479/* Store with reservation */
d9bce9d9
JM
480void OPPROTO glue(op_stwcx, MEMSUFFIX) (void)
481{
482 if (unlikely(T0 & 0x03)) {
e1833e1f 483 do_raise_exception(POWERPC_EXCP_ALIGN);
d9bce9d9 484 } else {
36081602 485 if (unlikely(env->reserve != (uint32_t)T0)) {
966439a6 486 env->crf[0] = xer_so;
d9bce9d9 487 } else {
e7c24003 488 glue(st32, MEMSUFFIX)((uint32_t)T0, T1);
966439a6 489 env->crf[0] = xer_so | 0x02;
d9bce9d9
JM
490 }
491 }
a73666f6 492 env->reserve = (target_ulong)-1ULL;
d9bce9d9
JM
493 RETURN();
494}
495
496#if defined(TARGET_PPC64)
497void OPPROTO glue(op_stwcx_64, MEMSUFFIX) (void)
498{
499 if (unlikely(T0 & 0x03)) {
e1833e1f 500 do_raise_exception(POWERPC_EXCP_ALIGN);
d9bce9d9 501 } else {
36081602 502 if (unlikely(env->reserve != (uint64_t)T0)) {
966439a6 503 env->crf[0] = xer_so;
d9bce9d9 504 } else {
e7c24003 505 glue(st32, MEMSUFFIX)((uint64_t)T0, T1);
966439a6 506 env->crf[0] = xer_so | 0x02;
d9bce9d9
JM
507 }
508 }
a73666f6 509 env->reserve = (target_ulong)-1ULL;
d9bce9d9
JM
510 RETURN();
511}
512
426613db
JM
513void OPPROTO glue(op_stdcx, MEMSUFFIX) (void)
514{
515 if (unlikely(T0 & 0x03)) {
e1833e1f 516 do_raise_exception(POWERPC_EXCP_ALIGN);
426613db 517 } else {
36081602 518 if (unlikely(env->reserve != (uint32_t)T0)) {
966439a6 519 env->crf[0] = xer_so;
426613db 520 } else {
e7c24003 521 glue(st64, MEMSUFFIX)((uint32_t)T0, T1);
966439a6 522 env->crf[0] = xer_so | 0x02;
426613db
JM
523 }
524 }
a73666f6 525 env->reserve = (target_ulong)-1ULL;
426613db
JM
526 RETURN();
527}
528
d9bce9d9 529void OPPROTO glue(op_stdcx_64, MEMSUFFIX) (void)
9a64fbe4 530{
76a66253 531 if (unlikely(T0 & 0x03)) {
e1833e1f 532 do_raise_exception(POWERPC_EXCP_ALIGN);
9a64fbe4 533 } else {
36081602 534 if (unlikely(env->reserve != (uint64_t)T0)) {
966439a6 535 env->crf[0] = xer_so;
9a64fbe4 536 } else {
e7c24003 537 glue(st64, MEMSUFFIX)((uint64_t)T0, T1);
966439a6 538 env->crf[0] = xer_so | 0x02;
d9bce9d9
JM
539 }
540 }
a73666f6 541 env->reserve = (target_ulong)-1ULL;
d9bce9d9
JM
542 RETURN();
543}
544#endif
545
546void OPPROTO glue(op_stwcx_le, MEMSUFFIX) (void)
547{
548 if (unlikely(T0 & 0x03)) {
e1833e1f 549 do_raise_exception(POWERPC_EXCP_ALIGN);
d9bce9d9 550 } else {
36081602 551 if (unlikely(env->reserve != (uint32_t)T0)) {
966439a6 552 env->crf[0] = xer_so;
d9bce9d9
JM
553 } else {
554 glue(st32r, MEMSUFFIX)((uint32_t)T0, T1);
966439a6 555 env->crf[0] = xer_so | 0x02;
9a64fbe4
FB
556 }
557 }
a73666f6 558 env->reserve = (target_ulong)-1ULL;
9a64fbe4
FB
559 RETURN();
560}
561
d9bce9d9
JM
562#if defined(TARGET_PPC64)
563void OPPROTO glue(op_stwcx_le_64, MEMSUFFIX) (void)
111bfab3 564{
76a66253 565 if (unlikely(T0 & 0x03)) {
e1833e1f 566 do_raise_exception(POWERPC_EXCP_ALIGN);
111bfab3 567 } else {
36081602 568 if (unlikely(env->reserve != (uint64_t)T0)) {
966439a6 569 env->crf[0] = xer_so;
111bfab3 570 } else {
d9bce9d9 571 glue(st32r, MEMSUFFIX)((uint64_t)T0, T1);
966439a6 572 env->crf[0] = xer_so | 0x02;
111bfab3
FB
573 }
574 }
a73666f6 575 env->reserve = (target_ulong)-1ULL;
111bfab3
FB
576 RETURN();
577}
578
426613db
JM
579void OPPROTO glue(op_stdcx_le, MEMSUFFIX) (void)
580{
581 if (unlikely(T0 & 0x03)) {
e1833e1f 582 do_raise_exception(POWERPC_EXCP_ALIGN);
426613db 583 } else {
36081602 584 if (unlikely(env->reserve != (uint32_t)T0)) {
966439a6 585 env->crf[0] = xer_so;
426613db
JM
586 } else {
587 glue(st64r, MEMSUFFIX)((uint32_t)T0, T1);
966439a6 588 env->crf[0] = xer_so | 0x02;
426613db
JM
589 }
590 }
a73666f6 591 env->reserve = (target_ulong)-1ULL;
426613db
JM
592 RETURN();
593}
594
d9bce9d9
JM
595void OPPROTO glue(op_stdcx_le_64, MEMSUFFIX) (void)
596{
597 if (unlikely(T0 & 0x03)) {
e1833e1f 598 do_raise_exception(POWERPC_EXCP_ALIGN);
d9bce9d9 599 } else {
36081602 600 if (unlikely(env->reserve != (uint64_t)T0)) {
966439a6 601 env->crf[0] = xer_so;
d9bce9d9
JM
602 } else {
603 glue(st64r, MEMSUFFIX)((uint64_t)T0, T1);
966439a6 604 env->crf[0] = xer_so | 0x02;
d9bce9d9
JM
605 }
606 }
a73666f6 607 env->reserve = (target_ulong)-1ULL;
d9bce9d9
JM
608 RETURN();
609}
610#endif
611
d63001d1
JM
612void OPPROTO glue(op_dcbz_l32, MEMSUFFIX) (void)
613{
e7c24003
JM
614 T0 &= ~((uint32_t)31);
615 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
616 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
617 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
618 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
619 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
620 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
621 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
622 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
d63001d1
JM
623 RETURN();
624}
625
626void OPPROTO glue(op_dcbz_l64, MEMSUFFIX) (void)
d9bce9d9 627{
e7c24003
JM
628 T0 &= ~((uint32_t)63);
629 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
630 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
631 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
632 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
633 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
634 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
635 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
636 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
637 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0);
638 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0);
639 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0);
640 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0);
641 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0);
642 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0);
643 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0);
644 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0);
d63001d1
JM
645 RETURN();
646}
647
648void OPPROTO glue(op_dcbz_l128, MEMSUFFIX) (void)
649{
e7c24003
JM
650 T0 &= ~((uint32_t)127);
651 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
652 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
653 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
654 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
655 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
656 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
657 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
658 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
659 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0);
660 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0);
661 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0);
662 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0);
663 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0);
664 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0);
665 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0);
666 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0);
667 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x40UL), 0);
668 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x44UL), 0);
669 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x48UL), 0);
670 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x4CUL), 0);
671 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x50UL), 0);
672 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x54UL), 0);
673 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x58UL), 0);
674 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x5CUL), 0);
675 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x60UL), 0);
676 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x64UL), 0);
677 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x68UL), 0);
678 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x6CUL), 0);
679 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x70UL), 0);
680 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x74UL), 0);
681 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x78UL), 0);
682 glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x7CUL), 0);
d63001d1
JM
683 RETURN();
684}
685
686void OPPROTO glue(op_dcbz, MEMSUFFIX) (void)
687{
688 glue(do_dcbz, MEMSUFFIX)();
d9bce9d9
JM
689 RETURN();
690}
691
692#if defined(TARGET_PPC64)
d63001d1
JM
693void OPPROTO glue(op_dcbz_l32_64, MEMSUFFIX) (void)
694{
e7c24003
JM
695 T0 &= ~((uint64_t)31);
696 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
697 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
698 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
699 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
700 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
701 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
702 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
703 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
d63001d1
JM
704 RETURN();
705}
706
707void OPPROTO glue(op_dcbz_l64_64, MEMSUFFIX) (void)
9a64fbe4 708{
e7c24003
JM
709 T0 &= ~((uint64_t)63);
710 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
711 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
712 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
713 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
714 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
715 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
716 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
717 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
718 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0);
719 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0);
720 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0);
721 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0);
722 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0);
723 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0);
724 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0);
725 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0);
d63001d1
JM
726 RETURN();
727}
728
729void OPPROTO glue(op_dcbz_l128_64, MEMSUFFIX) (void)
730{
e7c24003
JM
731 T0 &= ~((uint64_t)127);
732 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
733 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
734 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
735 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
736 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
737 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
738 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
739 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
740 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0);
741 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0);
742 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0);
743 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0);
744 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0);
745 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0);
746 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0);
747 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0);
748 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x40UL), 0);
749 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x44UL), 0);
750 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x48UL), 0);
751 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x4CUL), 0);
752 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x50UL), 0);
753 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x54UL), 0);
754 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x58UL), 0);
755 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x5CUL), 0);
756 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x60UL), 0);
757 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x64UL), 0);
758 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x68UL), 0);
759 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x6CUL), 0);
760 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x70UL), 0);
761 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x74UL), 0);
762 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x78UL), 0);
763 glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x7CUL), 0);
d63001d1
JM
764 RETURN();
765}
766
767void OPPROTO glue(op_dcbz_64, MEMSUFFIX) (void)
768{
769 glue(do_dcbz_64, MEMSUFFIX)();
9a64fbe4
FB
770 RETURN();
771}
d9bce9d9 772#endif
9a64fbe4 773
36f69651
JM
774/* Instruction cache block invalidate */
775void OPPROTO glue(op_icbi, MEMSUFFIX) (void)
776{
777 glue(do_icbi, MEMSUFFIX)();
778 RETURN();
779}
780
781#if defined(TARGET_PPC64)
782void OPPROTO glue(op_icbi_64, MEMSUFFIX) (void)
783{
784 glue(do_icbi_64, MEMSUFFIX)();
785 RETURN();
786}
787#endif
788
9a64fbe4 789/* External access */
d9bce9d9
JM
790void OPPROTO glue(op_eciwx, MEMSUFFIX) (void)
791{
e7c24003 792 T1 = glue(ldu32, MEMSUFFIX)((uint32_t)T0);
d9bce9d9
JM
793 RETURN();
794}
795
796#if defined(TARGET_PPC64)
797void OPPROTO glue(op_eciwx_64, MEMSUFFIX) (void)
798{
e7c24003 799 T1 = glue(ldu32, MEMSUFFIX)((uint64_t)T0);
d9bce9d9
JM
800 RETURN();
801}
802#endif
803
804void OPPROTO glue(op_ecowx, MEMSUFFIX) (void)
805{
e7c24003 806 glue(st32, MEMSUFFIX)((uint32_t)T0, T1);
d9bce9d9
JM
807 RETURN();
808}
809
810#if defined(TARGET_PPC64)
811void OPPROTO glue(op_ecowx_64, MEMSUFFIX) (void)
9a64fbe4 812{
e7c24003 813 glue(st32, MEMSUFFIX)((uint64_t)T0, T1);
9a64fbe4
FB
814 RETURN();
815}
d9bce9d9 816#endif
9a64fbe4 817
d9bce9d9 818void OPPROTO glue(op_eciwx_le, MEMSUFFIX) (void)
9a64fbe4 819{
e7c24003 820 T1 = glue(ldu32r, MEMSUFFIX)((uint32_t)T0);
9a64fbe4
FB
821 RETURN();
822}
823
d9bce9d9
JM
824#if defined(TARGET_PPC64)
825void OPPROTO glue(op_eciwx_le_64, MEMSUFFIX) (void)
111bfab3 826{
e7c24003 827 T1 = glue(ldu32r, MEMSUFFIX)((uint64_t)T0);
111bfab3
FB
828 RETURN();
829}
d9bce9d9 830#endif
111bfab3 831
d9bce9d9 832void OPPROTO glue(op_ecowx_le, MEMSUFFIX) (void)
111bfab3 833{
d9bce9d9 834 glue(st32r, MEMSUFFIX)((uint32_t)T0, T1);
111bfab3
FB
835 RETURN();
836}
837
d9bce9d9
JM
838#if defined(TARGET_PPC64)
839void OPPROTO glue(op_ecowx_le_64, MEMSUFFIX) (void)
840{
841 glue(st32r, MEMSUFFIX)((uint64_t)T0, T1);
842 RETURN();
843}
844#endif
845
76a66253
JM
846/* XXX: those micro-ops need tests ! */
847/* PowerPC 601 specific instructions (POWER bridge) */
848void OPPROTO glue(op_POWER_lscbx, MEMSUFFIX) (void)
849{
850 /* When byte count is 0, do nothing */
d9bce9d9 851 if (likely(T1 != 0)) {
76a66253
JM
852 glue(do_POWER_lscbx, MEMSUFFIX)(PARAM1, PARAM2, PARAM3);
853 }
854 RETURN();
855}
856
857/* POWER2 quad load and store */
858/* XXX: TAGs are not managed */
859void OPPROTO glue(op_POWER2_lfq, MEMSUFFIX) (void)
860{
861 glue(do_POWER2_lfq, MEMSUFFIX)();
862 RETURN();
863}
864
865void glue(op_POWER2_lfq_le, MEMSUFFIX) (void)
866{
867 glue(do_POWER2_lfq_le, MEMSUFFIX)();
868 RETURN();
869}
870
871void OPPROTO glue(op_POWER2_stfq, MEMSUFFIX) (void)
872{
873 glue(do_POWER2_stfq, MEMSUFFIX)();
874 RETURN();
875}
876
877void OPPROTO glue(op_POWER2_stfq_le, MEMSUFFIX) (void)
878{
879 glue(do_POWER2_stfq_le, MEMSUFFIX)();
880 RETURN();
881}
882
a9d9eb8f
JM
883/* Altivec vector extension */
884#if defined(WORDS_BIGENDIAN)
885#define VR_DWORD0 0
886#define VR_DWORD1 1
887#else
888#define VR_DWORD0 1
889#define VR_DWORD1 0
890#endif
891void OPPROTO glue(op_vr_lvx, MEMSUFFIX) (void)
892{
e7c24003
JM
893 AVR0.u64[VR_DWORD0] = glue(ldu64, MEMSUFFIX)((uint32_t)T0);
894 AVR0.u64[VR_DWORD1] = glue(ldu64, MEMSUFFIX)((uint32_t)T0 + 8);
a9d9eb8f
JM
895}
896
897void OPPROTO glue(op_vr_lvx_le, MEMSUFFIX) (void)
898{
e7c24003
JM
899 AVR0.u64[VR_DWORD1] = glue(ldu64r, MEMSUFFIX)((uint32_t)T0);
900 AVR0.u64[VR_DWORD0] = glue(ldu64r, MEMSUFFIX)((uint32_t)T0 + 8);
a9d9eb8f
JM
901}
902
903void OPPROTO glue(op_vr_stvx, MEMSUFFIX) (void)
904{
e7c24003
JM
905 glue(st64, MEMSUFFIX)((uint32_t)T0, AVR0.u64[VR_DWORD0]);
906 glue(st64, MEMSUFFIX)((uint32_t)T0 + 8, AVR0.u64[VR_DWORD1]);
a9d9eb8f
JM
907}
908
909void OPPROTO glue(op_vr_stvx_le, MEMSUFFIX) (void)
910{
e7c24003
JM
911 glue(st64r, MEMSUFFIX)((uint32_t)T0, AVR0.u64[VR_DWORD1]);
912 glue(st64r, MEMSUFFIX)((uint32_t)T0 + 8, AVR0.u64[VR_DWORD0]);
a9d9eb8f
JM
913}
914
915#if defined(TARGET_PPC64)
916void OPPROTO glue(op_vr_lvx_64, MEMSUFFIX) (void)
917{
e7c24003
JM
918 AVR0.u64[VR_DWORD0] = glue(ldu64, MEMSUFFIX)((uint64_t)T0);
919 AVR0.u64[VR_DWORD1] = glue(ldu64, MEMSUFFIX)((uint64_t)T0 + 8);
a9d9eb8f
JM
920}
921
922void OPPROTO glue(op_vr_lvx_le_64, MEMSUFFIX) (void)
923{
e7c24003
JM
924 AVR0.u64[VR_DWORD1] = glue(ldu64r, MEMSUFFIX)((uint64_t)T0);
925 AVR0.u64[VR_DWORD0] = glue(ldu64r, MEMSUFFIX)((uint64_t)T0 + 8);
a9d9eb8f
JM
926}
927
928void OPPROTO glue(op_vr_stvx_64, MEMSUFFIX) (void)
929{
e7c24003
JM
930 glue(st64, MEMSUFFIX)((uint64_t)T0, AVR0.u64[VR_DWORD0]);
931 glue(st64, MEMSUFFIX)((uint64_t)T0 + 8, AVR0.u64[VR_DWORD1]);
a9d9eb8f
JM
932}
933
934void OPPROTO glue(op_vr_stvx_le_64, MEMSUFFIX) (void)
935{
e7c24003
JM
936 glue(st64r, MEMSUFFIX)((uint64_t)T0, AVR0.u64[VR_DWORD1]);
937 glue(st64r, MEMSUFFIX)((uint64_t)T0 + 8, AVR0.u64[VR_DWORD0]);
a9d9eb8f
JM
938}
939#endif
940#undef VR_DWORD0
941#undef VR_DWORD1
942
0487d6a8
JM
943/* SPE extension */
944#define _PPC_SPE_LD_OP(name, op) \
945void OPPROTO glue(glue(op_spe_l, name), MEMSUFFIX) (void) \
946{ \
947 T1_64 = glue(op, MEMSUFFIX)((uint32_t)T0); \
948 RETURN(); \
949}
950
951#if defined(TARGET_PPC64)
952#define _PPC_SPE_LD_OP_64(name, op) \
953void OPPROTO glue(glue(glue(op_spe_l, name), _64), MEMSUFFIX) (void) \
954{ \
955 T1_64 = glue(op, MEMSUFFIX)((uint64_t)T0); \
956 RETURN(); \
957}
958#define PPC_SPE_LD_OP(name, op) \
959_PPC_SPE_LD_OP(name, op); \
960_PPC_SPE_LD_OP_64(name, op)
961#else
962#define PPC_SPE_LD_OP(name, op) \
963_PPC_SPE_LD_OP(name, op)
964#endif
965
0487d6a8
JM
966#define _PPC_SPE_ST_OP(name, op) \
967void OPPROTO glue(glue(op_spe_st, name), MEMSUFFIX) (void) \
968{ \
969 glue(op, MEMSUFFIX)((uint32_t)T0, T1_64); \
970 RETURN(); \
971}
972
973#if defined(TARGET_PPC64)
974#define _PPC_SPE_ST_OP_64(name, op) \
975void OPPROTO glue(glue(glue(op_spe_st, name), _64), MEMSUFFIX) (void) \
976{ \
977 glue(op, MEMSUFFIX)((uint64_t)T0, T1_64); \
978 RETURN(); \
979}
980#define PPC_SPE_ST_OP(name, op) \
981_PPC_SPE_ST_OP(name, op); \
982_PPC_SPE_ST_OP_64(name, op)
983#else
984#define PPC_SPE_ST_OP(name, op) \
985_PPC_SPE_ST_OP(name, op)
986#endif
987
988#if !defined(TARGET_PPC64)
e7c24003
JM
989PPC_SPE_LD_OP(dd, ldu64);
990PPC_SPE_ST_OP(dd, st64);
991PPC_SPE_LD_OP(dd_le, ldu64r);
0487d6a8
JM
992PPC_SPE_ST_OP(dd_le, st64r);
993#endif
b068d6a7 994static always_inline uint64_t glue(spe_ldw, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
995{
996 uint64_t ret;
e7c24003
JM
997 ret = (uint64_t)glue(ldu32, MEMSUFFIX)(EA) << 32;
998 ret |= (uint64_t)glue(ldu32, MEMSUFFIX)(EA + 4);
0487d6a8
JM
999 return ret;
1000}
1001PPC_SPE_LD_OP(dw, spe_ldw);
b068d6a7
JM
1002static always_inline void glue(spe_stdw, MEMSUFFIX) (target_ulong EA,
1003 uint64_t data)
0487d6a8 1004{
e7c24003
JM
1005 glue(st32, MEMSUFFIX)(EA, data >> 32);
1006 glue(st32, MEMSUFFIX)(EA + 4, data);
0487d6a8
JM
1007}
1008PPC_SPE_ST_OP(dw, spe_stdw);
b068d6a7 1009static always_inline uint64_t glue(spe_ldw_le, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1010{
1011 uint64_t ret;
e7c24003
JM
1012 ret = (uint64_t)glue(ldu32r, MEMSUFFIX)(EA) << 32;
1013 ret |= (uint64_t)glue(ldu32r, MEMSUFFIX)(EA + 4);
0487d6a8
JM
1014 return ret;
1015}
1016PPC_SPE_LD_OP(dw_le, spe_ldw_le);
b068d6a7
JM
1017static always_inline void glue(spe_stdw_le, MEMSUFFIX) (target_ulong EA,
1018 uint64_t data)
0487d6a8
JM
1019{
1020 glue(st32r, MEMSUFFIX)(EA, data >> 32);
1021 glue(st32r, MEMSUFFIX)(EA + 4, data);
1022}
1023PPC_SPE_ST_OP(dw_le, spe_stdw_le);
b068d6a7 1024static always_inline uint64_t glue(spe_ldh, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1025{
1026 uint64_t ret;
e7c24003
JM
1027 ret = (uint64_t)glue(ldu16, MEMSUFFIX)(EA) << 48;
1028 ret |= (uint64_t)glue(ldu16, MEMSUFFIX)(EA + 2) << 32;
1029 ret |= (uint64_t)glue(ldu16, MEMSUFFIX)(EA + 4) << 16;
1030 ret |= (uint64_t)glue(ldu16, MEMSUFFIX)(EA + 6);
0487d6a8
JM
1031 return ret;
1032}
1033PPC_SPE_LD_OP(dh, spe_ldh);
b068d6a7
JM
1034static always_inline void glue(spe_stdh, MEMSUFFIX) (target_ulong EA,
1035 uint64_t data)
0487d6a8 1036{
e7c24003
JM
1037 glue(st16, MEMSUFFIX)(EA, data >> 48);
1038 glue(st16, MEMSUFFIX)(EA + 2, data >> 32);
1039 glue(st16, MEMSUFFIX)(EA + 4, data >> 16);
1040 glue(st16, MEMSUFFIX)(EA + 6, data);
0487d6a8
JM
1041}
1042PPC_SPE_ST_OP(dh, spe_stdh);
b068d6a7 1043static always_inline uint64_t glue(spe_ldh_le, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1044{
1045 uint64_t ret;
e7c24003
JM
1046 ret = (uint64_t)glue(ldu16r, MEMSUFFIX)(EA) << 48;
1047 ret |= (uint64_t)glue(ldu16r, MEMSUFFIX)(EA + 2) << 32;
1048 ret |= (uint64_t)glue(ldu16r, MEMSUFFIX)(EA + 4) << 16;
1049 ret |= (uint64_t)glue(ldu16r, MEMSUFFIX)(EA + 6);
0487d6a8
JM
1050 return ret;
1051}
1052PPC_SPE_LD_OP(dh_le, spe_ldh_le);
b068d6a7
JM
1053static always_inline void glue(spe_stdh_le, MEMSUFFIX) (target_ulong EA,
1054 uint64_t data)
0487d6a8
JM
1055{
1056 glue(st16r, MEMSUFFIX)(EA, data >> 48);
1057 glue(st16r, MEMSUFFIX)(EA + 2, data >> 32);
1058 glue(st16r, MEMSUFFIX)(EA + 4, data >> 16);
1059 glue(st16r, MEMSUFFIX)(EA + 6, data);
1060}
1061PPC_SPE_ST_OP(dh_le, spe_stdh_le);
b068d6a7 1062static always_inline uint64_t glue(spe_lwhe, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1063{
1064 uint64_t ret;
e7c24003
JM
1065 ret = (uint64_t)glue(ldu16, MEMSUFFIX)(EA) << 48;
1066 ret |= (uint64_t)glue(ldu16, MEMSUFFIX)(EA + 2) << 16;
0487d6a8
JM
1067 return ret;
1068}
1069PPC_SPE_LD_OP(whe, spe_lwhe);
b068d6a7
JM
1070static always_inline void glue(spe_stwhe, MEMSUFFIX) (target_ulong EA,
1071 uint64_t data)
0487d6a8 1072{
e7c24003
JM
1073 glue(st16, MEMSUFFIX)(EA, data >> 48);
1074 glue(st16, MEMSUFFIX)(EA + 2, data >> 16);
0487d6a8
JM
1075}
1076PPC_SPE_ST_OP(whe, spe_stwhe);
b068d6a7 1077static always_inline uint64_t glue(spe_lwhe_le, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1078{
1079 uint64_t ret;
e7c24003
JM
1080 ret = (uint64_t)glue(ldu16r, MEMSUFFIX)(EA) << 48;
1081 ret |= (uint64_t)glue(ldu16r, MEMSUFFIX)(EA + 2) << 16;
0487d6a8
JM
1082 return ret;
1083}
1084PPC_SPE_LD_OP(whe_le, spe_lwhe_le);
b068d6a7
JM
1085static always_inline void glue(spe_stwhe_le, MEMSUFFIX) (target_ulong EA,
1086 uint64_t data)
0487d6a8
JM
1087{
1088 glue(st16r, MEMSUFFIX)(EA, data >> 48);
1089 glue(st16r, MEMSUFFIX)(EA + 2, data >> 16);
1090}
1091PPC_SPE_ST_OP(whe_le, spe_stwhe_le);
b068d6a7 1092static always_inline uint64_t glue(spe_lwhou, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1093{
1094 uint64_t ret;
e7c24003
JM
1095 ret = (uint64_t)glue(ldu16, MEMSUFFIX)(EA) << 32;
1096 ret |= (uint64_t)glue(ldu16, MEMSUFFIX)(EA + 2);
0487d6a8
JM
1097 return ret;
1098}
1099PPC_SPE_LD_OP(whou, spe_lwhou);
b068d6a7 1100static always_inline uint64_t glue(spe_lwhos, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1101{
1102 uint64_t ret;
e7c24003
JM
1103 ret = ((uint64_t)((int32_t)glue(lds16, MEMSUFFIX)(EA))) << 32;
1104 ret |= (uint64_t)((int32_t)glue(lds16, MEMSUFFIX)(EA + 2));
0487d6a8
JM
1105 return ret;
1106}
1107PPC_SPE_LD_OP(whos, spe_lwhos);
b068d6a7
JM
1108static always_inline void glue(spe_stwho, MEMSUFFIX) (target_ulong EA,
1109 uint64_t data)
0487d6a8 1110{
e7c24003
JM
1111 glue(st16, MEMSUFFIX)(EA, data >> 32);
1112 glue(st16, MEMSUFFIX)(EA + 2, data);
0487d6a8
JM
1113}
1114PPC_SPE_ST_OP(who, spe_stwho);
b068d6a7 1115static always_inline uint64_t glue(spe_lwhou_le, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1116{
1117 uint64_t ret;
e7c24003
JM
1118 ret = (uint64_t)glue(ldu16r, MEMSUFFIX)(EA) << 32;
1119 ret |= (uint64_t)glue(ldu16r, MEMSUFFIX)(EA + 2);
0487d6a8
JM
1120 return ret;
1121}
1122PPC_SPE_LD_OP(whou_le, spe_lwhou_le);
b068d6a7 1123static always_inline uint64_t glue(spe_lwhos_le, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1124{
1125 uint64_t ret;
e7c24003
JM
1126 ret = ((uint64_t)((int32_t)glue(lds16r, MEMSUFFIX)(EA))) << 32;
1127 ret |= (uint64_t)((int32_t)glue(lds16r, MEMSUFFIX)(EA + 2));
0487d6a8
JM
1128 return ret;
1129}
1130PPC_SPE_LD_OP(whos_le, spe_lwhos_le);
b068d6a7
JM
1131static always_inline void glue(spe_stwho_le, MEMSUFFIX) (target_ulong EA,
1132 uint64_t data)
0487d6a8
JM
1133{
1134 glue(st16r, MEMSUFFIX)(EA, data >> 32);
1135 glue(st16r, MEMSUFFIX)(EA + 2, data);
1136}
1137PPC_SPE_ST_OP(who_le, spe_stwho_le);
1138#if !defined(TARGET_PPC64)
b068d6a7
JM
1139static always_inline void glue(spe_stwwo, MEMSUFFIX) (target_ulong EA,
1140 uint64_t data)
0487d6a8 1141{
e7c24003 1142 glue(st32, MEMSUFFIX)(EA, data);
0487d6a8
JM
1143}
1144PPC_SPE_ST_OP(wwo, spe_stwwo);
b068d6a7
JM
1145static always_inline void glue(spe_stwwo_le, MEMSUFFIX) (target_ulong EA,
1146 uint64_t data)
0487d6a8
JM
1147{
1148 glue(st32r, MEMSUFFIX)(EA, data);
1149}
1150PPC_SPE_ST_OP(wwo_le, spe_stwwo_le);
1151#endif
b068d6a7 1152static always_inline uint64_t glue(spe_lh, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1153{
1154 uint16_t tmp;
e7c24003 1155 tmp = glue(ldu16, MEMSUFFIX)(EA);
0487d6a8
JM
1156 return ((uint64_t)tmp << 48) | ((uint64_t)tmp << 16);
1157}
1158PPC_SPE_LD_OP(h, spe_lh);
b068d6a7 1159static always_inline uint64_t glue(spe_lh_le, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1160{
1161 uint16_t tmp;
e7c24003 1162 tmp = glue(ldu16r, MEMSUFFIX)(EA);
0487d6a8
JM
1163 return ((uint64_t)tmp << 48) | ((uint64_t)tmp << 16);
1164}
1165PPC_SPE_LD_OP(h_le, spe_lh_le);
b068d6a7 1166static always_inline uint64_t glue(spe_lwwsplat, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1167{
1168 uint32_t tmp;
e7c24003 1169 tmp = glue(ldu32, MEMSUFFIX)(EA);
0487d6a8
JM
1170 return ((uint64_t)tmp << 32) | (uint64_t)tmp;
1171}
1172PPC_SPE_LD_OP(wwsplat, spe_lwwsplat);
b068d6a7
JM
1173static always_inline
1174uint64_t glue(spe_lwwsplat_le, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1175{
1176 uint32_t tmp;
e7c24003 1177 tmp = glue(ldu32r, MEMSUFFIX)(EA);
0487d6a8
JM
1178 return ((uint64_t)tmp << 32) | (uint64_t)tmp;
1179}
1180PPC_SPE_LD_OP(wwsplat_le, spe_lwwsplat_le);
b068d6a7 1181static always_inline uint64_t glue(spe_lwhsplat, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1182{
1183 uint64_t ret;
1184 uint16_t tmp;
e7c24003 1185 tmp = glue(ldu16, MEMSUFFIX)(EA);
0487d6a8 1186 ret = ((uint64_t)tmp << 48) | ((uint64_t)tmp << 32);
e7c24003 1187 tmp = glue(ldu16, MEMSUFFIX)(EA + 2);
0487d6a8
JM
1188 ret |= ((uint64_t)tmp << 16) | (uint64_t)tmp;
1189 return ret;
1190}
1191PPC_SPE_LD_OP(whsplat, spe_lwhsplat);
b068d6a7
JM
1192static always_inline
1193uint64_t glue(spe_lwhsplat_le, MEMSUFFIX) (target_ulong EA)
0487d6a8
JM
1194{
1195 uint64_t ret;
1196 uint16_t tmp;
e7c24003 1197 tmp = glue(ldu16r, MEMSUFFIX)(EA);
0487d6a8 1198 ret = ((uint64_t)tmp << 48) | ((uint64_t)tmp << 32);
e7c24003 1199 tmp = glue(ldu16r, MEMSUFFIX)(EA + 2);
0487d6a8
JM
1200 ret |= ((uint64_t)tmp << 16) | (uint64_t)tmp;
1201 return ret;
1202}
1203PPC_SPE_LD_OP(whsplat_le, spe_lwhsplat_le);
0487d6a8 1204
9a64fbe4 1205#undef MEMSUFFIX
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