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23076bb3 CM |
1 | /* |
2 | * IPMI base class | |
3 | * | |
4 | * Copyright (c) 2015 Corey Minyard, MontaVista Software, LLC | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | #ifndef HW_IPMI_H | |
26 | #define HW_IPMI_H | |
27 | ||
28 | #include "exec/memory.h" | |
29 | #include "qemu-common.h" | |
30 | #include "hw/qdev.h" | |
31 | ||
32 | #define MAX_IPMI_MSG_SIZE 300 | |
33 | ||
34 | enum ipmi_op { | |
35 | IPMI_RESET_CHASSIS, | |
36 | IPMI_POWEROFF_CHASSIS, | |
37 | IPMI_POWERON_CHASSIS, | |
38 | IPMI_POWERCYCLE_CHASSIS, | |
39 | IPMI_PULSE_DIAG_IRQ, | |
40 | IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP, | |
41 | IPMI_SEND_NMI | |
42 | }; | |
43 | ||
44 | #define IPMI_CC_INVALID_CMD 0xc1 | |
45 | #define IPMI_CC_COMMAND_INVALID_FOR_LUN 0xc2 | |
46 | #define IPMI_CC_TIMEOUT 0xc3 | |
47 | #define IPMI_CC_OUT_OF_SPACE 0xc4 | |
48 | #define IPMI_CC_INVALID_RESERVATION 0xc5 | |
49 | #define IPMI_CC_REQUEST_DATA_TRUNCATED 0xc6 | |
50 | #define IPMI_CC_REQUEST_DATA_LENGTH_INVALID 0xc7 | |
51 | #define IPMI_CC_PARM_OUT_OF_RANGE 0xc9 | |
52 | #define IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES 0xca | |
53 | #define IPMI_CC_REQ_ENTRY_NOT_PRESENT 0xcb | |
54 | #define IPMI_CC_INVALID_DATA_FIELD 0xcc | |
55 | #define IPMI_CC_BMC_INIT_IN_PROGRESS 0xd2 | |
56 | #define IPMI_CC_COMMAND_NOT_SUPPORTED 0xd5 | |
57 | ||
58 | #define IPMI_NETFN_APP 0x06 | |
59 | ||
60 | #define IPMI_DEBUG 1 | |
61 | ||
62 | /* Specified in the SMBIOS spec. */ | |
63 | #define IPMI_SMBIOS_KCS 0x01 | |
64 | #define IPMI_SMBIOS_SMIC 0x02 | |
65 | #define IPMI_SMBIOS_BT 0x03 | |
66 | #define IPMI_SMBIOS_SSIF 0x04 | |
67 | ||
15139b8e CM |
68 | /* |
69 | * Used for transferring information to interfaces that add | |
70 | * entries to firmware tables. | |
71 | */ | |
72 | typedef struct IPMIFwInfo { | |
73 | const char *interface_name; | |
74 | int interface_type; | |
75 | uint8_t ipmi_spec_major_revision; | |
76 | uint8_t ipmi_spec_minor_revision; | |
77 | uint8_t i2c_slave_address; | |
78 | uint32_t uuid; | |
79 | ||
80 | uint64_t base_address; | |
81 | uint64_t register_length; | |
82 | uint8_t register_spacing; | |
83 | enum { | |
84 | IPMI_MEMSPACE_IO, | |
85 | IPMI_MEMSPACE_MEM32, | |
86 | IPMI_MEMSPACE_MEM64, | |
87 | IPMI_MEMSPACE_SMBUS | |
88 | } memspace; | |
89 | ||
90 | int interrupt_number; | |
91 | enum { | |
92 | IPMI_LEVEL_IRQ, | |
93 | IPMI_EDGE_IRQ | |
94 | } irq_type; | |
95 | } IPMIFwInfo; | |
96 | ||
97 | /* | |
98 | * Called by each instantiated IPMI interface device to get it's uuid. | |
99 | */ | |
100 | uint32_t ipmi_next_uuid(void); | |
101 | ||
23076bb3 CM |
102 | /* IPMI Interface types (KCS, SMIC, BT) are prefixed with this */ |
103 | #define TYPE_IPMI_INTERFACE_PREFIX "ipmi-interface-" | |
104 | ||
105 | /* | |
106 | * An IPMI Interface, the interface for talking between the target | |
107 | * and the BMC. | |
108 | */ | |
109 | #define TYPE_IPMI_INTERFACE "ipmi-interface" | |
110 | #define IPMI_INTERFACE(obj) \ | |
111 | INTERFACE_CHECK(IPMIInterface, (obj), TYPE_IPMI_INTERFACE) | |
112 | #define IPMI_INTERFACE_CLASS(class) \ | |
113 | OBJECT_CLASS_CHECK(IPMIInterfaceClass, (class), TYPE_IPMI_INTERFACE) | |
114 | #define IPMI_INTERFACE_GET_CLASS(class) \ | |
115 | OBJECT_GET_CLASS(IPMIInterfaceClass, (class), TYPE_IPMI_INTERFACE) | |
116 | ||
aa1b35b9 | 117 | typedef struct IPMIInterface IPMIInterface; |
23076bb3 CM |
118 | |
119 | typedef struct IPMIInterfaceClass { | |
120 | InterfaceClass parent; | |
121 | ||
122 | void (*init)(struct IPMIInterface *s, Error **errp); | |
123 | ||
124 | /* | |
125 | * Perform various operations on the hardware. If checkonly is | |
126 | * true, it will return if the operation can be performed, but it | |
127 | * will not do the operation. | |
128 | */ | |
129 | int (*do_hw_op)(struct IPMIInterface *s, enum ipmi_op op, int checkonly); | |
130 | ||
131 | /* | |
132 | * Enable/disable irqs on the interface when the BMC requests this. | |
133 | */ | |
134 | void (*set_irq_enable)(struct IPMIInterface *s, int val); | |
135 | ||
136 | /* | |
137 | * Handle an event that occurred on the interface, generally the. | |
138 | * target writing to a register. | |
139 | */ | |
140 | void (*handle_if_event)(struct IPMIInterface *s); | |
141 | ||
142 | /* | |
143 | * The interfaces use this to perform certain ops | |
144 | */ | |
145 | void (*set_atn)(struct IPMIInterface *s, int val, int irq); | |
146 | ||
147 | /* | |
148 | * Got an IPMI warm/cold reset. | |
149 | */ | |
150 | void (*reset)(struct IPMIInterface *s, bool is_cold); | |
151 | ||
152 | /* | |
153 | * Handle a response from the bmc. | |
154 | */ | |
155 | void (*handle_rsp)(struct IPMIInterface *s, uint8_t msg_id, | |
156 | unsigned char *rsp, unsigned int rsp_len); | |
157 | ||
158 | /* | |
159 | * Set by the owner to hold the backend data for the interface. | |
160 | */ | |
161 | void *(*get_backend_data)(struct IPMIInterface *s); | |
15139b8e CM |
162 | |
163 | /* | |
164 | * Return the firmware info for a device. | |
165 | */ | |
166 | void (*get_fwinfo)(struct IPMIInterface *s, IPMIFwInfo *info); | |
23076bb3 CM |
167 | } IPMIInterfaceClass; |
168 | ||
169 | /* | |
170 | * Define a BMC simulator (or perhaps a connection to a real BMC) | |
171 | */ | |
172 | #define TYPE_IPMI_BMC "ipmi-bmc" | |
173 | #define IPMI_BMC(obj) \ | |
174 | OBJECT_CHECK(IPMIBmc, (obj), TYPE_IPMI_BMC) | |
175 | #define IPMI_BMC_CLASS(obj_class) \ | |
176 | OBJECT_CLASS_CHECK(IPMIBmcClass, (obj_class), TYPE_IPMI_BMC) | |
177 | #define IPMI_BMC_GET_CLASS(obj) \ | |
178 | OBJECT_GET_CLASS(IPMIBmcClass, (obj), TYPE_IPMI_BMC) | |
179 | ||
180 | typedef struct IPMIBmc { | |
181 | DeviceState parent; | |
182 | ||
183 | uint8_t slave_addr; | |
184 | ||
185 | IPMIInterface *intf; | |
186 | } IPMIBmc; | |
187 | ||
188 | typedef struct IPMIBmcClass { | |
189 | DeviceClass parent; | |
190 | ||
191 | /* Called when the system resets to report to the bmc. */ | |
192 | void (*handle_reset)(struct IPMIBmc *s); | |
193 | ||
194 | /* | |
195 | * Handle a command to the bmc. | |
196 | */ | |
197 | void (*handle_command)(struct IPMIBmc *s, | |
198 | uint8_t *cmd, unsigned int cmd_len, | |
199 | unsigned int max_cmd_len, | |
200 | uint8_t msg_id); | |
201 | } IPMIBmcClass; | |
202 | ||
203 | /* | |
204 | * Add a link property to obj that points to a BMC. | |
205 | */ | |
206 | void ipmi_bmc_find_and_link(Object *obj, Object **bmc); | |
207 | ||
208 | #ifdef IPMI_DEBUG | |
209 | #define ipmi_debug(fs, ...) \ | |
210 | fprintf(stderr, "IPMI (%s): " fs, __func__, ##__VA_ARGS__) | |
211 | #else | |
212 | #define ipmi_debug(fs, ...) | |
213 | #endif | |
214 | ||
a2295f0a CLG |
215 | struct ipmi_sdr_header { |
216 | uint8_t rec_id[2]; | |
217 | uint8_t sdr_version; /* 0x51 */ | |
218 | uint8_t rec_type; | |
219 | uint8_t rec_length; | |
220 | }; | |
221 | #define IPMI_SDR_HEADER_SIZE sizeof(struct ipmi_sdr_header) | |
222 | ||
223 | #define ipmi_sdr_recid(sdr) ((sdr)->rec_id[0] | ((sdr)->rec_id[1] << 8)) | |
224 | #define ipmi_sdr_length(sdr) ((sdr)->rec_length + IPMI_SDR_HEADER_SIZE) | |
225 | ||
226 | /* | |
227 | * 43.2 SDR Type 02h. Compact Sensor Record | |
228 | */ | |
229 | #define IPMI_SDR_COMPACT_TYPE 2 | |
230 | ||
231 | struct ipmi_sdr_compact { | |
232 | struct ipmi_sdr_header header; | |
233 | ||
234 | uint8_t sensor_owner_id; | |
235 | uint8_t sensor_owner_lun; | |
236 | uint8_t sensor_owner_number; /* byte 8 */ | |
237 | uint8_t entity_id; | |
238 | uint8_t entity_instance; | |
239 | uint8_t sensor_init; | |
240 | uint8_t sensor_caps; | |
241 | uint8_t sensor_type; | |
242 | uint8_t reading_type; | |
243 | uint8_t assert_mask[2]; /* byte 16 */ | |
244 | uint8_t deassert_mask[2]; | |
245 | uint8_t discrete_mask[2]; | |
246 | uint8_t sensor_unit1; | |
247 | uint8_t sensor_unit2; | |
248 | uint8_t sensor_unit3; | |
249 | uint8_t sensor_direction[2]; /* byte 24 */ | |
250 | uint8_t positive_threshold; | |
251 | uint8_t negative_threshold; | |
252 | uint8_t reserved[3]; | |
253 | uint8_t oem; | |
254 | uint8_t id_str_len; /* byte 32 */ | |
255 | uint8_t id_string[16]; | |
256 | }; | |
257 | ||
258 | typedef uint8_t ipmi_sdr_compact_buffer[sizeof(struct ipmi_sdr_compact)]; | |
259 | ||
7fabcdb9 CLG |
260 | int ipmi_bmc_sdr_find(IPMIBmc *b, uint16_t recid, |
261 | const struct ipmi_sdr_compact **sdr, uint16_t *nextrec); | |
cd60d85e CLG |
262 | void ipmi_bmc_gen_event(IPMIBmc *b, uint8_t *evt, bool log); |
263 | ||
23076bb3 | 264 | #endif |