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0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <[email protected]> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
9615495a | 24 | #include "qemu/osdep.h" |
0e60a699 | 25 | #include <sys/ioctl.h> |
0e60a699 AG |
26 | |
27 | #include <linux/kvm.h> | |
28 | #include <asm/ptrace.h> | |
29 | ||
30 | #include "qemu-common.h" | |
33c11879 | 31 | #include "cpu.h" |
d49b6836 | 32 | #include "qemu/error-report.h" |
1de7afc9 | 33 | #include "qemu/timer.h" |
9c17d615 PB |
34 | #include "sysemu/sysemu.h" |
35 | #include "sysemu/kvm.h" | |
4cb88c3c | 36 | #include "hw/hw.h" |
9c17d615 | 37 | #include "sysemu/device_tree.h" |
08eb8c85 | 38 | #include "qapi/qmp/qjson.h" |
770a6379 | 39 | #include "exec/gdbstub.h" |
18ff9494 | 40 | #include "exec/address-spaces.h" |
860643bc | 41 | #include "trace.h" |
3a449690 | 42 | #include "qapi-event.h" |
863f6f52 | 43 | #include "hw/s390x/s390-pci-inst.h" |
9e03a040 | 44 | #include "hw/s390x/s390-pci-bus.h" |
e91e972c | 45 | #include "hw/s390x/ipl.h" |
f07177a5 | 46 | #include "hw/s390x/ebcdic.h" |
4c663752 | 47 | #include "exec/memattrs.h" |
9700230b | 48 | #include "hw/s390x/s390-virtio-ccw.h" |
0e60a699 AG |
49 | |
50 | /* #define DEBUG_KVM */ | |
51 | ||
52 | #ifdef DEBUG_KVM | |
e67137c6 | 53 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
54 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
55 | #else | |
e67137c6 | 56 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
57 | do { } while (0) |
58 | #endif | |
59 | ||
2b147555 DD |
60 | #define kvm_vm_check_mem_attr(s, attr) \ |
61 | kvm_vm_check_attr(s, KVM_S390_VM_MEM_CTRL, attr) | |
62 | ||
0e60a699 AG |
63 | #define IPA0_DIAG 0x8300 |
64 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
65 | #define IPA0_B2 0xb200 |
66 | #define IPA0_B9 0xb900 | |
67 | #define IPA0_EB 0xeb00 | |
863f6f52 | 68 | #define IPA0_E3 0xe300 |
0e60a699 | 69 | |
1eecf41b FB |
70 | #define PRIV_B2_SCLP_CALL 0x20 |
71 | #define PRIV_B2_CSCH 0x30 | |
72 | #define PRIV_B2_HSCH 0x31 | |
73 | #define PRIV_B2_MSCH 0x32 | |
74 | #define PRIV_B2_SSCH 0x33 | |
75 | #define PRIV_B2_STSCH 0x34 | |
76 | #define PRIV_B2_TSCH 0x35 | |
77 | #define PRIV_B2_TPI 0x36 | |
78 | #define PRIV_B2_SAL 0x37 | |
79 | #define PRIV_B2_RSCH 0x38 | |
80 | #define PRIV_B2_STCRW 0x39 | |
81 | #define PRIV_B2_STCPS 0x3a | |
82 | #define PRIV_B2_RCHP 0x3b | |
83 | #define PRIV_B2_SCHM 0x3c | |
84 | #define PRIV_B2_CHSC 0x5f | |
85 | #define PRIV_B2_SIGA 0x74 | |
86 | #define PRIV_B2_XSCH 0x76 | |
87 | ||
88 | #define PRIV_EB_SQBS 0x8a | |
863f6f52 FB |
89 | #define PRIV_EB_PCISTB 0xd0 |
90 | #define PRIV_EB_SIC 0xd1 | |
1eecf41b FB |
91 | |
92 | #define PRIV_B9_EQBS 0x9c | |
863f6f52 FB |
93 | #define PRIV_B9_CLP 0xa0 |
94 | #define PRIV_B9_PCISTG 0xd0 | |
95 | #define PRIV_B9_PCILG 0xd2 | |
96 | #define PRIV_B9_RPCIT 0xd3 | |
97 | ||
98 | #define PRIV_E3_MPCIFC 0xd0 | |
99 | #define PRIV_E3_STPCIFC 0xd4 | |
1eecf41b | 100 | |
8fc639af | 101 | #define DIAG_TIMEREVENT 0x288 |
268846ba | 102 | #define DIAG_IPL 0x308 |
0e60a699 AG |
103 | #define DIAG_KVM_HYPERCALL 0x500 |
104 | #define DIAG_KVM_BREAKPOINT 0x501 | |
105 | ||
0e60a699 | 106 | #define ICPT_INSTRUCTION 0x04 |
6449a41a | 107 | #define ICPT_PROGRAM 0x08 |
a2689242 | 108 | #define ICPT_EXT_INT 0x14 |
0e60a699 AG |
109 | #define ICPT_WAITPSW 0x1c |
110 | #define ICPT_SOFT_INTERCEPT 0x24 | |
111 | #define ICPT_CPU_STOP 0x28 | |
b60fae32 | 112 | #define ICPT_OPEREXC 0x2c |
0e60a699 AG |
113 | #define ICPT_IO 0x40 |
114 | ||
3cda44f7 JF |
115 | #define NR_LOCAL_IRQS 32 |
116 | /* | |
117 | * Needs to be big enough to contain max_cpus emergency signals | |
118 | * and in addition NR_LOCAL_IRQS interrupts | |
119 | */ | |
120 | #define VCPU_IRQ_BUF_SIZE (sizeof(struct kvm_s390_irq) * \ | |
121 | (max_cpus + NR_LOCAL_IRQS)) | |
122 | ||
770a6379 DH |
123 | static CPUWatchpoint hw_watchpoint; |
124 | /* | |
125 | * We don't use a list because this structure is also used to transmit the | |
126 | * hardware breakpoints to the kernel. | |
127 | */ | |
128 | static struct kvm_hw_breakpoint *hw_breakpoints; | |
129 | static int nb_hw_breakpoints; | |
130 | ||
94a8d39a JK |
131 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
132 | KVM_CAP_LAST_INFO | |
133 | }; | |
134 | ||
5b08b344 | 135 | static int cap_sync_regs; |
819bd309 | 136 | static int cap_async_pf; |
a9bcd1b8 | 137 | static int cap_mem_op; |
1191c949 | 138 | static int cap_s390_irq; |
9700230b | 139 | static int cap_ri; |
5b08b344 | 140 | |
dc622deb | 141 | static void *legacy_s390_alloc(size_t size, uint64_t *align); |
91138037 | 142 | |
a310b283 DD |
143 | static int kvm_s390_query_mem_limit(KVMState *s, uint64_t *memory_limit) |
144 | { | |
145 | struct kvm_device_attr attr = { | |
146 | .group = KVM_S390_VM_MEM_CTRL, | |
147 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
148 | .addr = (uint64_t) memory_limit, | |
149 | }; | |
150 | ||
151 | return kvm_vm_ioctl(s, KVM_GET_DEVICE_ATTR, &attr); | |
152 | } | |
153 | ||
154 | int kvm_s390_set_mem_limit(KVMState *s, uint64_t new_limit, uint64_t *hw_limit) | |
155 | { | |
156 | int rc; | |
157 | ||
158 | struct kvm_device_attr attr = { | |
159 | .group = KVM_S390_VM_MEM_CTRL, | |
160 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
161 | .addr = (uint64_t) &new_limit, | |
162 | }; | |
163 | ||
2b147555 | 164 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_LIMIT_SIZE)) { |
a310b283 DD |
165 | return 0; |
166 | } | |
167 | ||
168 | rc = kvm_s390_query_mem_limit(s, hw_limit); | |
169 | if (rc) { | |
170 | return rc; | |
171 | } else if (*hw_limit < new_limit) { | |
172 | return -E2BIG; | |
173 | } | |
174 | ||
175 | return kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
176 | } | |
177 | ||
07059eff DH |
178 | static bool kvm_s390_cmma_available(void) |
179 | { | |
180 | static bool initialized, value; | |
181 | ||
182 | if (!initialized) { | |
183 | initialized = true; | |
184 | value = kvm_vm_check_mem_attr(kvm_state, KVM_S390_VM_MEM_ENABLE_CMMA) && | |
185 | kvm_vm_check_mem_attr(kvm_state, KVM_S390_VM_MEM_CLR_CMMA); | |
186 | } | |
187 | return value; | |
188 | } | |
189 | ||
1cd4e0f6 | 190 | void kvm_s390_cmma_reset(void) |
4cb88c3c DD |
191 | { |
192 | int rc; | |
4cb88c3c DD |
193 | struct kvm_device_attr attr = { |
194 | .group = KVM_S390_VM_MEM_CTRL, | |
195 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
196 | }; | |
197 | ||
07059eff DH |
198 | if (!mem_path || !kvm_s390_cmma_available()) { |
199 | return; | |
200 | } | |
201 | ||
1cd4e0f6 | 202 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
4cb88c3c DD |
203 | trace_kvm_clear_cmma(rc); |
204 | } | |
205 | ||
07059eff | 206 | static void kvm_s390_enable_cmma(void) |
4cb88c3c DD |
207 | { |
208 | int rc; | |
209 | struct kvm_device_attr attr = { | |
210 | .group = KVM_S390_VM_MEM_CTRL, | |
211 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
212 | }; | |
213 | ||
07059eff | 214 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
4cb88c3c DD |
215 | trace_kvm_enable_cmma(rc); |
216 | } | |
217 | ||
2eb1cd07 TK |
218 | static void kvm_s390_set_attr(uint64_t attr) |
219 | { | |
220 | struct kvm_device_attr attribute = { | |
221 | .group = KVM_S390_VM_CRYPTO, | |
222 | .attr = attr, | |
223 | }; | |
224 | ||
225 | int ret = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attribute); | |
226 | ||
227 | if (ret) { | |
228 | error_report("Failed to set crypto device attribute %lu: %s", | |
229 | attr, strerror(-ret)); | |
230 | } | |
231 | } | |
232 | ||
233 | static void kvm_s390_init_aes_kw(void) | |
234 | { | |
235 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_AES_KW; | |
236 | ||
237 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "aes-key-wrap", | |
238 | NULL)) { | |
239 | attr = KVM_S390_VM_CRYPTO_ENABLE_AES_KW; | |
240 | } | |
241 | ||
242 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
243 | kvm_s390_set_attr(attr); | |
244 | } | |
245 | } | |
246 | ||
247 | static void kvm_s390_init_dea_kw(void) | |
248 | { | |
249 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_DEA_KW; | |
250 | ||
251 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "dea-key-wrap", | |
252 | NULL)) { | |
253 | attr = KVM_S390_VM_CRYPTO_ENABLE_DEA_KW; | |
254 | } | |
255 | ||
256 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
257 | kvm_s390_set_attr(attr); | |
258 | } | |
259 | } | |
260 | ||
4ab72920 | 261 | void kvm_s390_crypto_reset(void) |
2eb1cd07 TK |
262 | { |
263 | kvm_s390_init_aes_kw(); | |
264 | kvm_s390_init_dea_kw(); | |
265 | } | |
266 | ||
b16565b3 | 267 | int kvm_arch_init(MachineState *ms, KVMState *s) |
0e60a699 | 268 | { |
5b08b344 | 269 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
819bd309 | 270 | cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); |
a9bcd1b8 | 271 | cap_mem_op = kvm_check_extension(s, KVM_CAP_S390_MEM_OP); |
1191c949 | 272 | cap_s390_irq = kvm_check_extension(s, KVM_CAP_S390_INJECT_IRQ); |
4cb88c3c | 273 | |
91138037 MA |
274 | if (!kvm_check_extension(s, KVM_CAP_S390_GMAP) |
275 | || !kvm_check_extension(s, KVM_CAP_S390_COW)) { | |
276 | phys_mem_set_alloc(legacy_s390_alloc); | |
277 | } | |
f16d3f58 DH |
278 | |
279 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_SIGP, 0); | |
46ca6b3b | 280 | kvm_vm_enable_cap(s, KVM_CAP_S390_VECTOR_REGISTERS, 0); |
f07177a5 | 281 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_STSI, 0); |
9700230b FZ |
282 | if (ri_allowed()) { |
283 | if (kvm_vm_enable_cap(s, KVM_CAP_S390_RI, 0) == 0) { | |
284 | cap_ri = 1; | |
285 | } | |
286 | } | |
f16d3f58 | 287 | |
0e60a699 AG |
288 | return 0; |
289 | } | |
290 | ||
b164e48e EH |
291 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
292 | { | |
293 | return cpu->cpu_index; | |
294 | } | |
295 | ||
c9e659c9 | 296 | int kvm_arch_init_vcpu(CPUState *cs) |
0e60a699 | 297 | { |
c9e659c9 DH |
298 | S390CPU *cpu = S390_CPU(cs); |
299 | kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state); | |
3cda44f7 | 300 | cpu->irqstate = g_malloc0(VCPU_IRQ_BUF_SIZE); |
1c9d2a1d | 301 | return 0; |
0e60a699 AG |
302 | } |
303 | ||
50a2c6e5 | 304 | void kvm_s390_reset_vcpu(S390CPU *cpu) |
0e60a699 | 305 | { |
50a2c6e5 PB |
306 | CPUState *cs = CPU(cpu); |
307 | ||
419831d7 AG |
308 | /* The initial reset call is needed here to reset in-kernel |
309 | * vcpu data that we can't access directly from QEMU | |
310 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
311 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
312 | * code (kvm-all) */ | |
50a2c6e5 | 313 | if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL)) { |
81b07353 | 314 | error_report("Initial CPU reset failed on CPU %i", cs->cpu_index); |
70bada03 | 315 | } |
0e60a699 AG |
316 | } |
317 | ||
fdb78ec0 DH |
318 | static int can_sync_regs(CPUState *cs, int regs) |
319 | { | |
320 | return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) == regs; | |
321 | } | |
322 | ||
20d695a9 | 323 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 324 | { |
20d695a9 AF |
325 | S390CPU *cpu = S390_CPU(cs); |
326 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 327 | struct kvm_sregs sregs; |
0e60a699 | 328 | struct kvm_regs regs; |
e6eef7c2 | 329 | struct kvm_fpu fpu = {}; |
860643bc | 330 | int r; |
0e60a699 AG |
331 | int i; |
332 | ||
5b08b344 | 333 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
334 | cs->kvm_run->psw_addr = env->psw.addr; |
335 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 336 | |
fdb78ec0 | 337 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 338 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
339 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
340 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
341 | } |
342 | } else { | |
343 | for (i = 0; i < 16; i++) { | |
344 | regs.gprs[i] = env->regs[i]; | |
345 | } | |
860643bc CB |
346 | r = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
347 | if (r < 0) { | |
348 | return r; | |
5b08b344 | 349 | } |
0e60a699 AG |
350 | } |
351 | ||
fcb79802 EF |
352 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { |
353 | for (i = 0; i < 32; i++) { | |
354 | cs->kvm_run->s.regs.vrs[i][0] = env->vregs[i][0].ll; | |
355 | cs->kvm_run->s.regs.vrs[i][1] = env->vregs[i][1].ll; | |
356 | } | |
357 | cs->kvm_run->s.regs.fpc = env->fpc; | |
358 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_VRS; | |
5ab0e547 DH |
359 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
360 | for (i = 0; i < 16; i++) { | |
361 | cs->kvm_run->s.regs.fprs[i] = get_freg(env, i)->ll; | |
362 | } | |
363 | cs->kvm_run->s.regs.fpc = env->fpc; | |
364 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_FPRS; | |
fcb79802 EF |
365 | } else { |
366 | /* Floating point */ | |
367 | for (i = 0; i < 16; i++) { | |
368 | fpu.fprs[i] = get_freg(env, i)->ll; | |
369 | } | |
370 | fpu.fpc = env->fpc; | |
85ad6230 | 371 | |
fcb79802 EF |
372 | r = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); |
373 | if (r < 0) { | |
374 | return r; | |
375 | } | |
85ad6230 JH |
376 | } |
377 | ||
44c68de0 DD |
378 | /* Do we need to save more than that? */ |
379 | if (level == KVM_PUT_RUNTIME_STATE) { | |
380 | return 0; | |
381 | } | |
420840e5 | 382 | |
59ac1532 DH |
383 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
384 | cs->kvm_run->s.regs.cputm = env->cputm; | |
385 | cs->kvm_run->s.regs.ckc = env->ckc; | |
386 | cs->kvm_run->s.regs.todpr = env->todpr; | |
387 | cs->kvm_run->s.regs.gbea = env->gbea; | |
388 | cs->kvm_run->s.regs.pp = env->pp; | |
389 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ARCH0; | |
390 | } else { | |
391 | /* | |
392 | * These ONE_REGS are not protected by a capability. As they are only | |
393 | * necessary for migration we just trace a possible error, but don't | |
394 | * return with an error return code. | |
395 | */ | |
396 | kvm_set_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
397 | kvm_set_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
398 | kvm_set_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
399 | kvm_set_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
400 | kvm_set_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
401 | } | |
402 | ||
9700230b FZ |
403 | if (can_sync_regs(cs, KVM_SYNC_RICCB)) { |
404 | memcpy(cs->kvm_run->s.regs.riccb, env->riccb, 64); | |
405 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_RICCB; | |
406 | } | |
407 | ||
59ac1532 DH |
408 | /* pfault parameters */ |
409 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
410 | cs->kvm_run->s.regs.pft = env->pfault_token; | |
411 | cs->kvm_run->s.regs.pfs = env->pfault_select; | |
412 | cs->kvm_run->s.regs.pfc = env->pfault_compare; | |
413 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PFAULT; | |
414 | } else if (cap_async_pf) { | |
860643bc CB |
415 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
416 | if (r < 0) { | |
417 | return r; | |
819bd309 | 418 | } |
860643bc CB |
419 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
420 | if (r < 0) { | |
421 | return r; | |
819bd309 | 422 | } |
860643bc CB |
423 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
424 | if (r < 0) { | |
425 | return r; | |
819bd309 DD |
426 | } |
427 | } | |
428 | ||
fdb78ec0 DH |
429 | /* access registers and control registers*/ |
430 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { | |
5b08b344 | 431 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
432 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
433 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 434 | } |
f7575c96 AF |
435 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
436 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
437 | } else { |
438 | for (i = 0; i < 16; i++) { | |
439 | sregs.acrs[i] = env->aregs[i]; | |
440 | sregs.crs[i] = env->cregs[i]; | |
441 | } | |
860643bc CB |
442 | r = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
443 | if (r < 0) { | |
444 | return r; | |
5b08b344 CB |
445 | } |
446 | } | |
0e60a699 | 447 | |
5b08b344 | 448 | /* Finally the prefix */ |
fdb78ec0 | 449 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 AF |
450 | cs->kvm_run->s.regs.prefix = env->psa; |
451 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
452 | } else { |
453 | /* prefix is only supported via sync regs */ | |
454 | } | |
455 | return 0; | |
0e60a699 AG |
456 | } |
457 | ||
20d695a9 | 458 | int kvm_arch_get_registers(CPUState *cs) |
420840e5 JH |
459 | { |
460 | S390CPU *cpu = S390_CPU(cs); | |
461 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 462 | struct kvm_sregs sregs; |
0e60a699 | 463 | struct kvm_regs regs; |
85ad6230 | 464 | struct kvm_fpu fpu; |
44c68de0 | 465 | int i, r; |
420840e5 | 466 | |
5b08b344 | 467 | /* get the PSW */ |
f7575c96 AF |
468 | env->psw.addr = cs->kvm_run->psw_addr; |
469 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
470 | |
471 | /* the GPRS */ | |
fdb78ec0 | 472 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 473 | for (i = 0; i < 16; i++) { |
f7575c96 | 474 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
475 | } |
476 | } else { | |
44c68de0 DD |
477 | r = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
478 | if (r < 0) { | |
479 | return r; | |
5b08b344 CB |
480 | } |
481 | for (i = 0; i < 16; i++) { | |
482 | env->regs[i] = regs.gprs[i]; | |
483 | } | |
0e60a699 AG |
484 | } |
485 | ||
5b08b344 | 486 | /* The ACRS and CRS */ |
fdb78ec0 | 487 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { |
5b08b344 | 488 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
489 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
490 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
491 | } |
492 | } else { | |
44c68de0 DD |
493 | r = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
494 | if (r < 0) { | |
495 | return r; | |
5b08b344 CB |
496 | } |
497 | for (i = 0; i < 16; i++) { | |
498 | env->aregs[i] = sregs.acrs[i]; | |
499 | env->cregs[i] = sregs.crs[i]; | |
500 | } | |
0e60a699 AG |
501 | } |
502 | ||
fcb79802 EF |
503 | /* Floating point and vector registers */ |
504 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { | |
505 | for (i = 0; i < 32; i++) { | |
506 | env->vregs[i][0].ll = cs->kvm_run->s.regs.vrs[i][0]; | |
507 | env->vregs[i][1].ll = cs->kvm_run->s.regs.vrs[i][1]; | |
508 | } | |
509 | env->fpc = cs->kvm_run->s.regs.fpc; | |
5ab0e547 DH |
510 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
511 | for (i = 0; i < 16; i++) { | |
512 | get_freg(env, i)->ll = cs->kvm_run->s.regs.fprs[i]; | |
513 | } | |
514 | env->fpc = cs->kvm_run->s.regs.fpc; | |
fcb79802 EF |
515 | } else { |
516 | r = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); | |
517 | if (r < 0) { | |
518 | return r; | |
519 | } | |
520 | for (i = 0; i < 16; i++) { | |
521 | get_freg(env, i)->ll = fpu.fprs[i]; | |
522 | } | |
523 | env->fpc = fpu.fpc; | |
85ad6230 | 524 | } |
85ad6230 | 525 | |
44c68de0 | 526 | /* The prefix */ |
fdb78ec0 | 527 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 | 528 | env->psa = cs->kvm_run->s.regs.prefix; |
5b08b344 | 529 | } |
0e60a699 | 530 | |
59ac1532 DH |
531 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
532 | env->cputm = cs->kvm_run->s.regs.cputm; | |
533 | env->ckc = cs->kvm_run->s.regs.ckc; | |
534 | env->todpr = cs->kvm_run->s.regs.todpr; | |
535 | env->gbea = cs->kvm_run->s.regs.gbea; | |
536 | env->pp = cs->kvm_run->s.regs.pp; | |
537 | } else { | |
538 | /* | |
539 | * These ONE_REGS are not protected by a capability. As they are only | |
540 | * necessary for migration we just trace a possible error, but don't | |
541 | * return with an error return code. | |
542 | */ | |
543 | kvm_get_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
544 | kvm_get_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
545 | kvm_get_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
546 | kvm_get_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
547 | kvm_get_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
548 | } | |
549 | ||
9700230b FZ |
550 | if (can_sync_regs(cs, KVM_SYNC_RICCB)) { |
551 | memcpy(env->riccb, cs->kvm_run->s.regs.riccb, 64); | |
552 | } | |
553 | ||
59ac1532 DH |
554 | /* pfault parameters */ |
555 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
556 | env->pfault_token = cs->kvm_run->s.regs.pft; | |
557 | env->pfault_select = cs->kvm_run->s.regs.pfs; | |
558 | env->pfault_compare = cs->kvm_run->s.regs.pfc; | |
559 | } else if (cap_async_pf) { | |
860643bc | 560 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
819bd309 DD |
561 | if (r < 0) { |
562 | return r; | |
563 | } | |
860643bc | 564 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
819bd309 DD |
565 | if (r < 0) { |
566 | return r; | |
567 | } | |
860643bc | 568 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
819bd309 DD |
569 | if (r < 0) { |
570 | return r; | |
571 | } | |
572 | } | |
573 | ||
0e60a699 AG |
574 | return 0; |
575 | } | |
576 | ||
3f9e59bb JH |
577 | int kvm_s390_get_clock(uint8_t *tod_high, uint64_t *tod_low) |
578 | { | |
579 | int r; | |
580 | struct kvm_device_attr attr = { | |
581 | .group = KVM_S390_VM_TOD, | |
582 | .attr = KVM_S390_VM_TOD_LOW, | |
583 | .addr = (uint64_t)tod_low, | |
584 | }; | |
585 | ||
586 | r = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
587 | if (r) { | |
588 | return r; | |
589 | } | |
590 | ||
591 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
592 | attr.addr = (uint64_t)tod_high; | |
593 | return kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
594 | } | |
595 | ||
596 | int kvm_s390_set_clock(uint8_t *tod_high, uint64_t *tod_low) | |
597 | { | |
598 | int r; | |
599 | ||
600 | struct kvm_device_attr attr = { | |
601 | .group = KVM_S390_VM_TOD, | |
602 | .attr = KVM_S390_VM_TOD_LOW, | |
603 | .addr = (uint64_t)tod_low, | |
604 | }; | |
605 | ||
606 | r = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
607 | if (r) { | |
608 | return r; | |
609 | } | |
610 | ||
611 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
612 | attr.addr = (uint64_t)tod_high; | |
613 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
614 | } | |
615 | ||
a9bcd1b8 TH |
616 | /** |
617 | * kvm_s390_mem_op: | |
618 | * @addr: the logical start address in guest memory | |
6cb1e49d | 619 | * @ar: the access register number |
a9bcd1b8 | 620 | * @hostbuf: buffer in host memory. NULL = do only checks w/o copying |
67cc32eb | 621 | * @len: length that should be transferred |
a9bcd1b8 | 622 | * @is_write: true = write, false = read |
67cc32eb | 623 | * Returns: 0 on success, non-zero if an exception or error occurred |
a9bcd1b8 TH |
624 | * |
625 | * Use KVM ioctl to read/write from/to guest memory. An access exception | |
626 | * is injected into the vCPU in case of translation errors. | |
627 | */ | |
6cb1e49d AY |
628 | int kvm_s390_mem_op(S390CPU *cpu, vaddr addr, uint8_t ar, void *hostbuf, |
629 | int len, bool is_write) | |
a9bcd1b8 TH |
630 | { |
631 | struct kvm_s390_mem_op mem_op = { | |
632 | .gaddr = addr, | |
633 | .flags = KVM_S390_MEMOP_F_INJECT_EXCEPTION, | |
634 | .size = len, | |
635 | .op = is_write ? KVM_S390_MEMOP_LOGICAL_WRITE | |
636 | : KVM_S390_MEMOP_LOGICAL_READ, | |
637 | .buf = (uint64_t)hostbuf, | |
6cb1e49d | 638 | .ar = ar, |
a9bcd1b8 TH |
639 | }; |
640 | int ret; | |
641 | ||
642 | if (!cap_mem_op) { | |
643 | return -ENOSYS; | |
644 | } | |
645 | if (!hostbuf) { | |
646 | mem_op.flags |= KVM_S390_MEMOP_F_CHECK_ONLY; | |
647 | } | |
648 | ||
649 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_S390_MEM_OP, &mem_op); | |
650 | if (ret < 0) { | |
651 | error_printf("KVM_S390_MEM_OP failed: %s\n", strerror(-ret)); | |
652 | } | |
653 | return ret; | |
654 | } | |
655 | ||
fdec9918 CB |
656 | /* |
657 | * Legacy layout for s390: | |
658 | * Older S390 KVM requires the topmost vma of the RAM to be | |
659 | * smaller than an system defined value, which is at least 256GB. | |
660 | * Larger systems have larger values. We put the guest between | |
661 | * the end of data segment (system break) and this value. We | |
662 | * use 32GB as a base to have enough room for the system break | |
663 | * to grow. We also have to use MAP parameters that avoid | |
664 | * read-only mapping of guest pages. | |
665 | */ | |
dc622deb | 666 | static void *legacy_s390_alloc(size_t size, uint64_t *align) |
fdec9918 CB |
667 | { |
668 | void *mem; | |
669 | ||
670 | mem = mmap((void *) 0x800000000ULL, size, | |
671 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
672 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
39228250 | 673 | return mem == MAP_FAILED ? NULL : mem; |
fdec9918 CB |
674 | } |
675 | ||
b60fae32 DH |
676 | static uint8_t const *sw_bp_inst; |
677 | static uint8_t sw_bp_ilen; | |
678 | ||
679 | static void determine_sw_breakpoint_instr(void) | |
680 | { | |
681 | /* DIAG 501 is used for sw breakpoints with old kernels */ | |
682 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
683 | /* Instruction 0x0000 is used for sw breakpoints with recent kernels */ | |
684 | static const uint8_t instr_0x0000[] = {0x00, 0x00}; | |
685 | ||
686 | if (sw_bp_inst) { | |
687 | return; | |
688 | } | |
689 | if (kvm_vm_enable_cap(kvm_state, KVM_CAP_S390_USER_INSTR0, 0)) { | |
690 | sw_bp_inst = diag_501; | |
691 | sw_bp_ilen = sizeof(diag_501); | |
692 | DPRINTF("KVM: will use 4-byte sw breakpoints.\n"); | |
693 | } else { | |
694 | sw_bp_inst = instr_0x0000; | |
695 | sw_bp_ilen = sizeof(instr_0x0000); | |
696 | DPRINTF("KVM: will use 2-byte sw breakpoints.\n"); | |
697 | } | |
698 | } | |
8e4e86af | 699 | |
20d695a9 | 700 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 701 | { |
b60fae32 | 702 | determine_sw_breakpoint_instr(); |
0e60a699 | 703 | |
8e4e86af | 704 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
b60fae32 DH |
705 | sw_bp_ilen, 0) || |
706 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)sw_bp_inst, sw_bp_ilen, 1)) { | |
0e60a699 AG |
707 | return -EINVAL; |
708 | } | |
709 | return 0; | |
710 | } | |
711 | ||
20d695a9 | 712 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 713 | { |
b60fae32 | 714 | uint8_t t[MAX_ILEN]; |
0e60a699 | 715 | |
b60fae32 | 716 | if (cpu_memory_rw_debug(cs, bp->pc, t, sw_bp_ilen, 0)) { |
0e60a699 | 717 | return -EINVAL; |
b60fae32 | 718 | } else if (memcmp(t, sw_bp_inst, sw_bp_ilen)) { |
0e60a699 | 719 | return -EINVAL; |
8e4e86af | 720 | } else if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
b60fae32 | 721 | sw_bp_ilen, 1)) { |
0e60a699 AG |
722 | return -EINVAL; |
723 | } | |
724 | ||
725 | return 0; | |
726 | } | |
727 | ||
770a6379 DH |
728 | static struct kvm_hw_breakpoint *find_hw_breakpoint(target_ulong addr, |
729 | int len, int type) | |
730 | { | |
731 | int n; | |
732 | ||
733 | for (n = 0; n < nb_hw_breakpoints; n++) { | |
734 | if (hw_breakpoints[n].addr == addr && hw_breakpoints[n].type == type && | |
735 | (hw_breakpoints[n].len == len || len == -1)) { | |
736 | return &hw_breakpoints[n]; | |
737 | } | |
738 | } | |
739 | ||
740 | return NULL; | |
741 | } | |
742 | ||
743 | static int insert_hw_breakpoint(target_ulong addr, int len, int type) | |
744 | { | |
745 | int size; | |
746 | ||
747 | if (find_hw_breakpoint(addr, len, type)) { | |
748 | return -EEXIST; | |
749 | } | |
750 | ||
751 | size = (nb_hw_breakpoints + 1) * sizeof(struct kvm_hw_breakpoint); | |
752 | ||
753 | if (!hw_breakpoints) { | |
754 | nb_hw_breakpoints = 0; | |
755 | hw_breakpoints = (struct kvm_hw_breakpoint *)g_try_malloc(size); | |
756 | } else { | |
757 | hw_breakpoints = | |
758 | (struct kvm_hw_breakpoint *)g_try_realloc(hw_breakpoints, size); | |
759 | } | |
760 | ||
761 | if (!hw_breakpoints) { | |
762 | nb_hw_breakpoints = 0; | |
763 | return -ENOMEM; | |
764 | } | |
765 | ||
766 | hw_breakpoints[nb_hw_breakpoints].addr = addr; | |
767 | hw_breakpoints[nb_hw_breakpoints].len = len; | |
768 | hw_breakpoints[nb_hw_breakpoints].type = type; | |
769 | ||
770 | nb_hw_breakpoints++; | |
771 | ||
772 | return 0; | |
773 | } | |
774 | ||
8c012449 DH |
775 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
776 | target_ulong len, int type) | |
777 | { | |
770a6379 DH |
778 | switch (type) { |
779 | case GDB_BREAKPOINT_HW: | |
780 | type = KVM_HW_BP; | |
781 | break; | |
782 | case GDB_WATCHPOINT_WRITE: | |
783 | if (len < 1) { | |
784 | return -EINVAL; | |
785 | } | |
786 | type = KVM_HW_WP_WRITE; | |
787 | break; | |
788 | default: | |
789 | return -ENOSYS; | |
790 | } | |
791 | return insert_hw_breakpoint(addr, len, type); | |
8c012449 DH |
792 | } |
793 | ||
794 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
795 | target_ulong len, int type) | |
796 | { | |
770a6379 DH |
797 | int size; |
798 | struct kvm_hw_breakpoint *bp = find_hw_breakpoint(addr, len, type); | |
799 | ||
800 | if (bp == NULL) { | |
801 | return -ENOENT; | |
802 | } | |
803 | ||
804 | nb_hw_breakpoints--; | |
805 | if (nb_hw_breakpoints > 0) { | |
806 | /* | |
807 | * In order to trim the array, move the last element to the position to | |
808 | * be removed - if necessary. | |
809 | */ | |
810 | if (bp != &hw_breakpoints[nb_hw_breakpoints]) { | |
811 | *bp = hw_breakpoints[nb_hw_breakpoints]; | |
812 | } | |
813 | size = nb_hw_breakpoints * sizeof(struct kvm_hw_breakpoint); | |
814 | hw_breakpoints = | |
815 | (struct kvm_hw_breakpoint *)g_realloc(hw_breakpoints, size); | |
816 | } else { | |
817 | g_free(hw_breakpoints); | |
818 | hw_breakpoints = NULL; | |
819 | } | |
820 | ||
821 | return 0; | |
8c012449 DH |
822 | } |
823 | ||
824 | void kvm_arch_remove_all_hw_breakpoints(void) | |
825 | { | |
770a6379 DH |
826 | nb_hw_breakpoints = 0; |
827 | g_free(hw_breakpoints); | |
828 | hw_breakpoints = NULL; | |
8c012449 DH |
829 | } |
830 | ||
831 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) | |
832 | { | |
770a6379 DH |
833 | int i; |
834 | ||
835 | if (nb_hw_breakpoints > 0) { | |
836 | dbg->arch.nr_hw_bp = nb_hw_breakpoints; | |
837 | dbg->arch.hw_bp = hw_breakpoints; | |
838 | ||
839 | for (i = 0; i < nb_hw_breakpoints; ++i) { | |
840 | hw_breakpoints[i].phys_addr = s390_cpu_get_phys_addr_debug(cpu, | |
841 | hw_breakpoints[i].addr); | |
842 | } | |
843 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; | |
844 | } else { | |
845 | dbg->arch.nr_hw_bp = 0; | |
846 | dbg->arch.hw_bp = NULL; | |
847 | } | |
8c012449 DH |
848 | } |
849 | ||
20d695a9 | 850 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 851 | { |
0e60a699 AG |
852 | } |
853 | ||
4c663752 | 854 | MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) |
0e60a699 | 855 | { |
4c663752 | 856 | return MEMTXATTRS_UNSPECIFIED; |
0e60a699 AG |
857 | } |
858 | ||
20d695a9 | 859 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 860 | { |
225dc991 | 861 | return cs->halted; |
0af691d7 MT |
862 | } |
863 | ||
66ad0893 CH |
864 | static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, |
865 | struct kvm_s390_interrupt *interrupt) | |
866 | { | |
867 | int r = 0; | |
868 | ||
869 | interrupt->type = irq->type; | |
870 | switch (irq->type) { | |
871 | case KVM_S390_INT_VIRTIO: | |
872 | interrupt->parm = irq->u.ext.ext_params; | |
873 | /* fall through */ | |
874 | case KVM_S390_INT_PFAULT_INIT: | |
875 | case KVM_S390_INT_PFAULT_DONE: | |
876 | interrupt->parm64 = irq->u.ext.ext_params2; | |
877 | break; | |
878 | case KVM_S390_PROGRAM_INT: | |
879 | interrupt->parm = irq->u.pgm.code; | |
880 | break; | |
881 | case KVM_S390_SIGP_SET_PREFIX: | |
882 | interrupt->parm = irq->u.prefix.address; | |
883 | break; | |
884 | case KVM_S390_INT_SERVICE: | |
885 | interrupt->parm = irq->u.ext.ext_params; | |
886 | break; | |
887 | case KVM_S390_MCHK: | |
888 | interrupt->parm = irq->u.mchk.cr14; | |
889 | interrupt->parm64 = irq->u.mchk.mcic; | |
890 | break; | |
891 | case KVM_S390_INT_EXTERNAL_CALL: | |
892 | interrupt->parm = irq->u.extcall.code; | |
893 | break; | |
894 | case KVM_S390_INT_EMERGENCY: | |
895 | interrupt->parm = irq->u.emerg.code; | |
896 | break; | |
897 | case KVM_S390_SIGP_STOP: | |
898 | case KVM_S390_RESTART: | |
899 | break; /* These types have no parameters */ | |
900 | case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX: | |
901 | interrupt->parm = irq->u.io.subchannel_id << 16; | |
902 | interrupt->parm |= irq->u.io.subchannel_nr; | |
903 | interrupt->parm64 = (uint64_t)irq->u.io.io_int_parm << 32; | |
904 | interrupt->parm64 |= irq->u.io.io_int_word; | |
905 | break; | |
906 | default: | |
907 | r = -EINVAL; | |
908 | break; | |
909 | } | |
910 | return r; | |
911 | } | |
912 | ||
1191c949 | 913 | static void inject_vcpu_irq_legacy(CPUState *cs, struct kvm_s390_irq *irq) |
66ad0893 CH |
914 | { |
915 | struct kvm_s390_interrupt kvmint = {}; | |
66ad0893 CH |
916 | int r; |
917 | ||
918 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
919 | if (r < 0) { | |
920 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
921 | exit(1); | |
922 | } | |
923 | ||
924 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); | |
925 | if (r < 0) { | |
926 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
927 | exit(1); | |
928 | } | |
929 | } | |
930 | ||
1191c949 JF |
931 | void kvm_s390_vcpu_interrupt(S390CPU *cpu, struct kvm_s390_irq *irq) |
932 | { | |
933 | CPUState *cs = CPU(cpu); | |
934 | int r; | |
935 | ||
936 | if (cap_s390_irq) { | |
937 | r = kvm_vcpu_ioctl(cs, KVM_S390_IRQ, irq); | |
938 | if (!r) { | |
939 | return; | |
940 | } | |
941 | error_report("KVM failed to inject interrupt %llx", irq->type); | |
942 | exit(1); | |
943 | } | |
944 | ||
945 | inject_vcpu_irq_legacy(cs, irq); | |
946 | } | |
947 | ||
bbd8bb8e | 948 | static void __kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
66ad0893 CH |
949 | { |
950 | struct kvm_s390_interrupt kvmint = {}; | |
951 | int r; | |
952 | ||
953 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
954 | if (r < 0) { | |
955 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
956 | exit(1); | |
957 | } | |
958 | ||
959 | r = kvm_vm_ioctl(kvm_state, KVM_S390_INTERRUPT, &kvmint); | |
960 | if (r < 0) { | |
961 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
962 | exit(1); | |
963 | } | |
964 | } | |
965 | ||
bbd8bb8e CH |
966 | void kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
967 | { | |
968 | static bool use_flic = true; | |
969 | int r; | |
970 | ||
971 | if (use_flic) { | |
972 | r = kvm_s390_inject_flic(irq); | |
973 | if (r == -ENOSYS) { | |
974 | use_flic = false; | |
975 | } | |
976 | if (!r) { | |
977 | return; | |
978 | } | |
979 | } | |
980 | __kvm_s390_floating_interrupt(irq); | |
981 | } | |
982 | ||
de13d216 | 983 | void kvm_s390_service_interrupt(uint32_t parm) |
0e60a699 | 984 | { |
de13d216 CH |
985 | struct kvm_s390_irq irq = { |
986 | .type = KVM_S390_INT_SERVICE, | |
987 | .u.ext.ext_params = parm, | |
988 | }; | |
0e60a699 | 989 | |
de13d216 | 990 | kvm_s390_floating_interrupt(&irq); |
79afc36d CH |
991 | } |
992 | ||
1bc22652 | 993 | static void enter_pgmcheck(S390CPU *cpu, uint16_t code) |
0e60a699 | 994 | { |
de13d216 CH |
995 | struct kvm_s390_irq irq = { |
996 | .type = KVM_S390_PROGRAM_INT, | |
997 | .u.pgm.code = code, | |
998 | }; | |
999 | ||
1000 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
0e60a699 AG |
1001 | } |
1002 | ||
801cdd35 TH |
1003 | void kvm_s390_access_exception(S390CPU *cpu, uint16_t code, uint64_t te_code) |
1004 | { | |
1005 | struct kvm_s390_irq irq = { | |
1006 | .type = KVM_S390_PROGRAM_INT, | |
1007 | .u.pgm.code = code, | |
1008 | .u.pgm.trans_exc_code = te_code, | |
1009 | .u.pgm.exc_access_id = te_code & 3, | |
1010 | }; | |
1011 | ||
1012 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
1013 | } | |
1014 | ||
1bc22652 | 1015 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 1016 | uint16_t ipbh0) |
0e60a699 | 1017 | { |
1bc22652 | 1018 | CPUS390XState *env = &cpu->env; |
a0fa2cb8 TH |
1019 | uint64_t sccb; |
1020 | uint32_t code; | |
0e60a699 AG |
1021 | int r = 0; |
1022 | ||
cb446eca | 1023 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1024 | sccb = env->regs[ipbh0 & 0xf]; |
1025 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
1026 | ||
6e252802 | 1027 | r = sclp_service_call(env, sccb, code); |
9abf567d | 1028 | if (r < 0) { |
1bc22652 | 1029 | enter_pgmcheck(cpu, -r); |
e8803d93 TH |
1030 | } else { |
1031 | setcc(cpu, r); | |
0e60a699 | 1032 | } |
81f7c56c | 1033 | |
0e60a699 AG |
1034 | return 0; |
1035 | } | |
1036 | ||
1eecf41b | 1037 | static int handle_b2(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
09b99878 | 1038 | { |
09b99878 | 1039 | CPUS390XState *env = &cpu->env; |
1eecf41b FB |
1040 | int rc = 0; |
1041 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
3474b679 | 1042 | |
44c68de0 | 1043 | cpu_synchronize_state(CPU(cpu)); |
3474b679 | 1044 | |
09b99878 | 1045 | switch (ipa1) { |
1eecf41b | 1046 | case PRIV_B2_XSCH: |
5d9bf1c0 | 1047 | ioinst_handle_xsch(cpu, env->regs[1]); |
09b99878 | 1048 | break; |
1eecf41b | 1049 | case PRIV_B2_CSCH: |
5d9bf1c0 | 1050 | ioinst_handle_csch(cpu, env->regs[1]); |
09b99878 | 1051 | break; |
1eecf41b | 1052 | case PRIV_B2_HSCH: |
5d9bf1c0 | 1053 | ioinst_handle_hsch(cpu, env->regs[1]); |
09b99878 | 1054 | break; |
1eecf41b | 1055 | case PRIV_B2_MSCH: |
5d9bf1c0 | 1056 | ioinst_handle_msch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1057 | break; |
1eecf41b | 1058 | case PRIV_B2_SSCH: |
5d9bf1c0 | 1059 | ioinst_handle_ssch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1060 | break; |
1eecf41b | 1061 | case PRIV_B2_STCRW: |
5d9bf1c0 | 1062 | ioinst_handle_stcrw(cpu, run->s390_sieic.ipb); |
09b99878 | 1063 | break; |
1eecf41b | 1064 | case PRIV_B2_STSCH: |
5d9bf1c0 | 1065 | ioinst_handle_stsch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1066 | break; |
1eecf41b | 1067 | case PRIV_B2_TSCH: |
09b99878 CH |
1068 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ |
1069 | fprintf(stderr, "Spurious tsch intercept\n"); | |
1070 | break; | |
1eecf41b | 1071 | case PRIV_B2_CHSC: |
5d9bf1c0 | 1072 | ioinst_handle_chsc(cpu, run->s390_sieic.ipb); |
09b99878 | 1073 | break; |
1eecf41b | 1074 | case PRIV_B2_TPI: |
09b99878 CH |
1075 | /* This should have been handled by kvm already. */ |
1076 | fprintf(stderr, "Spurious tpi intercept\n"); | |
1077 | break; | |
1eecf41b | 1078 | case PRIV_B2_SCHM: |
5d9bf1c0 TH |
1079 | ioinst_handle_schm(cpu, env->regs[1], env->regs[2], |
1080 | run->s390_sieic.ipb); | |
09b99878 | 1081 | break; |
1eecf41b | 1082 | case PRIV_B2_RSCH: |
5d9bf1c0 | 1083 | ioinst_handle_rsch(cpu, env->regs[1]); |
09b99878 | 1084 | break; |
1eecf41b | 1085 | case PRIV_B2_RCHP: |
5d9bf1c0 | 1086 | ioinst_handle_rchp(cpu, env->regs[1]); |
09b99878 | 1087 | break; |
1eecf41b | 1088 | case PRIV_B2_STCPS: |
09b99878 | 1089 | /* We do not provide this instruction, it is suppressed. */ |
09b99878 | 1090 | break; |
1eecf41b | 1091 | case PRIV_B2_SAL: |
5d9bf1c0 | 1092 | ioinst_handle_sal(cpu, env->regs[1]); |
09b99878 | 1093 | break; |
1eecf41b | 1094 | case PRIV_B2_SIGA: |
c1e8dfb5 | 1095 | /* Not provided, set CC = 3 for subchannel not operational */ |
5d9bf1c0 | 1096 | setcc(cpu, 3); |
09b99878 | 1097 | break; |
1eecf41b FB |
1098 | case PRIV_B2_SCLP_CALL: |
1099 | rc = kvm_sclp_service_call(cpu, run, ipbh0); | |
1100 | break; | |
c1e8dfb5 | 1101 | default: |
1eecf41b FB |
1102 | rc = -1; |
1103 | DPRINTF("KVM: unhandled PRIV: 0xb2%x\n", ipa1); | |
1104 | break; | |
09b99878 CH |
1105 | } |
1106 | ||
1eecf41b | 1107 | return rc; |
09b99878 CH |
1108 | } |
1109 | ||
6cb1e49d AY |
1110 | static uint64_t get_base_disp_rxy(S390CPU *cpu, struct kvm_run *run, |
1111 | uint8_t *ar) | |
863f6f52 FB |
1112 | { |
1113 | CPUS390XState *env = &cpu->env; | |
1114 | uint32_t x2 = (run->s390_sieic.ipa & 0x000f); | |
1115 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1116 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1117 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1118 | ||
1119 | if (disp2 & 0x80000) { | |
1120 | disp2 += 0xfff00000; | |
1121 | } | |
6cb1e49d AY |
1122 | if (ar) { |
1123 | *ar = base2; | |
1124 | } | |
863f6f52 FB |
1125 | |
1126 | return (base2 ? env->regs[base2] : 0) + | |
1127 | (x2 ? env->regs[x2] : 0) + (long)(int)disp2; | |
1128 | } | |
1129 | ||
6cb1e49d AY |
1130 | static uint64_t get_base_disp_rsy(S390CPU *cpu, struct kvm_run *run, |
1131 | uint8_t *ar) | |
863f6f52 FB |
1132 | { |
1133 | CPUS390XState *env = &cpu->env; | |
1134 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1135 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1136 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1137 | ||
1138 | if (disp2 & 0x80000) { | |
1139 | disp2 += 0xfff00000; | |
1140 | } | |
6cb1e49d AY |
1141 | if (ar) { |
1142 | *ar = base2; | |
1143 | } | |
863f6f52 FB |
1144 | |
1145 | return (base2 ? env->regs[base2] : 0) + (long)(int)disp2; | |
1146 | } | |
1147 | ||
1148 | static int kvm_clp_service_call(S390CPU *cpu, struct kvm_run *run) | |
1149 | { | |
1150 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1151 | ||
1152 | return clp_service_call(cpu, r2); | |
1153 | } | |
1154 | ||
1155 | static int kvm_pcilg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1156 | { | |
1157 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1158 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1159 | ||
1160 | return pcilg_service_call(cpu, r1, r2); | |
1161 | } | |
1162 | ||
1163 | static int kvm_pcistg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1164 | { | |
1165 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1166 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1167 | ||
1168 | return pcistg_service_call(cpu, r1, r2); | |
1169 | } | |
1170 | ||
1171 | static int kvm_stpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1172 | { | |
1173 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1174 | uint64_t fiba; | |
6cb1e49d | 1175 | uint8_t ar; |
863f6f52 FB |
1176 | |
1177 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1178 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1179 | |
6cb1e49d | 1180 | return stpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1181 | } |
1182 | ||
1183 | static int kvm_sic_service_call(S390CPU *cpu, struct kvm_run *run) | |
1184 | { | |
1185 | /* NOOP */ | |
1186 | return 0; | |
1187 | } | |
1188 | ||
1189 | static int kvm_rpcit_service_call(S390CPU *cpu, struct kvm_run *run) | |
1190 | { | |
1191 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1192 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1193 | ||
1194 | return rpcit_service_call(cpu, r1, r2); | |
1195 | } | |
1196 | ||
1197 | static int kvm_pcistb_service_call(S390CPU *cpu, struct kvm_run *run) | |
1198 | { | |
1199 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1200 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
1201 | uint64_t gaddr; | |
6cb1e49d | 1202 | uint8_t ar; |
863f6f52 FB |
1203 | |
1204 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1205 | gaddr = get_base_disp_rsy(cpu, run, &ar); |
863f6f52 | 1206 | |
6cb1e49d | 1207 | return pcistb_service_call(cpu, r1, r3, gaddr, ar); |
863f6f52 FB |
1208 | } |
1209 | ||
1210 | static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1211 | { | |
1212 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1213 | uint64_t fiba; | |
6cb1e49d | 1214 | uint8_t ar; |
863f6f52 FB |
1215 | |
1216 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1217 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1218 | |
6cb1e49d | 1219 | return mpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1220 | } |
1221 | ||
1eecf41b | 1222 | static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 AG |
1223 | { |
1224 | int r = 0; | |
0e60a699 | 1225 | |
0e60a699 | 1226 | switch (ipa1) { |
863f6f52 FB |
1227 | case PRIV_B9_CLP: |
1228 | r = kvm_clp_service_call(cpu, run); | |
1229 | break; | |
1230 | case PRIV_B9_PCISTG: | |
1231 | r = kvm_pcistg_service_call(cpu, run); | |
1232 | break; | |
1233 | case PRIV_B9_PCILG: | |
1234 | r = kvm_pcilg_service_call(cpu, run); | |
1235 | break; | |
1236 | case PRIV_B9_RPCIT: | |
1237 | r = kvm_rpcit_service_call(cpu, run); | |
1238 | break; | |
1eecf41b FB |
1239 | case PRIV_B9_EQBS: |
1240 | /* just inject exception */ | |
1241 | r = -1; | |
1242 | break; | |
1243 | default: | |
1244 | r = -1; | |
1245 | DPRINTF("KVM: unhandled PRIV: 0xb9%x\n", ipa1); | |
1246 | break; | |
1247 | } | |
1248 | ||
1249 | return r; | |
1250 | } | |
1251 | ||
80765f07 | 1252 | static int handle_eb(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1eecf41b FB |
1253 | { |
1254 | int r = 0; | |
1255 | ||
80765f07 | 1256 | switch (ipbl) { |
863f6f52 FB |
1257 | case PRIV_EB_PCISTB: |
1258 | r = kvm_pcistb_service_call(cpu, run); | |
1259 | break; | |
1260 | case PRIV_EB_SIC: | |
1261 | r = kvm_sic_service_call(cpu, run); | |
1262 | break; | |
1eecf41b FB |
1263 | case PRIV_EB_SQBS: |
1264 | /* just inject exception */ | |
1265 | r = -1; | |
1266 | break; | |
1267 | default: | |
1268 | r = -1; | |
80765f07 | 1269 | DPRINTF("KVM: unhandled PRIV: 0xeb%x\n", ipbl); |
1eecf41b | 1270 | break; |
0e60a699 AG |
1271 | } |
1272 | ||
1273 | return r; | |
1274 | } | |
1275 | ||
863f6f52 FB |
1276 | static int handle_e3(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1277 | { | |
1278 | int r = 0; | |
1279 | ||
1280 | switch (ipbl) { | |
1281 | case PRIV_E3_MPCIFC: | |
1282 | r = kvm_mpcifc_service_call(cpu, run); | |
1283 | break; | |
1284 | case PRIV_E3_STPCIFC: | |
1285 | r = kvm_stpcifc_service_call(cpu, run); | |
1286 | break; | |
1287 | default: | |
1288 | r = -1; | |
1289 | DPRINTF("KVM: unhandled PRIV: 0xe3%x\n", ipbl); | |
1290 | break; | |
1291 | } | |
1292 | ||
1293 | return r; | |
1294 | } | |
1295 | ||
4fd6dd06 | 1296 | static int handle_hypercall(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 1297 | { |
4fd6dd06 | 1298 | CPUS390XState *env = &cpu->env; |
77319f22 | 1299 | int ret; |
3474b679 | 1300 | |
44c68de0 | 1301 | cpu_synchronize_state(CPU(cpu)); |
77319f22 TH |
1302 | ret = s390_virtio_hypercall(env); |
1303 | if (ret == -EINVAL) { | |
1304 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1305 | return 0; | |
1306 | } | |
0e60a699 | 1307 | |
77319f22 | 1308 | return ret; |
0e60a699 AG |
1309 | } |
1310 | ||
8fc639af XW |
1311 | static void kvm_handle_diag_288(S390CPU *cpu, struct kvm_run *run) |
1312 | { | |
1313 | uint64_t r1, r3; | |
1314 | int rc; | |
1315 | ||
1316 | cpu_synchronize_state(CPU(cpu)); | |
1317 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1318 | r3 = run->s390_sieic.ipa & 0x000f; | |
1319 | rc = handle_diag_288(&cpu->env, r1, r3); | |
1320 | if (rc) { | |
1321 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1322 | } | |
1323 | } | |
1324 | ||
268846ba ED |
1325 | static void kvm_handle_diag_308(S390CPU *cpu, struct kvm_run *run) |
1326 | { | |
1327 | uint64_t r1, r3; | |
1328 | ||
1329 | cpu_synchronize_state(CPU(cpu)); | |
20dd25bb | 1330 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; |
268846ba ED |
1331 | r3 = run->s390_sieic.ipa & 0x000f; |
1332 | handle_diag_308(&cpu->env, r1, r3); | |
1333 | } | |
1334 | ||
b30f4dfb DH |
1335 | static int handle_sw_breakpoint(S390CPU *cpu, struct kvm_run *run) |
1336 | { | |
1337 | CPUS390XState *env = &cpu->env; | |
1338 | unsigned long pc; | |
1339 | ||
1340 | cpu_synchronize_state(CPU(cpu)); | |
1341 | ||
b60fae32 | 1342 | pc = env->psw.addr - sw_bp_ilen; |
b30f4dfb DH |
1343 | if (kvm_find_sw_breakpoint(CPU(cpu), pc)) { |
1344 | env->psw.addr = pc; | |
1345 | return EXCP_DEBUG; | |
1346 | } | |
1347 | ||
1348 | return -ENOENT; | |
1349 | } | |
1350 | ||
638129ff CH |
1351 | #define DIAG_KVM_CODE_MASK 0x000000000000ffff |
1352 | ||
1353 | static int handle_diag(S390CPU *cpu, struct kvm_run *run, uint32_t ipb) | |
0e60a699 AG |
1354 | { |
1355 | int r = 0; | |
638129ff CH |
1356 | uint16_t func_code; |
1357 | ||
1358 | /* | |
1359 | * For any diagnose call we support, bits 48-63 of the resulting | |
1360 | * address specify the function code; the remainder is ignored. | |
1361 | */ | |
6cb1e49d | 1362 | func_code = decode_basedisp_rs(&cpu->env, ipb, NULL) & DIAG_KVM_CODE_MASK; |
638129ff | 1363 | switch (func_code) { |
8fc639af XW |
1364 | case DIAG_TIMEREVENT: |
1365 | kvm_handle_diag_288(cpu, run); | |
1366 | break; | |
268846ba ED |
1367 | case DIAG_IPL: |
1368 | kvm_handle_diag_308(cpu, run); | |
1369 | break; | |
39fbc5c6 CB |
1370 | case DIAG_KVM_HYPERCALL: |
1371 | r = handle_hypercall(cpu, run); | |
1372 | break; | |
1373 | case DIAG_KVM_BREAKPOINT: | |
b30f4dfb | 1374 | r = handle_sw_breakpoint(cpu, run); |
39fbc5c6 CB |
1375 | break; |
1376 | default: | |
638129ff | 1377 | DPRINTF("KVM: unknown DIAG: 0x%x\n", func_code); |
68540b1a | 1378 | enter_pgmcheck(cpu, PGM_SPECIFICATION); |
39fbc5c6 | 1379 | break; |
0e60a699 AG |
1380 | } |
1381 | ||
1382 | return r; | |
1383 | } | |
1384 | ||
6eb8f212 DH |
1385 | typedef struct SigpInfo { |
1386 | S390CPU *cpu; | |
22740e3f | 1387 | uint64_t param; |
6eb8f212 DH |
1388 | int cc; |
1389 | uint64_t *status_reg; | |
1390 | } SigpInfo; | |
1391 | ||
36b5c845 | 1392 | static void set_sigp_status(SigpInfo *si, uint64_t status) |
b20a461f | 1393 | { |
36b5c845 DH |
1394 | *si->status_reg &= 0xffffffff00000000ULL; |
1395 | *si->status_reg |= status; | |
1396 | si->cc = SIGP_CC_STATUS_STORED; | |
1397 | } | |
6e6ad8db | 1398 | |
6eb8f212 | 1399 | static void sigp_start(void *arg) |
b20a461f | 1400 | { |
6eb8f212 | 1401 | SigpInfo *si = arg; |
6e6ad8db | 1402 | |
4f2b55d1 DH |
1403 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { |
1404 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1405 | return; | |
1406 | } | |
1407 | ||
6eb8f212 DH |
1408 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); |
1409 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
b20a461f TH |
1410 | } |
1411 | ||
18ff9494 | 1412 | static void sigp_stop(void *arg) |
0e60a699 | 1413 | { |
18ff9494 DH |
1414 | SigpInfo *si = arg; |
1415 | struct kvm_s390_irq irq = { | |
1416 | .type = KVM_S390_SIGP_STOP, | |
1417 | }; | |
1418 | ||
1419 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_OPERATING) { | |
1420 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1421 | return; | |
1422 | } | |
1423 | ||
1424 | /* disabled wait - sleeping in user space */ | |
1425 | if (CPU(si->cpu)->halted) { | |
1426 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1427 | } else { | |
1428 | /* execute the stop function */ | |
1429 | si->cpu->env.sigp_order = SIGP_STOP; | |
1430 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1431 | } | |
1432 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1433 | } | |
1434 | ||
abec5356 EF |
1435 | #define ADTL_SAVE_AREA_SIZE 1024 |
1436 | static int kvm_s390_store_adtl_status(S390CPU *cpu, hwaddr addr) | |
1437 | { | |
1438 | void *mem; | |
1439 | hwaddr len = ADTL_SAVE_AREA_SIZE; | |
1440 | ||
1441 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1442 | if (!mem) { | |
1443 | return -EFAULT; | |
1444 | } | |
1445 | if (len != ADTL_SAVE_AREA_SIZE) { | |
1446 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1447 | return -EFAULT; | |
1448 | } | |
1449 | ||
1450 | memcpy(mem, &cpu->env.vregs, 512); | |
1451 | ||
1452 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1453 | ||
1454 | return 0; | |
1455 | } | |
1456 | ||
18ff9494 DH |
1457 | #define KVM_S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) |
1458 | #define SAVE_AREA_SIZE 512 | |
1459 | static int kvm_s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) | |
1460 | { | |
1461 | static const uint8_t ar_id = 1; | |
1462 | uint64_t ckc = cpu->env.ckc >> 8; | |
1463 | void *mem; | |
c498d8e3 | 1464 | int i; |
18ff9494 DH |
1465 | hwaddr len = SAVE_AREA_SIZE; |
1466 | ||
1467 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1468 | if (!mem) { | |
1469 | return -EFAULT; | |
1470 | } | |
1471 | if (len != SAVE_AREA_SIZE) { | |
1472 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1473 | return -EFAULT; | |
1474 | } | |
1475 | ||
1476 | if (store_arch) { | |
1477 | cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1); | |
1478 | } | |
c498d8e3 | 1479 | for (i = 0; i < 16; ++i) { |
182f42fd | 1480 | *((uint64_t *)mem + i) = get_freg(&cpu->env, i)->ll; |
c498d8e3 | 1481 | } |
18ff9494 DH |
1482 | memcpy(mem + 128, &cpu->env.regs, 128); |
1483 | memcpy(mem + 256, &cpu->env.psw, 16); | |
1484 | memcpy(mem + 280, &cpu->env.psa, 4); | |
1485 | memcpy(mem + 284, &cpu->env.fpc, 4); | |
1486 | memcpy(mem + 292, &cpu->env.todpr, 4); | |
1487 | memcpy(mem + 296, &cpu->env.cputm, 8); | |
1488 | memcpy(mem + 304, &ckc, 8); | |
1489 | memcpy(mem + 320, &cpu->env.aregs, 64); | |
1490 | memcpy(mem + 384, &cpu->env.cregs, 128); | |
1491 | ||
1492 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1493 | ||
1494 | return 0; | |
1495 | } | |
1496 | ||
1497 | static void sigp_stop_and_store_status(void *arg) | |
1498 | { | |
1499 | SigpInfo *si = arg; | |
1500 | struct kvm_s390_irq irq = { | |
1501 | .type = KVM_S390_SIGP_STOP, | |
1502 | }; | |
1503 | ||
1504 | /* disabled wait - sleeping in user space */ | |
1505 | if (s390_cpu_get_state(si->cpu) == CPU_STATE_OPERATING && | |
1506 | CPU(si->cpu)->halted) { | |
1507 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1508 | } | |
1509 | ||
1510 | switch (s390_cpu_get_state(si->cpu)) { | |
1511 | case CPU_STATE_OPERATING: | |
1512 | si->cpu->env.sigp_order = SIGP_STOP_STORE_STATUS; | |
1513 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1514 | /* store will be performed when handling the stop intercept */ | |
1515 | break; | |
1516 | case CPU_STATE_STOPPED: | |
1517 | /* already stopped, just store the status */ | |
1518 | cpu_synchronize_state(CPU(si->cpu)); | |
1519 | kvm_s390_store_status(si->cpu, KVM_S390_STORE_STATUS_DEF_ADDR, true); | |
1520 | break; | |
1521 | } | |
1522 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1523 | } | |
1524 | ||
1525 | static void sigp_store_status_at_address(void *arg) | |
1526 | { | |
1527 | SigpInfo *si = arg; | |
1528 | uint32_t address = si->param & 0x7ffffe00u; | |
1529 | ||
1530 | /* cpu has to be stopped */ | |
1531 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1532 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1533 | return; | |
1534 | } | |
1535 | ||
1536 | cpu_synchronize_state(CPU(si->cpu)); | |
1537 | ||
1538 | if (kvm_s390_store_status(si->cpu, address, false)) { | |
1539 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1540 | return; | |
1541 | } | |
1542 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1543 | } | |
1544 | ||
abec5356 EF |
1545 | static void sigp_store_adtl_status(void *arg) |
1546 | { | |
1547 | SigpInfo *si = arg; | |
1548 | ||
7c72ac49 | 1549 | if (!s390_has_feat(S390_FEAT_VECTOR)) { |
abec5356 EF |
1550 | set_sigp_status(si, SIGP_STAT_INVALID_ORDER); |
1551 | return; | |
1552 | } | |
1553 | ||
1554 | /* cpu has to be stopped */ | |
1555 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1556 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1557 | return; | |
1558 | } | |
1559 | ||
1560 | /* parameter must be aligned to 1024-byte boundary */ | |
1561 | if (si->param & 0x3ff) { | |
1562 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1563 | return; | |
1564 | } | |
1565 | ||
1566 | cpu_synchronize_state(CPU(si->cpu)); | |
1567 | ||
1568 | if (kvm_s390_store_adtl_status(si->cpu, si->param)) { | |
1569 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1570 | return; | |
1571 | } | |
1572 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1573 | } | |
1574 | ||
6eb8f212 | 1575 | static void sigp_restart(void *arg) |
0e60a699 | 1576 | { |
6eb8f212 | 1577 | SigpInfo *si = arg; |
de13d216 CH |
1578 | struct kvm_s390_irq irq = { |
1579 | .type = KVM_S390_RESTART, | |
1580 | }; | |
1581 | ||
e3b7b578 DH |
1582 | switch (s390_cpu_get_state(si->cpu)) { |
1583 | case CPU_STATE_STOPPED: | |
1584 | /* the restart irq has to be delivered prior to any other pending irq */ | |
1585 | cpu_synchronize_state(CPU(si->cpu)); | |
1586 | do_restart_interrupt(&si->cpu->env); | |
1587 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); | |
1588 | break; | |
1589 | case CPU_STATE_OPERATING: | |
1590 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1591 | break; | |
1592 | } | |
6eb8f212 | 1593 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
6e6ad8db DH |
1594 | } |
1595 | ||
1596 | int kvm_s390_cpu_restart(S390CPU *cpu) | |
1597 | { | |
6eb8f212 DH |
1598 | SigpInfo si = { |
1599 | .cpu = cpu, | |
1600 | }; | |
1601 | ||
1602 | run_on_cpu(CPU(cpu), sigp_restart, &si); | |
7f7f9752 | 1603 | DPRINTF("DONE: KVM cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
1604 | return 0; |
1605 | } | |
1606 | ||
f7d3e466 | 1607 | static void sigp_initial_cpu_reset(void *arg) |
0e60a699 | 1608 | { |
6eb8f212 DH |
1609 | SigpInfo *si = arg; |
1610 | CPUState *cs = CPU(si->cpu); | |
1611 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
d5900813 | 1612 | |
6eb8f212 DH |
1613 | cpu_synchronize_state(cs); |
1614 | scc->initial_cpu_reset(cs); | |
1615 | cpu_synchronize_post_reset(cs); | |
1616 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
0e60a699 AG |
1617 | } |
1618 | ||
04c2b516 TH |
1619 | static void sigp_cpu_reset(void *arg) |
1620 | { | |
6eb8f212 DH |
1621 | SigpInfo *si = arg; |
1622 | CPUState *cs = CPU(si->cpu); | |
1623 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
04c2b516 | 1624 | |
6eb8f212 DH |
1625 | cpu_synchronize_state(cs); |
1626 | scc->cpu_reset(cs); | |
1627 | cpu_synchronize_post_reset(cs); | |
1628 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
04c2b516 TH |
1629 | } |
1630 | ||
18ff9494 | 1631 | static void sigp_set_prefix(void *arg) |
0e60a699 | 1632 | { |
18ff9494 DH |
1633 | SigpInfo *si = arg; |
1634 | uint32_t addr = si->param & 0x7fffe000u; | |
0e60a699 | 1635 | |
18ff9494 | 1636 | cpu_synchronize_state(CPU(si->cpu)); |
0e60a699 | 1637 | |
18ff9494 DH |
1638 | if (!address_space_access_valid(&address_space_memory, addr, |
1639 | sizeof(struct LowCore), false)) { | |
1640 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1641 | return; | |
1642 | } | |
0e60a699 | 1643 | |
18ff9494 DH |
1644 | /* cpu has to be stopped */ |
1645 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1646 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1647 | return; | |
0e60a699 AG |
1648 | } |
1649 | ||
18ff9494 DH |
1650 | si->cpu->env.psa = addr; |
1651 | cpu_synchronize_post_init(CPU(si->cpu)); | |
1652 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1653 | } | |
1654 | ||
6eb8f212 | 1655 | static int handle_sigp_single_dst(S390CPU *dst_cpu, uint8_t order, |
22740e3f | 1656 | uint64_t param, uint64_t *status_reg) |
6eb8f212 DH |
1657 | { |
1658 | SigpInfo si = { | |
1659 | .cpu = dst_cpu, | |
22740e3f | 1660 | .param = param, |
6eb8f212 DH |
1661 | .status_reg = status_reg, |
1662 | }; | |
1663 | ||
1664 | /* cpu available? */ | |
1665 | if (dst_cpu == NULL) { | |
1666 | return SIGP_CC_NOT_OPERATIONAL; | |
1667 | } | |
1668 | ||
18ff9494 DH |
1669 | /* only resets can break pending orders */ |
1670 | if (dst_cpu->env.sigp_order != 0 && | |
1671 | order != SIGP_CPU_RESET && | |
1672 | order != SIGP_INITIAL_CPU_RESET) { | |
1673 | return SIGP_CC_BUSY; | |
1674 | } | |
1675 | ||
6eb8f212 | 1676 | switch (order) { |
b20a461f | 1677 | case SIGP_START: |
6eb8f212 DH |
1678 | run_on_cpu(CPU(dst_cpu), sigp_start, &si); |
1679 | break; | |
18ff9494 DH |
1680 | case SIGP_STOP: |
1681 | run_on_cpu(CPU(dst_cpu), sigp_stop, &si); | |
b20a461f | 1682 | break; |
0b9972a2 | 1683 | case SIGP_RESTART: |
6eb8f212 | 1684 | run_on_cpu(CPU(dst_cpu), sigp_restart, &si); |
0b9972a2 | 1685 | break; |
18ff9494 DH |
1686 | case SIGP_STOP_STORE_STATUS: |
1687 | run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, &si); | |
1688 | break; | |
1689 | case SIGP_STORE_STATUS_ADDR: | |
1690 | run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, &si); | |
1691 | break; | |
abec5356 EF |
1692 | case SIGP_STORE_ADTL_STATUS: |
1693 | run_on_cpu(CPU(dst_cpu), sigp_store_adtl_status, &si); | |
1694 | break; | |
18ff9494 DH |
1695 | case SIGP_SET_PREFIX: |
1696 | run_on_cpu(CPU(dst_cpu), sigp_set_prefix, &si); | |
0788082a | 1697 | break; |
0b9972a2 | 1698 | case SIGP_INITIAL_CPU_RESET: |
6eb8f212 | 1699 | run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, &si); |
0b9972a2 | 1700 | break; |
04c2b516 | 1701 | case SIGP_CPU_RESET: |
6eb8f212 | 1702 | run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, &si); |
04c2b516 | 1703 | break; |
0b9972a2 | 1704 | default: |
6eb8f212 | 1705 | DPRINTF("KVM: unknown SIGP: 0x%x\n", order); |
36b5c845 | 1706 | set_sigp_status(&si, SIGP_STAT_INVALID_ORDER); |
6eb8f212 | 1707 | } |
04c2b516 | 1708 | |
6eb8f212 | 1709 | return si.cc; |
04c2b516 TH |
1710 | } |
1711 | ||
18ff9494 DH |
1712 | static int sigp_set_architecture(S390CPU *cpu, uint32_t param, |
1713 | uint64_t *status_reg) | |
1714 | { | |
1715 | CPUState *cur_cs; | |
1716 | S390CPU *cur_cpu; | |
1717 | ||
1718 | /* due to the BQL, we are the only active cpu */ | |
1719 | CPU_FOREACH(cur_cs) { | |
1720 | cur_cpu = S390_CPU(cur_cs); | |
1721 | if (cur_cpu->env.sigp_order != 0) { | |
1722 | return SIGP_CC_BUSY; | |
1723 | } | |
1724 | cpu_synchronize_state(cur_cs); | |
1725 | /* all but the current one have to be stopped */ | |
1726 | if (cur_cpu != cpu && | |
1727 | s390_cpu_get_state(cur_cpu) != CPU_STATE_STOPPED) { | |
1728 | *status_reg &= 0xffffffff00000000ULL; | |
1729 | *status_reg |= SIGP_STAT_INCORRECT_STATE; | |
1730 | return SIGP_CC_STATUS_STORED; | |
1731 | } | |
1732 | } | |
1733 | ||
1734 | switch (param & 0xff) { | |
1735 | case SIGP_MODE_ESA_S390: | |
1736 | /* not supported */ | |
1737 | return SIGP_CC_NOT_OPERATIONAL; | |
1738 | case SIGP_MODE_Z_ARCH_TRANS_ALL_PSW: | |
1739 | case SIGP_MODE_Z_ARCH_TRANS_CUR_PSW: | |
1740 | CPU_FOREACH(cur_cs) { | |
1741 | cur_cpu = S390_CPU(cur_cs); | |
1742 | cur_cpu->env.pfault_token = -1UL; | |
1743 | } | |
0b9972a2 | 1744 | break; |
18ff9494 DH |
1745 | default: |
1746 | *status_reg &= 0xffffffff00000000ULL; | |
1747 | *status_reg |= SIGP_STAT_INVALID_PARAMETER; | |
1748 | return SIGP_CC_STATUS_STORED; | |
0e60a699 AG |
1749 | } |
1750 | ||
18ff9494 DH |
1751 | return SIGP_CC_ORDER_CODE_ACCEPTED; |
1752 | } | |
1753 | ||
b8031adb TH |
1754 | #define SIGP_ORDER_MASK 0x000000ff |
1755 | ||
f7575c96 | 1756 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 1757 | { |
f7575c96 | 1758 | CPUS390XState *env = &cpu->env; |
6eb8f212 DH |
1759 | const uint8_t r1 = ipa1 >> 4; |
1760 | const uint8_t r3 = ipa1 & 0x0f; | |
1761 | int ret; | |
1762 | uint8_t order; | |
1763 | uint64_t *status_reg; | |
22740e3f | 1764 | uint64_t param; |
6eb8f212 | 1765 | S390CPU *dst_cpu = NULL; |
0e60a699 | 1766 | |
cb446eca | 1767 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1768 | |
1769 | /* get order code */ | |
6cb1e49d AY |
1770 | order = decode_basedisp_rs(env, run->s390_sieic.ipb, NULL) |
1771 | & SIGP_ORDER_MASK; | |
6eb8f212 | 1772 | status_reg = &env->regs[r1]; |
22740e3f | 1773 | param = (r1 % 2) ? env->regs[r1] : env->regs[r1 + 1]; |
0e60a699 | 1774 | |
6eb8f212 | 1775 | switch (order) { |
0b9972a2 | 1776 | case SIGP_SET_ARCH: |
18ff9494 | 1777 | ret = sigp_set_architecture(cpu, param, status_reg); |
04c2b516 | 1778 | break; |
0b9972a2 | 1779 | default: |
6eb8f212 DH |
1780 | /* all other sigp orders target a single vcpu */ |
1781 | dst_cpu = s390_cpu_addr2state(env->regs[r3]); | |
22740e3f | 1782 | ret = handle_sigp_single_dst(dst_cpu, order, param, status_reg); |
0e60a699 AG |
1783 | } |
1784 | ||
56dba22b DH |
1785 | trace_kvm_sigp_finished(order, CPU(cpu)->cpu_index, |
1786 | dst_cpu ? CPU(dst_cpu)->cpu_index : -1, ret); | |
1787 | ||
6eb8f212 DH |
1788 | if (ret >= 0) { |
1789 | setcc(cpu, ret); | |
1790 | return 0; | |
1791 | } | |
1792 | ||
1793 | return ret; | |
0e60a699 AG |
1794 | } |
1795 | ||
b30f4dfb | 1796 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 AG |
1797 | { |
1798 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); | |
1799 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
d7963c43 | 1800 | int r = -1; |
0e60a699 | 1801 | |
e67137c6 PM |
1802 | DPRINTF("handle_instruction 0x%x 0x%x\n", |
1803 | run->s390_sieic.ipa, run->s390_sieic.ipb); | |
0e60a699 | 1804 | switch (ipa0) { |
09b99878 | 1805 | case IPA0_B2: |
1eecf41b FB |
1806 | r = handle_b2(cpu, run, ipa1); |
1807 | break; | |
09b99878 | 1808 | case IPA0_B9: |
1eecf41b FB |
1809 | r = handle_b9(cpu, run, ipa1); |
1810 | break; | |
09b99878 | 1811 | case IPA0_EB: |
80765f07 | 1812 | r = handle_eb(cpu, run, run->s390_sieic.ipb & 0xff); |
09b99878 | 1813 | break; |
863f6f52 FB |
1814 | case IPA0_E3: |
1815 | r = handle_e3(cpu, run, run->s390_sieic.ipb & 0xff); | |
1816 | break; | |
09b99878 | 1817 | case IPA0_DIAG: |
638129ff | 1818 | r = handle_diag(cpu, run, run->s390_sieic.ipb); |
09b99878 CH |
1819 | break; |
1820 | case IPA0_SIGP: | |
1821 | r = handle_sigp(cpu, run, ipa1); | |
1822 | break; | |
0e60a699 AG |
1823 | } |
1824 | ||
1825 | if (r < 0) { | |
b30f4dfb | 1826 | r = 0; |
1bc22652 | 1827 | enter_pgmcheck(cpu, 0x0001); |
0e60a699 | 1828 | } |
b30f4dfb DH |
1829 | |
1830 | return r; | |
0e60a699 AG |
1831 | } |
1832 | ||
f7575c96 | 1833 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
1834 | { |
1835 | /* signal quiesce */ | |
f7575c96 | 1836 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
1837 | } |
1838 | ||
a2689242 TH |
1839 | static void unmanageable_intercept(S390CPU *cpu, const char *str, int pswoffset) |
1840 | { | |
1841 | CPUState *cs = CPU(cpu); | |
1842 | ||
1843 | error_report("Unmanageable %s! CPU%i new PSW: 0x%016lx:%016lx", | |
1844 | str, cs->cpu_index, ldq_phys(cs->as, cpu->env.psa + pswoffset), | |
1845 | ldq_phys(cs->as, cpu->env.psa + pswoffset + 8)); | |
eb24f7c6 | 1846 | s390_cpu_halt(cpu); |
5f5b5942 | 1847 | qemu_system_guest_panicked(); |
a2689242 TH |
1848 | } |
1849 | ||
1bc22652 | 1850 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 1851 | { |
f7575c96 AF |
1852 | CPUState *cs = CPU(cpu); |
1853 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
1854 | int icpt_code = run->s390_sieic.icptcode; |
1855 | int r = 0; | |
1856 | ||
e67137c6 | 1857 | DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 1858 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
1859 | switch (icpt_code) { |
1860 | case ICPT_INSTRUCTION: | |
b30f4dfb | 1861 | r = handle_instruction(cpu, run); |
0e60a699 | 1862 | break; |
6449a41a TH |
1863 | case ICPT_PROGRAM: |
1864 | unmanageable_intercept(cpu, "program interrupt", | |
1865 | offsetof(LowCore, program_new_psw)); | |
1866 | r = EXCP_HALTED; | |
1867 | break; | |
a2689242 TH |
1868 | case ICPT_EXT_INT: |
1869 | unmanageable_intercept(cpu, "external interrupt", | |
1870 | offsetof(LowCore, external_new_psw)); | |
1871 | r = EXCP_HALTED; | |
1872 | break; | |
0e60a699 | 1873 | case ICPT_WAITPSW: |
08eb8c85 | 1874 | /* disabled wait, since enabled wait is handled in kernel */ |
eb24f7c6 DH |
1875 | cpu_synchronize_state(cs); |
1876 | if (s390_cpu_halt(cpu) == 0) { | |
08eb8c85 CB |
1877 | if (is_special_wait_psw(cs)) { |
1878 | qemu_system_shutdown_request(); | |
1879 | } else { | |
5f5b5942 | 1880 | qemu_system_guest_panicked(); |
08eb8c85 | 1881 | } |
eca3ed03 CB |
1882 | } |
1883 | r = EXCP_HALTED; | |
1884 | break; | |
854e42f3 | 1885 | case ICPT_CPU_STOP: |
eb24f7c6 | 1886 | if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) { |
854e42f3 CB |
1887 | qemu_system_shutdown_request(); |
1888 | } | |
18ff9494 DH |
1889 | if (cpu->env.sigp_order == SIGP_STOP_STORE_STATUS) { |
1890 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, | |
1891 | true); | |
1892 | } | |
1893 | cpu->env.sigp_order = 0; | |
854e42f3 | 1894 | r = EXCP_HALTED; |
0e60a699 | 1895 | break; |
b60fae32 DH |
1896 | case ICPT_OPEREXC: |
1897 | /* currently only instr 0x0000 after enabled via capability */ | |
1898 | r = handle_sw_breakpoint(cpu, run); | |
1899 | if (r == -ENOENT) { | |
1900 | enter_pgmcheck(cpu, PGM_OPERATION); | |
1901 | r = 0; | |
1902 | } | |
1903 | break; | |
0e60a699 AG |
1904 | case ICPT_SOFT_INTERCEPT: |
1905 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
1906 | exit(1); | |
1907 | break; | |
0e60a699 AG |
1908 | case ICPT_IO: |
1909 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
1910 | exit(1); | |
1911 | break; | |
1912 | default: | |
1913 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
1914 | exit(1); | |
1915 | break; | |
1916 | } | |
1917 | ||
1918 | return r; | |
1919 | } | |
1920 | ||
09b99878 CH |
1921 | static int handle_tsch(S390CPU *cpu) |
1922 | { | |
09b99878 CH |
1923 | CPUState *cs = CPU(cpu); |
1924 | struct kvm_run *run = cs->kvm_run; | |
1925 | int ret; | |
1926 | ||
44c68de0 | 1927 | cpu_synchronize_state(cs); |
3474b679 | 1928 | |
653b0809 TH |
1929 | ret = ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb); |
1930 | if (ret < 0) { | |
09b99878 CH |
1931 | /* |
1932 | * Failure. | |
1933 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
1934 | */ | |
1935 | if (run->s390_tsch.dequeued) { | |
de13d216 CH |
1936 | kvm_s390_io_interrupt(run->s390_tsch.subchannel_id, |
1937 | run->s390_tsch.subchannel_nr, | |
1938 | run->s390_tsch.io_int_parm, | |
1939 | run->s390_tsch.io_int_word); | |
09b99878 CH |
1940 | } |
1941 | ret = 0; | |
1942 | } | |
1943 | return ret; | |
1944 | } | |
1945 | ||
6cb1e49d | 1946 | static void insert_stsi_3_2_2(S390CPU *cpu, __u64 addr, uint8_t ar) |
f07177a5 ET |
1947 | { |
1948 | struct sysib_322 sysib; | |
1949 | int del; | |
1950 | ||
6cb1e49d | 1951 | if (s390_cpu_virt_mem_read(cpu, addr, ar, &sysib, sizeof(sysib))) { |
f07177a5 ET |
1952 | return; |
1953 | } | |
1954 | /* Shift the stack of Extended Names to prepare for our own data */ | |
1955 | memmove(&sysib.ext_names[1], &sysib.ext_names[0], | |
1956 | sizeof(sysib.ext_names[0]) * (sysib.count - 1)); | |
1957 | /* First virt level, that doesn't provide Ext Names delimits stack. It is | |
1958 | * assumed it's not capable of managing Extended Names for lower levels. | |
1959 | */ | |
1960 | for (del = 1; del < sysib.count; del++) { | |
1961 | if (!sysib.vm[del].ext_name_encoding || !sysib.ext_names[del][0]) { | |
1962 | break; | |
1963 | } | |
1964 | } | |
1965 | if (del < sysib.count) { | |
1966 | memset(sysib.ext_names[del], 0, | |
1967 | sizeof(sysib.ext_names[0]) * (sysib.count - del)); | |
1968 | } | |
1969 | /* Insert short machine name in EBCDIC, padded with blanks */ | |
1970 | if (qemu_name) { | |
1971 | memset(sysib.vm[0].name, 0x40, sizeof(sysib.vm[0].name)); | |
1972 | ebcdic_put(sysib.vm[0].name, qemu_name, MIN(sizeof(sysib.vm[0].name), | |
1973 | strlen(qemu_name))); | |
1974 | } | |
1975 | sysib.vm[0].ext_name_encoding = 2; /* 2 = UTF-8 */ | |
1976 | memset(sysib.ext_names[0], 0, sizeof(sysib.ext_names[0])); | |
1977 | /* If hypervisor specifies zero Extended Name in STSI322 SYSIB, it's | |
1978 | * considered by s390 as not capable of providing any Extended Name. | |
1979 | * Therefore if no name was specified on qemu invocation, we go with the | |
1980 | * same "KVMguest" default, which KVM has filled into short name field. | |
1981 | */ | |
1982 | if (qemu_name) { | |
1983 | strncpy((char *)sysib.ext_names[0], qemu_name, | |
1984 | sizeof(sysib.ext_names[0])); | |
1985 | } else { | |
1986 | strcpy((char *)sysib.ext_names[0], "KVMguest"); | |
1987 | } | |
1988 | /* Insert UUID */ | |
1989 | memcpy(sysib.vm[0].uuid, qemu_uuid, sizeof(sysib.vm[0].uuid)); | |
1990 | ||
6cb1e49d | 1991 | s390_cpu_virt_mem_write(cpu, addr, ar, &sysib, sizeof(sysib)); |
f07177a5 ET |
1992 | } |
1993 | ||
1994 | static int handle_stsi(S390CPU *cpu) | |
1995 | { | |
1996 | CPUState *cs = CPU(cpu); | |
1997 | struct kvm_run *run = cs->kvm_run; | |
1998 | ||
1999 | switch (run->s390_stsi.fc) { | |
2000 | case 3: | |
2001 | if (run->s390_stsi.sel1 != 2 || run->s390_stsi.sel2 != 2) { | |
2002 | return 0; | |
2003 | } | |
2004 | /* Only sysib 3.2.2 needs post-handling for now. */ | |
6cb1e49d | 2005 | insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); |
f07177a5 ET |
2006 | return 0; |
2007 | default: | |
2008 | return 0; | |
2009 | } | |
2010 | } | |
2011 | ||
8c012449 DH |
2012 | static int kvm_arch_handle_debug_exit(S390CPU *cpu) |
2013 | { | |
770a6379 DH |
2014 | CPUState *cs = CPU(cpu); |
2015 | struct kvm_run *run = cs->kvm_run; | |
2016 | ||
2017 | int ret = 0; | |
2018 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; | |
2019 | ||
2020 | switch (arch_info->type) { | |
2021 | case KVM_HW_WP_WRITE: | |
2022 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
2023 | cs->watchpoint_hit = &hw_watchpoint; | |
2024 | hw_watchpoint.vaddr = arch_info->addr; | |
2025 | hw_watchpoint.flags = BP_MEM_WRITE; | |
2026 | ret = EXCP_DEBUG; | |
2027 | } | |
2028 | break; | |
2029 | case KVM_HW_BP: | |
2030 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
2031 | ret = EXCP_DEBUG; | |
2032 | } | |
2033 | break; | |
2034 | case KVM_SINGLESTEP: | |
2035 | if (cs->singlestep_enabled) { | |
2036 | ret = EXCP_DEBUG; | |
2037 | } | |
2038 | break; | |
2039 | default: | |
2040 | ret = -ENOSYS; | |
2041 | } | |
2042 | ||
2043 | return ret; | |
8c012449 DH |
2044 | } |
2045 | ||
20d695a9 | 2046 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 2047 | { |
20d695a9 | 2048 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
2049 | int ret = 0; |
2050 | ||
4b8523ee JK |
2051 | qemu_mutex_lock_iothread(); |
2052 | ||
0e60a699 AG |
2053 | switch (run->exit_reason) { |
2054 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 2055 | ret = handle_intercept(cpu); |
0e60a699 AG |
2056 | break; |
2057 | case KVM_EXIT_S390_RESET: | |
e91e972c | 2058 | s390_reipl_request(); |
0e60a699 | 2059 | break; |
09b99878 CH |
2060 | case KVM_EXIT_S390_TSCH: |
2061 | ret = handle_tsch(cpu); | |
2062 | break; | |
f07177a5 ET |
2063 | case KVM_EXIT_S390_STSI: |
2064 | ret = handle_stsi(cpu); | |
2065 | break; | |
8c012449 DH |
2066 | case KVM_EXIT_DEBUG: |
2067 | ret = kvm_arch_handle_debug_exit(cpu); | |
2068 | break; | |
0e60a699 AG |
2069 | default: |
2070 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
2071 | break; | |
2072 | } | |
4b8523ee | 2073 | qemu_mutex_unlock_iothread(); |
0e60a699 | 2074 | |
bb4ea393 JK |
2075 | if (ret == 0) { |
2076 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 2077 | } |
0e60a699 AG |
2078 | return ret; |
2079 | } | |
4513d923 | 2080 | |
20d695a9 | 2081 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
2082 | { |
2083 | return true; | |
2084 | } | |
a1b87fe0 | 2085 | |
20d695a9 | 2086 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr) |
a1b87fe0 JK |
2087 | { |
2088 | return 1; | |
2089 | } | |
2090 | ||
2091 | int kvm_arch_on_sigbus(int code, void *addr) | |
2092 | { | |
2093 | return 1; | |
2094 | } | |
09b99878 | 2095 | |
de13d216 | 2096 | void kvm_s390_io_interrupt(uint16_t subchannel_id, |
09b99878 CH |
2097 | uint16_t subchannel_nr, uint32_t io_int_parm, |
2098 | uint32_t io_int_word) | |
2099 | { | |
de13d216 CH |
2100 | struct kvm_s390_irq irq = { |
2101 | .u.io.subchannel_id = subchannel_id, | |
2102 | .u.io.subchannel_nr = subchannel_nr, | |
2103 | .u.io.io_int_parm = io_int_parm, | |
2104 | .u.io.io_int_word = io_int_word, | |
2105 | }; | |
09b99878 | 2106 | |
7e749462 | 2107 | if (io_int_word & IO_INT_WORD_AI) { |
de13d216 | 2108 | irq.type = KVM_S390_INT_IO(1, 0, 0, 0); |
7e749462 | 2109 | } else { |
393ad2a4 CB |
2110 | irq.type = KVM_S390_INT_IO(0, (subchannel_id & 0xff00) >> 8, |
2111 | (subchannel_id & 0x0006), | |
2112 | subchannel_nr); | |
7e749462 | 2113 | } |
de13d216 | 2114 | kvm_s390_floating_interrupt(&irq); |
09b99878 CH |
2115 | } |
2116 | ||
b080364a CH |
2117 | static uint64_t build_channel_report_mcic(void) |
2118 | { | |
2119 | uint64_t mcic; | |
2120 | ||
2121 | /* subclass: indicate channel report pending */ | |
2122 | mcic = MCIC_SC_CP | | |
2123 | /* subclass modifiers: none */ | |
2124 | /* storage errors: none */ | |
2125 | /* validity bits: no damage */ | |
2126 | MCIC_VB_WP | MCIC_VB_MS | MCIC_VB_PM | MCIC_VB_IA | MCIC_VB_FP | | |
2127 | MCIC_VB_GR | MCIC_VB_CR | MCIC_VB_ST | MCIC_VB_AR | MCIC_VB_PR | | |
2128 | MCIC_VB_FC | MCIC_VB_CT | MCIC_VB_CC; | |
7c72ac49 | 2129 | if (s390_has_feat(S390_FEAT_VECTOR)) { |
b080364a CH |
2130 | mcic |= MCIC_VB_VR; |
2131 | } | |
2132 | return mcic; | |
2133 | } | |
2134 | ||
de13d216 | 2135 | void kvm_s390_crw_mchk(void) |
09b99878 | 2136 | { |
de13d216 CH |
2137 | struct kvm_s390_irq irq = { |
2138 | .type = KVM_S390_MCHK, | |
2139 | .u.mchk.cr14 = 1 << 28, | |
b080364a | 2140 | .u.mchk.mcic = build_channel_report_mcic(), |
de13d216 CH |
2141 | }; |
2142 | kvm_s390_floating_interrupt(&irq); | |
09b99878 CH |
2143 | } |
2144 | ||
2145 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
2146 | { | |
09b99878 CH |
2147 | int r; |
2148 | ||
2149 | /* Activate host kernel channel subsystem support. */ | |
e080f0fd | 2150 | r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0); |
09b99878 CH |
2151 | assert(r == 0); |
2152 | } | |
48475e14 AK |
2153 | |
2154 | void kvm_arch_init_irq_routing(KVMState *s) | |
2155 | { | |
d426d9fb CH |
2156 | /* |
2157 | * Note that while irqchip capabilities generally imply that cpustates | |
2158 | * are handled in-kernel, it is not true for s390 (yet); therefore, we | |
2159 | * have to override the common code kvm_halt_in_kernel_allowed setting. | |
2160 | */ | |
2161 | if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { | |
d426d9fb CH |
2162 | kvm_gsi_routing_allowed = true; |
2163 | kvm_halt_in_kernel_allowed = false; | |
2164 | } | |
48475e14 | 2165 | } |
b4436a0b | 2166 | |
cc3ac9c4 CH |
2167 | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch, |
2168 | int vq, bool assign) | |
b4436a0b CH |
2169 | { |
2170 | struct kvm_ioeventfd kick = { | |
2171 | .flags = KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY | | |
2172 | KVM_IOEVENTFD_FLAG_DATAMATCH, | |
cc3ac9c4 | 2173 | .fd = event_notifier_get_fd(notifier), |
b4436a0b CH |
2174 | .datamatch = vq, |
2175 | .addr = sch, | |
2176 | .len = 8, | |
2177 | }; | |
2178 | if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) { | |
2179 | return -ENOSYS; | |
2180 | } | |
2181 | if (!assign) { | |
2182 | kick.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN; | |
2183 | } | |
2184 | return kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &kick); | |
2185 | } | |
1def6656 MR |
2186 | |
2187 | int kvm_s390_get_memslot_count(KVMState *s) | |
2188 | { | |
2189 | return kvm_check_extension(s, KVM_CAP_NR_MEMSLOTS); | |
2190 | } | |
c9e659c9 | 2191 | |
9700230b FZ |
2192 | int kvm_s390_get_ri(void) |
2193 | { | |
2194 | return cap_ri; | |
2195 | } | |
2196 | ||
c9e659c9 DH |
2197 | int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state) |
2198 | { | |
2199 | struct kvm_mp_state mp_state = {}; | |
2200 | int ret; | |
2201 | ||
2202 | /* the kvm part might not have been initialized yet */ | |
2203 | if (CPU(cpu)->kvm_state == NULL) { | |
2204 | return 0; | |
2205 | } | |
2206 | ||
2207 | switch (cpu_state) { | |
2208 | case CPU_STATE_STOPPED: | |
2209 | mp_state.mp_state = KVM_MP_STATE_STOPPED; | |
2210 | break; | |
2211 | case CPU_STATE_CHECK_STOP: | |
2212 | mp_state.mp_state = KVM_MP_STATE_CHECK_STOP; | |
2213 | break; | |
2214 | case CPU_STATE_OPERATING: | |
2215 | mp_state.mp_state = KVM_MP_STATE_OPERATING; | |
2216 | break; | |
2217 | case CPU_STATE_LOAD: | |
2218 | mp_state.mp_state = KVM_MP_STATE_LOAD; | |
2219 | break; | |
2220 | default: | |
2221 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
2222 | cpu_state); | |
2223 | exit(1); | |
2224 | } | |
2225 | ||
2226 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); | |
2227 | if (ret) { | |
2228 | trace_kvm_failed_cpu_state_set(CPU(cpu)->cpu_index, cpu_state, | |
2229 | strerror(-ret)); | |
2230 | } | |
2231 | ||
2232 | return ret; | |
2233 | } | |
9e03a040 | 2234 | |
3cda44f7 JF |
2235 | void kvm_s390_vcpu_interrupt_pre_save(S390CPU *cpu) |
2236 | { | |
2237 | struct kvm_s390_irq_state irq_state; | |
2238 | CPUState *cs = CPU(cpu); | |
2239 | int32_t bytes; | |
2240 | ||
2241 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { | |
2242 | return; | |
2243 | } | |
2244 | ||
2245 | irq_state.buf = (uint64_t) cpu->irqstate; | |
2246 | irq_state.len = VCPU_IRQ_BUF_SIZE; | |
2247 | ||
2248 | bytes = kvm_vcpu_ioctl(cs, KVM_S390_GET_IRQ_STATE, &irq_state); | |
2249 | if (bytes < 0) { | |
2250 | cpu->irqstate_saved_size = 0; | |
2251 | error_report("Migration of interrupt state failed"); | |
2252 | return; | |
2253 | } | |
2254 | ||
2255 | cpu->irqstate_saved_size = bytes; | |
2256 | } | |
2257 | ||
2258 | int kvm_s390_vcpu_interrupt_post_load(S390CPU *cpu) | |
2259 | { | |
2260 | CPUState *cs = CPU(cpu); | |
2261 | struct kvm_s390_irq_state irq_state; | |
2262 | int r; | |
2263 | ||
b853d4cb SS |
2264 | if (cpu->irqstate_saved_size == 0) { |
2265 | return 0; | |
2266 | } | |
2267 | ||
3cda44f7 JF |
2268 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { |
2269 | return -ENOSYS; | |
2270 | } | |
2271 | ||
3cda44f7 JF |
2272 | irq_state.buf = (uint64_t) cpu->irqstate; |
2273 | irq_state.len = cpu->irqstate_saved_size; | |
2274 | ||
2275 | r = kvm_vcpu_ioctl(cs, KVM_S390_SET_IRQ_STATE, &irq_state); | |
2276 | if (r) { | |
2277 | error_report("Setting interrupt state failed %d", r); | |
2278 | } | |
2279 | return r; | |
2280 | } | |
2281 | ||
9e03a040 | 2282 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
dc9f06ca | 2283 | uint64_t address, uint32_t data, PCIDevice *dev) |
9e03a040 FB |
2284 | { |
2285 | S390PCIBusDevice *pbdev; | |
cdd85eb2 | 2286 | uint32_t idx = data >> ZPCI_MSI_VEC_BITS; |
9e03a040 FB |
2287 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; |
2288 | ||
cdd85eb2 | 2289 | pbdev = s390_pci_find_dev_by_idx(idx); |
9e03a040 FB |
2290 | if (!pbdev) { |
2291 | DPRINTF("add_msi_route no dev\n"); | |
2292 | return -ENODEV; | |
2293 | } | |
2294 | ||
2295 | pbdev->routes.adapter.ind_offset = vec; | |
2296 | ||
2297 | route->type = KVM_IRQ_ROUTING_S390_ADAPTER; | |
2298 | route->flags = 0; | |
2299 | route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr; | |
2300 | route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr; | |
2301 | route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset; | |
2302 | route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset; | |
2303 | route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id; | |
2304 | return 0; | |
2305 | } | |
1850b6b7 | 2306 | |
38d87493 PX |
2307 | int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, |
2308 | int vector, PCIDevice *dev) | |
2309 | { | |
2310 | return 0; | |
2311 | } | |
2312 | ||
2313 | int kvm_arch_release_virq_post(int virq) | |
2314 | { | |
2315 | return 0; | |
2316 | } | |
2317 | ||
1850b6b7 EA |
2318 | int kvm_arch_msi_data_to_gsi(uint32_t data) |
2319 | { | |
2320 | abort(); | |
2321 | } | |
3b84c25c DH |
2322 | |
2323 | static inline int test_bit_inv(long nr, const unsigned long *addr) | |
2324 | { | |
2325 | return test_bit(BE_BIT_NR(nr), addr); | |
2326 | } | |
2327 | ||
2328 | static inline void set_bit_inv(long nr, unsigned long *addr) | |
2329 | { | |
2330 | set_bit(BE_BIT_NR(nr), addr); | |
2331 | } | |
2332 | ||
2333 | static int query_cpu_subfunc(S390FeatBitmap features) | |
2334 | { | |
2335 | struct kvm_s390_vm_cpu_subfunc prop; | |
2336 | struct kvm_device_attr attr = { | |
2337 | .group = KVM_S390_VM_CPU_MODEL, | |
2338 | .attr = KVM_S390_VM_CPU_MACHINE_SUBFUNC, | |
2339 | .addr = (uint64_t) &prop, | |
2340 | }; | |
2341 | int rc; | |
2342 | ||
2343 | rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
2344 | if (rc) { | |
2345 | return rc; | |
2346 | } | |
2347 | ||
2348 | /* | |
2349 | * We're going to add all subfunctions now, if the corresponding feature | |
2350 | * is available that unlocks the query functions. | |
2351 | */ | |
2352 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PLO, prop.plo); | |
2353 | if (test_bit(S390_FEAT_TOD_CLOCK_STEERING, features)) { | |
2354 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PTFF, prop.ptff); | |
2355 | } | |
2356 | if (test_bit(S390_FEAT_MSA, features)) { | |
2357 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMAC, prop.kmac); | |
2358 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMC, prop.kmc); | |
2359 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KM, prop.km); | |
2360 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KIMD, prop.kimd); | |
2361 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KLMD, prop.klmd); | |
2362 | } | |
2363 | if (test_bit(S390_FEAT_MSA_EXT_3, features)) { | |
2364 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PCKMO, prop.pckmo); | |
2365 | } | |
2366 | if (test_bit(S390_FEAT_MSA_EXT_4, features)) { | |
2367 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMCTR, prop.kmctr); | |
2368 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMF, prop.kmf); | |
2369 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMO, prop.kmo); | |
2370 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PCC, prop.pcc); | |
2371 | } | |
2372 | if (test_bit(S390_FEAT_MSA_EXT_5, features)) { | |
2373 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PPNO, prop.ppno); | |
2374 | } | |
2375 | return 0; | |
2376 | } | |
2377 | ||
2378 | static int configure_cpu_subfunc(const S390FeatBitmap features) | |
2379 | { | |
2380 | struct kvm_s390_vm_cpu_subfunc prop = {}; | |
2381 | struct kvm_device_attr attr = { | |
2382 | .group = KVM_S390_VM_CPU_MODEL, | |
2383 | .attr = KVM_S390_VM_CPU_PROCESSOR_SUBFUNC, | |
2384 | .addr = (uint64_t) &prop, | |
2385 | }; | |
2386 | ||
2387 | if (!kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2388 | KVM_S390_VM_CPU_PROCESSOR_SUBFUNC)) { | |
2389 | /* hardware support might be missing, IBC will handle most of this */ | |
2390 | return 0; | |
2391 | } | |
2392 | ||
2393 | s390_fill_feat_block(features, S390_FEAT_TYPE_PLO, prop.plo); | |
2394 | if (test_bit(S390_FEAT_TOD_CLOCK_STEERING, features)) { | |
2395 | s390_fill_feat_block(features, S390_FEAT_TYPE_PTFF, prop.ptff); | |
2396 | prop.ptff[0] |= 0x80; /* query is always available */ | |
2397 | } | |
2398 | if (test_bit(S390_FEAT_MSA, features)) { | |
2399 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMAC, prop.kmac); | |
2400 | prop.kmac[0] |= 0x80; /* query is always available */ | |
2401 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMC, prop.kmc); | |
2402 | prop.kmc[0] |= 0x80; /* query is always available */ | |
2403 | s390_fill_feat_block(features, S390_FEAT_TYPE_KM, prop.km); | |
2404 | prop.km[0] |= 0x80; /* query is always available */ | |
2405 | s390_fill_feat_block(features, S390_FEAT_TYPE_KIMD, prop.kimd); | |
2406 | prop.kimd[0] |= 0x80; /* query is always available */ | |
2407 | s390_fill_feat_block(features, S390_FEAT_TYPE_KLMD, prop.klmd); | |
2408 | prop.klmd[0] |= 0x80; /* query is always available */ | |
2409 | } | |
2410 | if (test_bit(S390_FEAT_MSA_EXT_3, features)) { | |
2411 | s390_fill_feat_block(features, S390_FEAT_TYPE_PCKMO, prop.pckmo); | |
2412 | prop.pckmo[0] |= 0x80; /* query is always available */ | |
2413 | } | |
2414 | if (test_bit(S390_FEAT_MSA_EXT_4, features)) { | |
2415 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMCTR, prop.kmctr); | |
2416 | prop.kmctr[0] |= 0x80; /* query is always available */ | |
2417 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMF, prop.kmf); | |
2418 | prop.kmf[0] |= 0x80; /* query is always available */ | |
2419 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMO, prop.kmo); | |
2420 | prop.kmo[0] |= 0x80; /* query is always available */ | |
2421 | s390_fill_feat_block(features, S390_FEAT_TYPE_PCC, prop.pcc); | |
2422 | prop.pcc[0] |= 0x80; /* query is always available */ | |
2423 | } | |
2424 | if (test_bit(S390_FEAT_MSA_EXT_5, features)) { | |
2425 | s390_fill_feat_block(features, S390_FEAT_TYPE_PPNO, prop.ppno); | |
2426 | prop.ppno[0] |= 0x80; /* query is always available */ | |
2427 | } | |
2428 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
2429 | } | |
2430 | ||
2431 | static int kvm_to_feat[][2] = { | |
2432 | { KVM_S390_VM_CPU_FEAT_ESOP, S390_FEAT_ESOP }, | |
2433 | { KVM_S390_VM_CPU_FEAT_SIEF2, S390_FEAT_SIE_F2 }, | |
2434 | { KVM_S390_VM_CPU_FEAT_64BSCAO , S390_FEAT_SIE_64BSCAO }, | |
2435 | { KVM_S390_VM_CPU_FEAT_SIIF, S390_FEAT_SIE_SIIF }, | |
2436 | { KVM_S390_VM_CPU_FEAT_GPERE, S390_FEAT_SIE_GPERE }, | |
2437 | { KVM_S390_VM_CPU_FEAT_GSLS, S390_FEAT_SIE_GSLS }, | |
2438 | { KVM_S390_VM_CPU_FEAT_IB, S390_FEAT_SIE_IB }, | |
2439 | { KVM_S390_VM_CPU_FEAT_CEI, S390_FEAT_SIE_CEI }, | |
2440 | { KVM_S390_VM_CPU_FEAT_IBS, S390_FEAT_SIE_IBS }, | |
2441 | { KVM_S390_VM_CPU_FEAT_SKEY, S390_FEAT_SIE_SKEY }, | |
2442 | { KVM_S390_VM_CPU_FEAT_CMMA, S390_FEAT_SIE_CMMA }, | |
2443 | { KVM_S390_VM_CPU_FEAT_PFMFI, S390_FEAT_SIE_PFMFI}, | |
2444 | { KVM_S390_VM_CPU_FEAT_SIGPIF, S390_FEAT_SIE_SIGPIF}, | |
2445 | }; | |
2446 | ||
2447 | static int query_cpu_feat(S390FeatBitmap features) | |
2448 | { | |
2449 | struct kvm_s390_vm_cpu_feat prop; | |
2450 | struct kvm_device_attr attr = { | |
2451 | .group = KVM_S390_VM_CPU_MODEL, | |
2452 | .attr = KVM_S390_VM_CPU_MACHINE_FEAT, | |
2453 | .addr = (uint64_t) &prop, | |
2454 | }; | |
2455 | int rc; | |
2456 | int i; | |
2457 | ||
2458 | rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
2459 | if (rc) { | |
2460 | return rc; | |
2461 | } | |
2462 | ||
2463 | for (i = 0; i < ARRAY_SIZE(kvm_to_feat); i++) { | |
2464 | if (test_bit_inv(kvm_to_feat[i][0], (unsigned long *)prop.feat)) { | |
2465 | set_bit(kvm_to_feat[i][1], features); | |
2466 | } | |
2467 | } | |
2468 | return 0; | |
2469 | } | |
2470 | ||
2471 | static int configure_cpu_feat(const S390FeatBitmap features) | |
2472 | { | |
2473 | struct kvm_s390_vm_cpu_feat prop = {}; | |
2474 | struct kvm_device_attr attr = { | |
2475 | .group = KVM_S390_VM_CPU_MODEL, | |
2476 | .attr = KVM_S390_VM_CPU_PROCESSOR_FEAT, | |
2477 | .addr = (uint64_t) &prop, | |
2478 | }; | |
2479 | int i; | |
2480 | ||
2481 | for (i = 0; i < ARRAY_SIZE(kvm_to_feat); i++) { | |
2482 | if (test_bit(kvm_to_feat[i][1], features)) { | |
2483 | set_bit_inv(kvm_to_feat[i][0], (unsigned long *)prop.feat); | |
2484 | } | |
2485 | } | |
2486 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
2487 | } | |
2488 | ||
2489 | bool kvm_s390_cpu_models_supported(void) | |
2490 | { | |
34821036 DH |
2491 | if (!ri_allowed()) { |
2492 | /* compatibility machines interfere with the cpu model */ | |
2493 | return false; | |
2494 | } | |
3b84c25c DH |
2495 | return kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, |
2496 | KVM_S390_VM_CPU_MACHINE) && | |
2497 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2498 | KVM_S390_VM_CPU_PROCESSOR) && | |
2499 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2500 | KVM_S390_VM_CPU_MACHINE_FEAT) && | |
2501 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2502 | KVM_S390_VM_CPU_PROCESSOR_FEAT) && | |
2503 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2504 | KVM_S390_VM_CPU_MACHINE_SUBFUNC); | |
2505 | } | |
2506 | ||
2507 | void kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp) | |
2508 | { | |
2509 | struct kvm_s390_vm_cpu_machine prop = {}; | |
2510 | struct kvm_device_attr attr = { | |
2511 | .group = KVM_S390_VM_CPU_MODEL, | |
2512 | .attr = KVM_S390_VM_CPU_MACHINE, | |
2513 | .addr = (uint64_t) &prop, | |
2514 | }; | |
2515 | uint16_t unblocked_ibc = 0, cpu_type = 0; | |
2516 | int rc; | |
2517 | ||
2518 | memset(model, 0, sizeof(*model)); | |
2519 | ||
2520 | if (!kvm_s390_cpu_models_supported()) { | |
2521 | error_setg(errp, "KVM doesn't support CPU models"); | |
2522 | return; | |
2523 | } | |
2524 | ||
2525 | /* query the basic cpu model properties */ | |
2526 | rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
2527 | if (rc) { | |
2528 | error_setg(errp, "KVM: Error querying host CPU model: %d", rc); | |
2529 | return; | |
2530 | } | |
2531 | ||
2532 | cpu_type = cpuid_type(prop.cpuid); | |
2533 | if (has_ibc(prop.ibc)) { | |
2534 | model->lowest_ibc = lowest_ibc(prop.ibc); | |
2535 | unblocked_ibc = unblocked_ibc(prop.ibc); | |
2536 | } | |
2537 | model->cpu_id = cpuid_id(prop.cpuid); | |
2538 | model->cpu_ver = 0xff; | |
2539 | ||
2540 | /* get supported cpu features indicated via STFL(E) */ | |
2541 | s390_add_from_feat_block(model->features, S390_FEAT_TYPE_STFL, | |
2542 | (uint8_t *) prop.fac_mask); | |
2543 | /* dat-enhancement facility 2 has no bit but was introduced with stfle */ | |
2544 | if (test_bit(S390_FEAT_STFLE, model->features)) { | |
2545 | set_bit(S390_FEAT_DAT_ENH_2, model->features); | |
2546 | } | |
2547 | /* get supported cpu features indicated e.g. via SCLP */ | |
2548 | rc = query_cpu_feat(model->features); | |
2549 | if (rc) { | |
2550 | error_setg(errp, "KVM: Error querying CPU features: %d", rc); | |
2551 | return; | |
2552 | } | |
2553 | /* get supported cpu subfunctions indicated via query / test bit */ | |
2554 | rc = query_cpu_subfunc(model->features); | |
2555 | if (rc) { | |
2556 | error_setg(errp, "KVM: Error querying CPU subfunctions: %d", rc); | |
2557 | return; | |
2558 | } | |
2559 | ||
07059eff DH |
2560 | /* with cpu model support, CMM is only indicated if really available */ |
2561 | if (kvm_s390_cmma_available()) { | |
2562 | set_bit(S390_FEAT_CMM, model->features); | |
2563 | } | |
2564 | ||
3b84c25c DH |
2565 | if (s390_known_cpu_type(cpu_type)) { |
2566 | /* we want the exact model, even if some features are missing */ | |
2567 | model->def = s390_find_cpu_def(cpu_type, ibc_gen(unblocked_ibc), | |
2568 | ibc_ec_ga(unblocked_ibc), NULL); | |
2569 | } else { | |
2570 | /* model unknown, e.g. too new - search using features */ | |
2571 | model->def = s390_find_cpu_def(0, ibc_gen(unblocked_ibc), | |
2572 | ibc_ec_ga(unblocked_ibc), | |
2573 | model->features); | |
2574 | } | |
2575 | if (!model->def) { | |
2576 | error_setg(errp, "KVM: host CPU model could not be identified"); | |
2577 | return; | |
2578 | } | |
2579 | /* strip of features that are not part of the maximum model */ | |
2580 | bitmap_and(model->features, model->features, model->def->full_feat, | |
2581 | S390_FEAT_MAX); | |
2582 | } | |
2583 | ||
2584 | void kvm_s390_apply_cpu_model(const S390CPUModel *model, Error **errp) | |
2585 | { | |
2586 | struct kvm_s390_vm_cpu_processor prop = { | |
2587 | .fac_list = { 0 }, | |
2588 | }; | |
2589 | struct kvm_device_attr attr = { | |
2590 | .group = KVM_S390_VM_CPU_MODEL, | |
2591 | .attr = KVM_S390_VM_CPU_PROCESSOR, | |
2592 | .addr = (uint64_t) &prop, | |
2593 | }; | |
2594 | int rc; | |
2595 | ||
2596 | if (!model) { | |
07059eff DH |
2597 | /* compatibility handling if cpu models are disabled */ |
2598 | if (kvm_s390_cmma_available() && !mem_path) { | |
2599 | kvm_s390_enable_cmma(); | |
2600 | } | |
3b84c25c DH |
2601 | return; |
2602 | } | |
2603 | if (!kvm_s390_cpu_models_supported()) { | |
2604 | error_setg(errp, "KVM doesn't support CPU models"); | |
2605 | return; | |
2606 | } | |
2607 | prop.cpuid = s390_cpuid_from_cpu_model(model); | |
2608 | prop.ibc = s390_ibc_from_cpu_model(model); | |
2609 | /* configure cpu features indicated via STFL(e) */ | |
2610 | s390_fill_feat_block(model->features, S390_FEAT_TYPE_STFL, | |
2611 | (uint8_t *) prop.fac_list); | |
2612 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
2613 | if (rc) { | |
2614 | error_setg(errp, "KVM: Error configuring the CPU model: %d", rc); | |
2615 | return; | |
2616 | } | |
2617 | /* configure cpu features indicated e.g. via SCLP */ | |
2618 | rc = configure_cpu_feat(model->features); | |
2619 | if (rc) { | |
2620 | error_setg(errp, "KVM: Error configuring CPU features: %d", rc); | |
2621 | return; | |
2622 | } | |
2623 | /* configure cpu subfunctions indicated via query / test bit */ | |
2624 | rc = configure_cpu_subfunc(model->features); | |
2625 | if (rc) { | |
2626 | error_setg(errp, "KVM: Error configuring CPU subfunctions: %d", rc); | |
2627 | return; | |
2628 | } | |
07059eff DH |
2629 | /* enable CMM via CMMA - disable on hugetlbfs */ |
2630 | if (test_bit(S390_FEAT_CMM, model->features)) { | |
2631 | if (mem_path) { | |
2632 | error_report("Warning: CMM will not be enabled because it is not " | |
2633 | "compatible to hugetlbfs."); | |
2634 | } else { | |
2635 | kvm_s390_enable_cmma(); | |
2636 | } | |
2637 | } | |
3b84c25c | 2638 | } |