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Commit | Line | Data |
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b4608c04 FB |
1 | /* |
2 | * gdb server stub | |
5fafdf24 | 3 | * |
3475187d | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
b4608c04 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
978efd6a | 20 | #include "config.h" |
1fddef4b FB |
21 | #ifdef CONFIG_USER_ONLY |
22 | #include <stdlib.h> | |
23 | #include <stdio.h> | |
24 | #include <stdarg.h> | |
25 | #include <string.h> | |
26 | #include <errno.h> | |
27 | #include <unistd.h> | |
978efd6a | 28 | #include <fcntl.h> |
1fddef4b FB |
29 | |
30 | #include "qemu.h" | |
31 | #else | |
87ecb68b PB |
32 | #include "qemu-common.h" |
33 | #include "qemu-char.h" | |
34 | #include "sysemu.h" | |
35 | #include "gdbstub.h" | |
1fddef4b | 36 | #endif |
67b915a5 | 37 | |
8f447cc7 FB |
38 | #include "qemu_socket.h" |
39 | #ifdef _WIN32 | |
40 | /* XXX: these constants may be independent of the host ones even for Unix */ | |
41 | #ifndef SIGTRAP | |
42 | #define SIGTRAP 5 | |
43 | #endif | |
44 | #ifndef SIGINT | |
45 | #define SIGINT 2 | |
46 | #endif | |
47 | #else | |
b4608c04 | 48 | #include <signal.h> |
8f447cc7 | 49 | #endif |
b4608c04 | 50 | |
4abe615b | 51 | //#define DEBUG_GDB |
b4608c04 | 52 | |
858693c6 FB |
53 | enum RSState { |
54 | RS_IDLE, | |
55 | RS_GETLINE, | |
56 | RS_CHKSUM1, | |
57 | RS_CHKSUM2, | |
a2d1ebaf | 58 | RS_SYSCALL, |
858693c6 | 59 | }; |
858693c6 | 60 | typedef struct GDBState { |
6a00d601 | 61 | CPUState *env; /* current CPU */ |
41625033 | 62 | enum RSState state; /* parsing state */ |
858693c6 FB |
63 | char line_buf[4096]; |
64 | int line_buf_index; | |
65 | int line_csum; | |
60fe76f3 | 66 | uint8_t last_packet[4100]; |
4046d913 | 67 | int last_packet_len; |
41625033 | 68 | #ifdef CONFIG_USER_ONLY |
4046d913 | 69 | int fd; |
41625033 | 70 | int running_state; |
4046d913 PB |
71 | #else |
72 | CharDriverState *chr; | |
41625033 | 73 | #endif |
858693c6 | 74 | } GDBState; |
b4608c04 | 75 | |
1fddef4b | 76 | #ifdef CONFIG_USER_ONLY |
4046d913 PB |
77 | /* XXX: This is not thread safe. Do we care? */ |
78 | static int gdbserver_fd = -1; | |
79 | ||
1fddef4b FB |
80 | /* XXX: remove this hack. */ |
81 | static GDBState gdbserver_state; | |
1fddef4b | 82 | |
858693c6 | 83 | static int get_char(GDBState *s) |
b4608c04 FB |
84 | { |
85 | uint8_t ch; | |
86 | int ret; | |
87 | ||
88 | for(;;) { | |
8f447cc7 | 89 | ret = recv(s->fd, &ch, 1, 0); |
b4608c04 FB |
90 | if (ret < 0) { |
91 | if (errno != EINTR && errno != EAGAIN) | |
92 | return -1; | |
93 | } else if (ret == 0) { | |
94 | return -1; | |
95 | } else { | |
96 | break; | |
97 | } | |
98 | } | |
99 | return ch; | |
100 | } | |
4046d913 | 101 | #endif |
b4608c04 | 102 | |
a2d1ebaf PB |
103 | /* GDB stub state for use by semihosting syscalls. */ |
104 | static GDBState *gdb_syscall_state; | |
105 | static gdb_syscall_complete_cb gdb_current_syscall_cb; | |
106 | ||
107 | enum { | |
108 | GDB_SYS_UNKNOWN, | |
109 | GDB_SYS_ENABLED, | |
110 | GDB_SYS_DISABLED, | |
111 | } gdb_syscall_mode; | |
112 | ||
113 | /* If gdb is connected when the first semihosting syscall occurs then use | |
114 | remote gdb syscalls. Otherwise use native file IO. */ | |
115 | int use_gdb_syscalls(void) | |
116 | { | |
117 | if (gdb_syscall_mode == GDB_SYS_UNKNOWN) { | |
118 | gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED | |
119 | : GDB_SYS_DISABLED); | |
120 | } | |
121 | return gdb_syscall_mode == GDB_SYS_ENABLED; | |
122 | } | |
123 | ||
ba70a624 EI |
124 | /* Resume execution. */ |
125 | static inline void gdb_continue(GDBState *s) | |
126 | { | |
127 | #ifdef CONFIG_USER_ONLY | |
128 | s->running_state = 1; | |
129 | #else | |
130 | vm_start(); | |
131 | #endif | |
132 | } | |
133 | ||
858693c6 | 134 | static void put_buffer(GDBState *s, const uint8_t *buf, int len) |
b4608c04 | 135 | { |
4046d913 | 136 | #ifdef CONFIG_USER_ONLY |
b4608c04 FB |
137 | int ret; |
138 | ||
139 | while (len > 0) { | |
8f447cc7 | 140 | ret = send(s->fd, buf, len, 0); |
b4608c04 FB |
141 | if (ret < 0) { |
142 | if (errno != EINTR && errno != EAGAIN) | |
143 | return; | |
144 | } else { | |
145 | buf += ret; | |
146 | len -= ret; | |
147 | } | |
148 | } | |
4046d913 PB |
149 | #else |
150 | qemu_chr_write(s->chr, buf, len); | |
151 | #endif | |
b4608c04 FB |
152 | } |
153 | ||
154 | static inline int fromhex(int v) | |
155 | { | |
156 | if (v >= '0' && v <= '9') | |
157 | return v - '0'; | |
158 | else if (v >= 'A' && v <= 'F') | |
159 | return v - 'A' + 10; | |
160 | else if (v >= 'a' && v <= 'f') | |
161 | return v - 'a' + 10; | |
162 | else | |
163 | return 0; | |
164 | } | |
165 | ||
166 | static inline int tohex(int v) | |
167 | { | |
168 | if (v < 10) | |
169 | return v + '0'; | |
170 | else | |
171 | return v - 10 + 'a'; | |
172 | } | |
173 | ||
174 | static void memtohex(char *buf, const uint8_t *mem, int len) | |
175 | { | |
176 | int i, c; | |
177 | char *q; | |
178 | q = buf; | |
179 | for(i = 0; i < len; i++) { | |
180 | c = mem[i]; | |
181 | *q++ = tohex(c >> 4); | |
182 | *q++ = tohex(c & 0xf); | |
183 | } | |
184 | *q = '\0'; | |
185 | } | |
186 | ||
187 | static void hextomem(uint8_t *mem, const char *buf, int len) | |
188 | { | |
189 | int i; | |
190 | ||
191 | for(i = 0; i < len; i++) { | |
192 | mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]); | |
193 | buf += 2; | |
194 | } | |
195 | } | |
196 | ||
b4608c04 | 197 | /* return -1 if error, 0 if OK */ |
858693c6 | 198 | static int put_packet(GDBState *s, char *buf) |
b4608c04 | 199 | { |
4046d913 | 200 | int len, csum, i; |
60fe76f3 | 201 | uint8_t *p; |
b4608c04 FB |
202 | |
203 | #ifdef DEBUG_GDB | |
204 | printf("reply='%s'\n", buf); | |
205 | #endif | |
206 | ||
207 | for(;;) { | |
4046d913 PB |
208 | p = s->last_packet; |
209 | *(p++) = '$'; | |
b4608c04 | 210 | len = strlen(buf); |
4046d913 PB |
211 | memcpy(p, buf, len); |
212 | p += len; | |
b4608c04 FB |
213 | csum = 0; |
214 | for(i = 0; i < len; i++) { | |
215 | csum += buf[i]; | |
216 | } | |
4046d913 PB |
217 | *(p++) = '#'; |
218 | *(p++) = tohex((csum >> 4) & 0xf); | |
219 | *(p++) = tohex((csum) & 0xf); | |
b4608c04 | 220 | |
4046d913 | 221 | s->last_packet_len = p - s->last_packet; |
ffe8ab83 | 222 | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
b4608c04 | 223 | |
4046d913 PB |
224 | #ifdef CONFIG_USER_ONLY |
225 | i = get_char(s); | |
226 | if (i < 0) | |
b4608c04 | 227 | return -1; |
4046d913 | 228 | if (i == '+') |
b4608c04 | 229 | break; |
4046d913 PB |
230 | #else |
231 | break; | |
232 | #endif | |
b4608c04 FB |
233 | } |
234 | return 0; | |
235 | } | |
236 | ||
6da41eaf FB |
237 | #if defined(TARGET_I386) |
238 | ||
6da41eaf FB |
239 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
240 | { | |
241 | int i, fpus; | |
5ad265ee AZ |
242 | uint32_t *registers = (uint32_t *)mem_buf; |
243 | ||
244 | #ifdef TARGET_X86_64 | |
245 | /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */ | |
246 | uint64_t *registers64 = (uint64_t *)mem_buf; | |
247 | ||
248 | if (env->hflags & HF_CS64_MASK) { | |
249 | registers64[0] = tswap64(env->regs[R_EAX]); | |
250 | registers64[1] = tswap64(env->regs[R_EBX]); | |
251 | registers64[2] = tswap64(env->regs[R_ECX]); | |
252 | registers64[3] = tswap64(env->regs[R_EDX]); | |
253 | registers64[4] = tswap64(env->regs[R_ESI]); | |
254 | registers64[5] = tswap64(env->regs[R_EDI]); | |
255 | registers64[6] = tswap64(env->regs[R_EBP]); | |
256 | registers64[7] = tswap64(env->regs[R_ESP]); | |
257 | for(i = 8; i < 16; i++) { | |
258 | registers64[i] = tswap64(env->regs[i]); | |
259 | } | |
260 | registers64[16] = tswap64(env->eip); | |
261 | ||
262 | registers = (uint32_t *)®isters64[17]; | |
263 | registers[0] = tswap32(env->eflags); | |
264 | registers[1] = tswap32(env->segs[R_CS].selector); | |
265 | registers[2] = tswap32(env->segs[R_SS].selector); | |
266 | registers[3] = tswap32(env->segs[R_DS].selector); | |
267 | registers[4] = tswap32(env->segs[R_ES].selector); | |
268 | registers[5] = tswap32(env->segs[R_FS].selector); | |
269 | registers[6] = tswap32(env->segs[R_GS].selector); | |
270 | /* XXX: convert floats */ | |
271 | for(i = 0; i < 8; i++) { | |
272 | memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10); | |
273 | } | |
274 | registers[27] = tswap32(env->fpuc); /* fctrl */ | |
275 | fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; | |
276 | registers[28] = tswap32(fpus); /* fstat */ | |
277 | registers[29] = 0; /* ftag */ | |
278 | registers[30] = 0; /* fiseg */ | |
279 | registers[31] = 0; /* fioff */ | |
280 | registers[32] = 0; /* foseg */ | |
281 | registers[33] = 0; /* fooff */ | |
282 | registers[34] = 0; /* fop */ | |
283 | for(i = 0; i < 16; i++) { | |
284 | memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16); | |
285 | } | |
286 | registers[99] = tswap32(env->mxcsr); | |
287 | ||
288 | return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4; | |
289 | } | |
290 | #endif | |
6da41eaf FB |
291 | |
292 | for(i = 0; i < 8; i++) { | |
e95c8d51 | 293 | registers[i] = env->regs[i]; |
6da41eaf | 294 | } |
e95c8d51 FB |
295 | registers[8] = env->eip; |
296 | registers[9] = env->eflags; | |
297 | registers[10] = env->segs[R_CS].selector; | |
298 | registers[11] = env->segs[R_SS].selector; | |
299 | registers[12] = env->segs[R_DS].selector; | |
300 | registers[13] = env->segs[R_ES].selector; | |
301 | registers[14] = env->segs[R_FS].selector; | |
302 | registers[15] = env->segs[R_GS].selector; | |
6da41eaf FB |
303 | /* XXX: convert floats */ |
304 | for(i = 0; i < 8; i++) { | |
305 | memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10); | |
306 | } | |
e95c8d51 | 307 | registers[36] = env->fpuc; |
6da41eaf | 308 | fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; |
e95c8d51 FB |
309 | registers[37] = fpus; |
310 | registers[38] = 0; /* XXX: convert tags */ | |
311 | registers[39] = 0; /* fiseg */ | |
312 | registers[40] = 0; /* fioff */ | |
313 | registers[41] = 0; /* foseg */ | |
314 | registers[42] = 0; /* fooff */ | |
315 | registers[43] = 0; /* fop */ | |
3b46e624 | 316 | |
e95c8d51 FB |
317 | for(i = 0; i < 16; i++) |
318 | tswapls(®isters[i]); | |
319 | for(i = 36; i < 44; i++) | |
320 | tswapls(®isters[i]); | |
6da41eaf FB |
321 | return 44 * 4; |
322 | } | |
323 | ||
324 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
325 | { | |
326 | uint32_t *registers = (uint32_t *)mem_buf; | |
327 | int i; | |
328 | ||
329 | for(i = 0; i < 8; i++) { | |
330 | env->regs[i] = tswapl(registers[i]); | |
331 | } | |
e95c8d51 FB |
332 | env->eip = tswapl(registers[8]); |
333 | env->eflags = tswapl(registers[9]); | |
6da41eaf FB |
334 | #if defined(CONFIG_USER_ONLY) |
335 | #define LOAD_SEG(index, sreg)\ | |
336 | if (tswapl(registers[index]) != env->segs[sreg].selector)\ | |
337 | cpu_x86_load_seg(env, sreg, tswapl(registers[index])); | |
338 | LOAD_SEG(10, R_CS); | |
339 | LOAD_SEG(11, R_SS); | |
340 | LOAD_SEG(12, R_DS); | |
341 | LOAD_SEG(13, R_ES); | |
342 | LOAD_SEG(14, R_FS); | |
343 | LOAD_SEG(15, R_GS); | |
344 | #endif | |
345 | } | |
346 | ||
9e62fd7f | 347 | #elif defined (TARGET_PPC) |
9e62fd7f FB |
348 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
349 | { | |
a541f297 | 350 | uint32_t *registers = (uint32_t *)mem_buf, tmp; |
9e62fd7f FB |
351 | int i; |
352 | ||
353 | /* fill in gprs */ | |
a541f297 | 354 | for(i = 0; i < 32; i++) { |
e95c8d51 | 355 | registers[i] = tswapl(env->gpr[i]); |
9e62fd7f FB |
356 | } |
357 | /* fill in fprs */ | |
358 | for (i = 0; i < 32; i++) { | |
e95c8d51 FB |
359 | registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i])); |
360 | registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1)); | |
9e62fd7f FB |
361 | } |
362 | /* nip, msr, ccr, lnk, ctr, xer, mq */ | |
e95c8d51 | 363 | registers[96] = tswapl(env->nip); |
0411a972 | 364 | registers[97] = tswapl(env->msr); |
9e62fd7f FB |
365 | tmp = 0; |
366 | for (i = 0; i < 8; i++) | |
a541f297 | 367 | tmp |= env->crf[i] << (32 - ((i + 1) * 4)); |
e95c8d51 FB |
368 | registers[98] = tswapl(tmp); |
369 | registers[99] = tswapl(env->lr); | |
370 | registers[100] = tswapl(env->ctr); | |
76a66253 | 371 | registers[101] = tswapl(ppc_load_xer(env)); |
e95c8d51 | 372 | registers[102] = 0; |
a541f297 FB |
373 | |
374 | return 103 * 4; | |
9e62fd7f FB |
375 | } |
376 | ||
377 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
378 | { | |
379 | uint32_t *registers = (uint32_t *)mem_buf; | |
380 | int i; | |
381 | ||
382 | /* fill in gprs */ | |
383 | for (i = 0; i < 32; i++) { | |
e95c8d51 | 384 | env->gpr[i] = tswapl(registers[i]); |
9e62fd7f FB |
385 | } |
386 | /* fill in fprs */ | |
387 | for (i = 0; i < 32; i++) { | |
e95c8d51 FB |
388 | *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]); |
389 | *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]); | |
9e62fd7f FB |
390 | } |
391 | /* nip, msr, ccr, lnk, ctr, xer, mq */ | |
e95c8d51 | 392 | env->nip = tswapl(registers[96]); |
0411a972 | 393 | ppc_store_msr(env, tswapl(registers[97])); |
e95c8d51 | 394 | registers[98] = tswapl(registers[98]); |
9e62fd7f | 395 | for (i = 0; i < 8; i++) |
a541f297 | 396 | env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF; |
e95c8d51 FB |
397 | env->lr = tswapl(registers[99]); |
398 | env->ctr = tswapl(registers[100]); | |
76a66253 | 399 | ppc_store_xer(env, tswapl(registers[101])); |
e95c8d51 FB |
400 | } |
401 | #elif defined (TARGET_SPARC) | |
402 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
403 | { | |
3475187d | 404 | target_ulong *registers = (target_ulong *)mem_buf; |
e95c8d51 FB |
405 | int i; |
406 | ||
407 | /* fill in g0..g7 */ | |
48b2c193 | 408 | for(i = 0; i < 8; i++) { |
e95c8d51 FB |
409 | registers[i] = tswapl(env->gregs[i]); |
410 | } | |
411 | /* fill in register window */ | |
412 | for(i = 0; i < 24; i++) { | |
413 | registers[i + 8] = tswapl(env->regwptr[i]); | |
414 | } | |
9d9754a3 | 415 | #ifndef TARGET_SPARC64 |
e95c8d51 FB |
416 | /* fill in fprs */ |
417 | for (i = 0; i < 32; i++) { | |
418 | registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i])); | |
419 | } | |
420 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ | |
421 | registers[64] = tswapl(env->y); | |
3475187d FB |
422 | { |
423 | target_ulong tmp; | |
424 | ||
425 | tmp = GET_PSR(env); | |
426 | registers[65] = tswapl(tmp); | |
427 | } | |
e95c8d51 FB |
428 | registers[66] = tswapl(env->wim); |
429 | registers[67] = tswapl(env->tbr); | |
430 | registers[68] = tswapl(env->pc); | |
431 | registers[69] = tswapl(env->npc); | |
432 | registers[70] = tswapl(env->fsr); | |
433 | registers[71] = 0; /* csr */ | |
434 | registers[72] = 0; | |
3475187d FB |
435 | return 73 * sizeof(target_ulong); |
436 | #else | |
9d9754a3 FB |
437 | /* fill in fprs */ |
438 | for (i = 0; i < 64; i += 2) { | |
439 | uint64_t tmp; | |
440 | ||
8979596d BS |
441 | tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32; |
442 | tmp |= *(uint32_t *)&env->fpr[i + 1]; | |
443 | registers[i / 2 + 32] = tswap64(tmp); | |
3475187d | 444 | } |
9d9754a3 FB |
445 | registers[64] = tswapl(env->pc); |
446 | registers[65] = tswapl(env->npc); | |
17d996e1 BS |
447 | registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) | |
448 | ((env->asi & 0xff) << 24) | | |
449 | ((env->pstate & 0xfff) << 8) | | |
450 | GET_CWP64(env)); | |
9d9754a3 FB |
451 | registers[67] = tswapl(env->fsr); |
452 | registers[68] = tswapl(env->fprs); | |
453 | registers[69] = tswapl(env->y); | |
454 | return 70 * sizeof(target_ulong); | |
3475187d | 455 | #endif |
e95c8d51 FB |
456 | } |
457 | ||
458 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
459 | { | |
3475187d | 460 | target_ulong *registers = (target_ulong *)mem_buf; |
e95c8d51 FB |
461 | int i; |
462 | ||
463 | /* fill in g0..g7 */ | |
464 | for(i = 0; i < 7; i++) { | |
465 | env->gregs[i] = tswapl(registers[i]); | |
466 | } | |
467 | /* fill in register window */ | |
468 | for(i = 0; i < 24; i++) { | |
3475187d | 469 | env->regwptr[i] = tswapl(registers[i + 8]); |
e95c8d51 | 470 | } |
9d9754a3 | 471 | #ifndef TARGET_SPARC64 |
e95c8d51 FB |
472 | /* fill in fprs */ |
473 | for (i = 0; i < 32; i++) { | |
474 | *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]); | |
475 | } | |
476 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ | |
477 | env->y = tswapl(registers[64]); | |
e80cfcfc | 478 | PUT_PSR(env, tswapl(registers[65])); |
e95c8d51 FB |
479 | env->wim = tswapl(registers[66]); |
480 | env->tbr = tswapl(registers[67]); | |
481 | env->pc = tswapl(registers[68]); | |
482 | env->npc = tswapl(registers[69]); | |
483 | env->fsr = tswapl(registers[70]); | |
3475187d | 484 | #else |
9d9754a3 | 485 | for (i = 0; i < 64; i += 2) { |
8979596d BS |
486 | uint64_t tmp; |
487 | ||
488 | tmp = tswap64(registers[i / 2 + 32]); | |
489 | *((uint32_t *)&env->fpr[i]) = tmp >> 32; | |
490 | *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff; | |
3475187d | 491 | } |
9d9754a3 FB |
492 | env->pc = tswapl(registers[64]); |
493 | env->npc = tswapl(registers[65]); | |
17d996e1 BS |
494 | { |
495 | uint64_t tmp = tswapl(registers[66]); | |
496 | ||
497 | PUT_CCR(env, tmp >> 32); | |
498 | env->asi = (tmp >> 24) & 0xff; | |
499 | env->pstate = (tmp >> 8) & 0xfff; | |
500 | PUT_CWP64(env, tmp & 0xff); | |
501 | } | |
9d9754a3 FB |
502 | env->fsr = tswapl(registers[67]); |
503 | env->fprs = tswapl(registers[68]); | |
504 | env->y = tswapl(registers[69]); | |
3475187d | 505 | #endif |
9e62fd7f | 506 | } |
1fddef4b FB |
507 | #elif defined (TARGET_ARM) |
508 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
509 | { | |
510 | int i; | |
511 | uint8_t *ptr; | |
512 | ||
513 | ptr = mem_buf; | |
514 | /* 16 core integer registers (4 bytes each). */ | |
515 | for (i = 0; i < 16; i++) | |
516 | { | |
517 | *(uint32_t *)ptr = tswapl(env->regs[i]); | |
518 | ptr += 4; | |
519 | } | |
520 | /* 8 FPA registers (12 bytes each), FPS (4 bytes). | |
521 | Not yet implemented. */ | |
522 | memset (ptr, 0, 8 * 12 + 4); | |
523 | ptr += 8 * 12 + 4; | |
524 | /* CPSR (4 bytes). */ | |
b5ff1b31 | 525 | *(uint32_t *)ptr = tswapl (cpsr_read(env)); |
1fddef4b FB |
526 | ptr += 4; |
527 | ||
528 | return ptr - mem_buf; | |
529 | } | |
6da41eaf | 530 | |
1fddef4b FB |
531 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
532 | { | |
533 | int i; | |
534 | uint8_t *ptr; | |
535 | ||
536 | ptr = mem_buf; | |
537 | /* Core integer registers. */ | |
538 | for (i = 0; i < 16; i++) | |
539 | { | |
540 | env->regs[i] = tswapl(*(uint32_t *)ptr); | |
541 | ptr += 4; | |
542 | } | |
543 | /* Ignore FPA regs and scr. */ | |
544 | ptr += 8 * 12 + 4; | |
b5ff1b31 | 545 | cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff); |
1fddef4b | 546 | } |
e6e5906b PB |
547 | #elif defined (TARGET_M68K) |
548 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
549 | { | |
550 | int i; | |
551 | uint8_t *ptr; | |
552 | CPU_DoubleU u; | |
553 | ||
554 | ptr = mem_buf; | |
555 | /* D0-D7 */ | |
556 | for (i = 0; i < 8; i++) { | |
557 | *(uint32_t *)ptr = tswapl(env->dregs[i]); | |
558 | ptr += 4; | |
559 | } | |
560 | /* A0-A7 */ | |
561 | for (i = 0; i < 8; i++) { | |
562 | *(uint32_t *)ptr = tswapl(env->aregs[i]); | |
563 | ptr += 4; | |
564 | } | |
565 | *(uint32_t *)ptr = tswapl(env->sr); | |
566 | ptr += 4; | |
567 | *(uint32_t *)ptr = tswapl(env->pc); | |
568 | ptr += 4; | |
569 | /* F0-F7. The 68881/68040 have 12-bit extended precision registers. | |
570 | ColdFire has 8-bit double precision registers. */ | |
571 | for (i = 0; i < 8; i++) { | |
572 | u.d = env->fregs[i]; | |
573 | *(uint32_t *)ptr = tswap32(u.l.upper); | |
574 | *(uint32_t *)ptr = tswap32(u.l.lower); | |
575 | } | |
576 | /* FP control regs (not implemented). */ | |
577 | memset (ptr, 0, 3 * 4); | |
578 | ptr += 3 * 4; | |
579 | ||
580 | return ptr - mem_buf; | |
581 | } | |
582 | ||
583 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
584 | { | |
585 | int i; | |
586 | uint8_t *ptr; | |
587 | CPU_DoubleU u; | |
588 | ||
589 | ptr = mem_buf; | |
590 | /* D0-D7 */ | |
591 | for (i = 0; i < 8; i++) { | |
592 | env->dregs[i] = tswapl(*(uint32_t *)ptr); | |
593 | ptr += 4; | |
594 | } | |
595 | /* A0-A7 */ | |
596 | for (i = 0; i < 8; i++) { | |
597 | env->aregs[i] = tswapl(*(uint32_t *)ptr); | |
598 | ptr += 4; | |
599 | } | |
600 | env->sr = tswapl(*(uint32_t *)ptr); | |
601 | ptr += 4; | |
602 | env->pc = tswapl(*(uint32_t *)ptr); | |
603 | ptr += 4; | |
604 | /* F0-F7. The 68881/68040 have 12-bit extended precision registers. | |
605 | ColdFire has 8-bit double precision registers. */ | |
606 | for (i = 0; i < 8; i++) { | |
5fafdf24 | 607 | u.l.upper = tswap32(*(uint32_t *)ptr); |
e6e5906b PB |
608 | u.l.lower = tswap32(*(uint32_t *)ptr); |
609 | env->fregs[i] = u.d; | |
610 | } | |
611 | /* FP control regs (not implemented). */ | |
612 | ptr += 3 * 4; | |
613 | } | |
6f970bd9 FB |
614 | #elif defined (TARGET_MIPS) |
615 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
616 | { | |
617 | int i; | |
618 | uint8_t *ptr; | |
619 | ||
620 | ptr = mem_buf; | |
621 | for (i = 0; i < 32; i++) | |
622 | { | |
d0dc7dc3 | 623 | *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]); |
2052caa7 | 624 | ptr += sizeof(target_ulong); |
6f970bd9 FB |
625 | } |
626 | ||
7ac256b8 | 627 | *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status); |
2052caa7 | 628 | ptr += sizeof(target_ulong); |
6f970bd9 | 629 | |
d0dc7dc3 | 630 | *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]); |
2052caa7 | 631 | ptr += sizeof(target_ulong); |
6f970bd9 | 632 | |
d0dc7dc3 | 633 | *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]); |
2052caa7 | 634 | ptr += sizeof(target_ulong); |
6f970bd9 | 635 | |
2052caa7 TS |
636 | *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr); |
637 | ptr += sizeof(target_ulong); | |
6f970bd9 | 638 | |
7ac256b8 | 639 | *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause); |
2052caa7 | 640 | ptr += sizeof(target_ulong); |
6f970bd9 | 641 | |
ead9360e | 642 | *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]); |
2052caa7 | 643 | ptr += sizeof(target_ulong); |
6f970bd9 | 644 | |
36d23958 | 645 | if (env->CP0_Config1 & (1 << CP0C1_FP)) |
8e33c08c | 646 | { |
36d23958 TS |
647 | for (i = 0; i < 32; i++) |
648 | { | |
7ac256b8 TS |
649 | if (env->CP0_Status & (1 << CP0St_FR)) |
650 | *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d); | |
651 | else | |
652 | *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]); | |
2052caa7 | 653 | ptr += sizeof(target_ulong); |
36d23958 | 654 | } |
8e33c08c | 655 | |
7ac256b8 | 656 | *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31); |
2052caa7 | 657 | ptr += sizeof(target_ulong); |
8e33c08c | 658 | |
7ac256b8 | 659 | *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0); |
2052caa7 | 660 | ptr += sizeof(target_ulong); |
36d23958 | 661 | } |
8e33c08c | 662 | |
7ac256b8 TS |
663 | /* "fp", pseudo frame pointer. Not yet implemented in gdb. */ |
664 | *(target_ulong *)ptr = 0; | |
665 | ptr += sizeof(target_ulong); | |
666 | ||
667 | /* Registers for embedded use, we just pad them. */ | |
668 | for (i = 0; i < 16; i++) | |
669 | { | |
670 | *(target_ulong *)ptr = 0; | |
671 | ptr += sizeof(target_ulong); | |
672 | } | |
673 | ||
674 | /* Processor ID. */ | |
675 | *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid); | |
676 | ptr += sizeof(target_ulong); | |
6f970bd9 FB |
677 | |
678 | return ptr - mem_buf; | |
679 | } | |
680 | ||
8e33c08c TS |
681 | /* convert MIPS rounding mode in FCR31 to IEEE library */ |
682 | static unsigned int ieee_rm[] = | |
683 | { | |
684 | float_round_nearest_even, | |
685 | float_round_to_zero, | |
686 | float_round_up, | |
687 | float_round_down | |
688 | }; | |
689 | #define RESTORE_ROUNDING_MODE \ | |
ead9360e | 690 | set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status) |
8e33c08c | 691 | |
6f970bd9 FB |
692 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
693 | { | |
694 | int i; | |
695 | uint8_t *ptr; | |
696 | ||
697 | ptr = mem_buf; | |
698 | for (i = 0; i < 32; i++) | |
699 | { | |
d0dc7dc3 | 700 | env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr); |
2052caa7 | 701 | ptr += sizeof(target_ulong); |
6f970bd9 FB |
702 | } |
703 | ||
2052caa7 TS |
704 | env->CP0_Status = tswapl(*(target_ulong *)ptr); |
705 | ptr += sizeof(target_ulong); | |
6f970bd9 | 706 | |
d0dc7dc3 | 707 | env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr); |
2052caa7 | 708 | ptr += sizeof(target_ulong); |
6f970bd9 | 709 | |
d0dc7dc3 | 710 | env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr); |
2052caa7 | 711 | ptr += sizeof(target_ulong); |
6f970bd9 | 712 | |
2052caa7 TS |
713 | env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr); |
714 | ptr += sizeof(target_ulong); | |
6f970bd9 | 715 | |
2052caa7 TS |
716 | env->CP0_Cause = tswapl(*(target_ulong *)ptr); |
717 | ptr += sizeof(target_ulong); | |
6f970bd9 | 718 | |
ead9360e | 719 | env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr); |
2052caa7 | 720 | ptr += sizeof(target_ulong); |
8e33c08c | 721 | |
36d23958 | 722 | if (env->CP0_Config1 & (1 << CP0C1_FP)) |
8e33c08c | 723 | { |
36d23958 TS |
724 | for (i = 0; i < 32; i++) |
725 | { | |
7ac256b8 TS |
726 | if (env->CP0_Status & (1 << CP0St_FR)) |
727 | env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr); | |
728 | else | |
729 | env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr); | |
2052caa7 | 730 | ptr += sizeof(target_ulong); |
36d23958 | 731 | } |
8e33c08c | 732 | |
7ac256b8 | 733 | env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF; |
2052caa7 | 734 | ptr += sizeof(target_ulong); |
8e33c08c | 735 | |
7ac256b8 | 736 | /* The remaining registers are assumed to be read-only. */ |
8e33c08c | 737 | |
36d23958 TS |
738 | /* set rounding mode */ |
739 | RESTORE_ROUNDING_MODE; | |
8e33c08c TS |
740 | |
741 | #ifndef CONFIG_SOFTFLOAT | |
36d23958 TS |
742 | /* no floating point exception for native float */ |
743 | SET_FP_ENABLE(env->fcr31, 0); | |
8e33c08c | 744 | #endif |
36d23958 | 745 | } |
6f970bd9 | 746 | } |
fdf9b3e8 | 747 | #elif defined (TARGET_SH4) |
6ef99fc5 TS |
748 | |
749 | /* Hint: Use "set architecture sh4" in GDB to see fpu registers */ | |
750 | ||
fdf9b3e8 FB |
751 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
752 | { | |
753 | uint32_t *ptr = (uint32_t *)mem_buf; | |
754 | int i; | |
755 | ||
756 | #define SAVE(x) *ptr++=tswapl(x) | |
9c2a9ea1 PB |
757 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { |
758 | for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); | |
759 | } else { | |
760 | for (i = 0; i < 8; i++) SAVE(env->gregs[i]); | |
761 | } | |
762 | for (i = 8; i < 16; i++) SAVE(env->gregs[i]); | |
fdf9b3e8 FB |
763 | SAVE (env->pc); |
764 | SAVE (env->pr); | |
765 | SAVE (env->gbr); | |
766 | SAVE (env->vbr); | |
767 | SAVE (env->mach); | |
768 | SAVE (env->macl); | |
769 | SAVE (env->sr); | |
6ef99fc5 TS |
770 | SAVE (env->fpul); |
771 | SAVE (env->fpscr); | |
772 | for (i = 0; i < 16; i++) | |
773 | SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); | |
774 | SAVE (env->ssr); | |
775 | SAVE (env->spc); | |
776 | for (i = 0; i < 8; i++) SAVE(env->gregs[i]); | |
777 | for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); | |
fdf9b3e8 FB |
778 | return ((uint8_t *)ptr - mem_buf); |
779 | } | |
780 | ||
781 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
782 | { | |
783 | uint32_t *ptr = (uint32_t *)mem_buf; | |
784 | int i; | |
785 | ||
786 | #define LOAD(x) (x)=*ptr++; | |
9c2a9ea1 PB |
787 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { |
788 | for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); | |
789 | } else { | |
790 | for (i = 0; i < 8; i++) LOAD(env->gregs[i]); | |
791 | } | |
792 | for (i = 8; i < 16; i++) LOAD(env->gregs[i]); | |
fdf9b3e8 FB |
793 | LOAD (env->pc); |
794 | LOAD (env->pr); | |
795 | LOAD (env->gbr); | |
796 | LOAD (env->vbr); | |
797 | LOAD (env->mach); | |
798 | LOAD (env->macl); | |
799 | LOAD (env->sr); | |
6ef99fc5 TS |
800 | LOAD (env->fpul); |
801 | LOAD (env->fpscr); | |
802 | for (i = 0; i < 16; i++) | |
803 | LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); | |
804 | LOAD (env->ssr); | |
805 | LOAD (env->spc); | |
806 | for (i = 0; i < 8; i++) LOAD(env->gregs[i]); | |
807 | for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); | |
fdf9b3e8 | 808 | } |
f1ccf904 TS |
809 | #elif defined (TARGET_CRIS) |
810 | ||
811 | static int cris_save_32 (unsigned char *d, uint32_t value) | |
812 | { | |
813 | *d++ = (value); | |
814 | *d++ = (value >>= 8); | |
815 | *d++ = (value >>= 8); | |
816 | *d++ = (value >>= 8); | |
817 | return 4; | |
818 | } | |
819 | static int cris_save_16 (unsigned char *d, uint32_t value) | |
820 | { | |
821 | *d++ = (value); | |
822 | *d++ = (value >>= 8); | |
823 | return 2; | |
824 | } | |
825 | static int cris_save_8 (unsigned char *d, uint32_t value) | |
826 | { | |
827 | *d++ = (value); | |
828 | return 1; | |
829 | } | |
830 | ||
831 | /* FIXME: this will bug on archs not supporting unaligned word accesses. */ | |
832 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
833 | { | |
834 | uint8_t *ptr = mem_buf; | |
835 | uint8_t srs; | |
836 | int i; | |
837 | ||
838 | for (i = 0; i < 16; i++) | |
839 | ptr += cris_save_32 (ptr, env->regs[i]); | |
840 | ||
9004627f | 841 | srs = env->pregs[PR_SRS]; |
f1ccf904 TS |
842 | |
843 | ptr += cris_save_8 (ptr, env->pregs[0]); | |
844 | ptr += cris_save_8 (ptr, env->pregs[1]); | |
845 | ptr += cris_save_32 (ptr, env->pregs[2]); | |
846 | ptr += cris_save_8 (ptr, srs); | |
847 | ptr += cris_save_16 (ptr, env->pregs[4]); | |
848 | ||
849 | for (i = 5; i < 16; i++) | |
850 | ptr += cris_save_32 (ptr, env->pregs[i]); | |
851 | ||
852 | ptr += cris_save_32 (ptr, env->pc); | |
853 | ||
854 | for (i = 0; i < 16; i++) | |
855 | ptr += cris_save_32 (ptr, env->sregs[srs][i]); | |
856 | ||
857 | return ((uint8_t *)ptr - mem_buf); | |
858 | } | |
859 | ||
860 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
861 | { | |
862 | uint32_t *ptr = (uint32_t *)mem_buf; | |
863 | int i; | |
864 | ||
865 | #define LOAD(x) (x)=*ptr++; | |
866 | for (i = 0; i < 16; i++) LOAD(env->regs[i]); | |
867 | LOAD (env->pc); | |
868 | } | |
1fddef4b | 869 | #else |
6da41eaf FB |
870 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
871 | { | |
872 | return 0; | |
873 | } | |
874 | ||
875 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
876 | { | |
877 | } | |
878 | ||
879 | #endif | |
b4608c04 | 880 | |
1fddef4b | 881 | static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) |
b4608c04 | 882 | { |
b4608c04 | 883 | const char *p; |
858693c6 | 884 | int ch, reg_size, type; |
b4608c04 | 885 | char buf[4096]; |
f1ccf904 | 886 | uint8_t mem_buf[4096]; |
b4608c04 | 887 | uint32_t *registers; |
9d9754a3 | 888 | target_ulong addr, len; |
3b46e624 | 889 | |
858693c6 FB |
890 | #ifdef DEBUG_GDB |
891 | printf("command='%s'\n", line_buf); | |
892 | #endif | |
893 | p = line_buf; | |
894 | ch = *p++; | |
895 | switch(ch) { | |
896 | case '?': | |
1fddef4b | 897 | /* TODO: Make this return the correct value for user-mode. */ |
858693c6 FB |
898 | snprintf(buf, sizeof(buf), "S%02x", SIGTRAP); |
899 | put_packet(s, buf); | |
900 | break; | |
901 | case 'c': | |
902 | if (*p != '\0') { | |
9d9754a3 | 903 | addr = strtoull(p, (char **)&p, 16); |
4c3a88a2 | 904 | #if defined(TARGET_I386) |
858693c6 | 905 | env->eip = addr; |
5be1a8e0 | 906 | #elif defined (TARGET_PPC) |
858693c6 | 907 | env->nip = addr; |
8d5f07fa FB |
908 | #elif defined (TARGET_SPARC) |
909 | env->pc = addr; | |
910 | env->npc = addr + 4; | |
b5ff1b31 FB |
911 | #elif defined (TARGET_ARM) |
912 | env->regs[15] = addr; | |
fdf9b3e8 | 913 | #elif defined (TARGET_SH4) |
8fac5803 TS |
914 | env->pc = addr; |
915 | #elif defined (TARGET_MIPS) | |
ead9360e | 916 | env->PC[env->current_tc] = addr; |
f1ccf904 TS |
917 | #elif defined (TARGET_CRIS) |
918 | env->pc = addr; | |
4c3a88a2 | 919 | #endif |
858693c6 | 920 | } |
ba70a624 | 921 | gdb_continue(s); |
41625033 | 922 | return RS_IDLE; |
858693c6 FB |
923 | case 's': |
924 | if (*p != '\0') { | |
8fac5803 | 925 | addr = strtoull(p, (char **)&p, 16); |
c33a346e | 926 | #if defined(TARGET_I386) |
858693c6 | 927 | env->eip = addr; |
5be1a8e0 | 928 | #elif defined (TARGET_PPC) |
858693c6 | 929 | env->nip = addr; |
8d5f07fa FB |
930 | #elif defined (TARGET_SPARC) |
931 | env->pc = addr; | |
932 | env->npc = addr + 4; | |
b5ff1b31 FB |
933 | #elif defined (TARGET_ARM) |
934 | env->regs[15] = addr; | |
fdf9b3e8 | 935 | #elif defined (TARGET_SH4) |
8fac5803 TS |
936 | env->pc = addr; |
937 | #elif defined (TARGET_MIPS) | |
ead9360e | 938 | env->PC[env->current_tc] = addr; |
f1ccf904 TS |
939 | #elif defined (TARGET_CRIS) |
940 | env->pc = addr; | |
c33a346e | 941 | #endif |
858693c6 FB |
942 | } |
943 | cpu_single_step(env, 1); | |
ba70a624 | 944 | gdb_continue(s); |
41625033 | 945 | return RS_IDLE; |
a2d1ebaf PB |
946 | case 'F': |
947 | { | |
948 | target_ulong ret; | |
949 | target_ulong err; | |
950 | ||
951 | ret = strtoull(p, (char **)&p, 16); | |
952 | if (*p == ',') { | |
953 | p++; | |
954 | err = strtoull(p, (char **)&p, 16); | |
955 | } else { | |
956 | err = 0; | |
957 | } | |
958 | if (*p == ',') | |
959 | p++; | |
960 | type = *p; | |
961 | if (gdb_current_syscall_cb) | |
962 | gdb_current_syscall_cb(s->env, ret, err); | |
963 | if (type == 'C') { | |
964 | put_packet(s, "T02"); | |
965 | } else { | |
ba70a624 | 966 | gdb_continue(s); |
a2d1ebaf PB |
967 | } |
968 | } | |
969 | break; | |
858693c6 FB |
970 | case 'g': |
971 | reg_size = cpu_gdb_read_registers(env, mem_buf); | |
972 | memtohex(buf, mem_buf, reg_size); | |
973 | put_packet(s, buf); | |
974 | break; | |
975 | case 'G': | |
976 | registers = (void *)mem_buf; | |
977 | len = strlen(p) / 2; | |
978 | hextomem((uint8_t *)registers, p, len); | |
979 | cpu_gdb_write_registers(env, mem_buf, len); | |
980 | put_packet(s, "OK"); | |
981 | break; | |
982 | case 'm': | |
9d9754a3 | 983 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
984 | if (*p == ',') |
985 | p++; | |
9d9754a3 | 986 | len = strtoull(p, NULL, 16); |
6f970bd9 FB |
987 | if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) { |
988 | put_packet (s, "E14"); | |
989 | } else { | |
990 | memtohex(buf, mem_buf, len); | |
991 | put_packet(s, buf); | |
992 | } | |
858693c6 FB |
993 | break; |
994 | case 'M': | |
9d9754a3 | 995 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
996 | if (*p == ',') |
997 | p++; | |
9d9754a3 | 998 | len = strtoull(p, (char **)&p, 16); |
b328f873 | 999 | if (*p == ':') |
858693c6 FB |
1000 | p++; |
1001 | hextomem(mem_buf, p, len); | |
1002 | if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0) | |
905f20b1 | 1003 | put_packet(s, "E14"); |
858693c6 FB |
1004 | else |
1005 | put_packet(s, "OK"); | |
1006 | break; | |
1007 | case 'Z': | |
1008 | type = strtoul(p, (char **)&p, 16); | |
1009 | if (*p == ',') | |
1010 | p++; | |
9d9754a3 | 1011 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1012 | if (*p == ',') |
1013 | p++; | |
9d9754a3 | 1014 | len = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1015 | if (type == 0 || type == 1) { |
1016 | if (cpu_breakpoint_insert(env, addr) < 0) | |
1017 | goto breakpoint_error; | |
1018 | put_packet(s, "OK"); | |
6658ffb8 PB |
1019 | #ifndef CONFIG_USER_ONLY |
1020 | } else if (type == 2) { | |
1021 | if (cpu_watchpoint_insert(env, addr) < 0) | |
1022 | goto breakpoint_error; | |
1023 | put_packet(s, "OK"); | |
1024 | #endif | |
858693c6 FB |
1025 | } else { |
1026 | breakpoint_error: | |
905f20b1 | 1027 | put_packet(s, "E22"); |
858693c6 FB |
1028 | } |
1029 | break; | |
1030 | case 'z': | |
1031 | type = strtoul(p, (char **)&p, 16); | |
1032 | if (*p == ',') | |
1033 | p++; | |
9d9754a3 | 1034 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1035 | if (*p == ',') |
1036 | p++; | |
9d9754a3 | 1037 | len = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1038 | if (type == 0 || type == 1) { |
1039 | cpu_breakpoint_remove(env, addr); | |
1040 | put_packet(s, "OK"); | |
6658ffb8 PB |
1041 | #ifndef CONFIG_USER_ONLY |
1042 | } else if (type == 2) { | |
1043 | cpu_watchpoint_remove(env, addr); | |
1044 | put_packet(s, "OK"); | |
1045 | #endif | |
858693c6 FB |
1046 | } else { |
1047 | goto breakpoint_error; | |
1048 | } | |
1049 | break; | |
831b7825 | 1050 | #ifdef CONFIG_LINUX_USER |
978efd6a PB |
1051 | case 'q': |
1052 | if (strncmp(p, "Offsets", 7) == 0) { | |
1053 | TaskState *ts = env->opaque; | |
1054 | ||
fe834d04 | 1055 | sprintf(buf, |
cd041681 PB |
1056 | "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx |
1057 | ";Bss=" TARGET_ABI_FMT_lx, | |
fe834d04 TS |
1058 | ts->info->code_offset, |
1059 | ts->info->data_offset, | |
1060 | ts->info->data_offset); | |
978efd6a PB |
1061 | put_packet(s, buf); |
1062 | break; | |
1063 | } | |
1064 | /* Fall through. */ | |
1065 | #endif | |
858693c6 FB |
1066 | default: |
1067 | // unknown_command: | |
1068 | /* put empty packet */ | |
1069 | buf[0] = '\0'; | |
1070 | put_packet(s, buf); | |
1071 | break; | |
1072 | } | |
1073 | return RS_IDLE; | |
1074 | } | |
1075 | ||
612458f5 FB |
1076 | extern void tb_flush(CPUState *env); |
1077 | ||
1fddef4b | 1078 | #ifndef CONFIG_USER_ONLY |
858693c6 FB |
1079 | static void gdb_vm_stopped(void *opaque, int reason) |
1080 | { | |
1081 | GDBState *s = opaque; | |
1082 | char buf[256]; | |
1083 | int ret; | |
1084 | ||
a2d1ebaf PB |
1085 | if (s->state == RS_SYSCALL) |
1086 | return; | |
1087 | ||
858693c6 | 1088 | /* disable single step if it was enable */ |
6a00d601 | 1089 | cpu_single_step(s->env, 0); |
858693c6 | 1090 | |
e80cfcfc | 1091 | if (reason == EXCP_DEBUG) { |
6658ffb8 | 1092 | if (s->env->watchpoint_hit) { |
aa6290b7 PB |
1093 | snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";", |
1094 | SIGTRAP, | |
6658ffb8 PB |
1095 | s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr); |
1096 | put_packet(s, buf); | |
1097 | s->env->watchpoint_hit = 0; | |
1098 | return; | |
1099 | } | |
6a00d601 | 1100 | tb_flush(s->env); |
858693c6 | 1101 | ret = SIGTRAP; |
bbeb7b5c FB |
1102 | } else if (reason == EXCP_INTERRUPT) { |
1103 | ret = SIGINT; | |
1104 | } else { | |
858693c6 | 1105 | ret = 0; |
bbeb7b5c | 1106 | } |
858693c6 FB |
1107 | snprintf(buf, sizeof(buf), "S%02x", ret); |
1108 | put_packet(s, buf); | |
1109 | } | |
1fddef4b | 1110 | #endif |
858693c6 | 1111 | |
a2d1ebaf PB |
1112 | /* Send a gdb syscall request. |
1113 | This accepts limited printf-style format specifiers, specifically: | |
a87295e8 PB |
1114 | %x - target_ulong argument printed in hex. |
1115 | %lx - 64-bit argument printed in hex. | |
1116 | %s - string pointer (target_ulong) and length (int) pair. */ | |
a2d1ebaf PB |
1117 | void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...) |
1118 | { | |
1119 | va_list va; | |
1120 | char buf[256]; | |
1121 | char *p; | |
1122 | target_ulong addr; | |
a87295e8 | 1123 | uint64_t i64; |
a2d1ebaf PB |
1124 | GDBState *s; |
1125 | ||
1126 | s = gdb_syscall_state; | |
1127 | if (!s) | |
1128 | return; | |
1129 | gdb_current_syscall_cb = cb; | |
1130 | s->state = RS_SYSCALL; | |
1131 | #ifndef CONFIG_USER_ONLY | |
1132 | vm_stop(EXCP_DEBUG); | |
1133 | #endif | |
1134 | s->state = RS_IDLE; | |
1135 | va_start(va, fmt); | |
1136 | p = buf; | |
1137 | *(p++) = 'F'; | |
1138 | while (*fmt) { | |
1139 | if (*fmt == '%') { | |
1140 | fmt++; | |
1141 | switch (*fmt++) { | |
1142 | case 'x': | |
1143 | addr = va_arg(va, target_ulong); | |
1144 | p += sprintf(p, TARGET_FMT_lx, addr); | |
1145 | break; | |
a87295e8 PB |
1146 | case 'l': |
1147 | if (*(fmt++) != 'x') | |
1148 | goto bad_format; | |
1149 | i64 = va_arg(va, uint64_t); | |
1150 | p += sprintf(p, "%" PRIx64, i64); | |
1151 | break; | |
a2d1ebaf PB |
1152 | case 's': |
1153 | addr = va_arg(va, target_ulong); | |
1154 | p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int)); | |
1155 | break; | |
1156 | default: | |
a87295e8 | 1157 | bad_format: |
a2d1ebaf PB |
1158 | fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n", |
1159 | fmt - 1); | |
1160 | break; | |
1161 | } | |
1162 | } else { | |
1163 | *(p++) = *(fmt++); | |
1164 | } | |
1165 | } | |
8a93e02a | 1166 | *p = 0; |
a2d1ebaf PB |
1167 | va_end(va); |
1168 | put_packet(s, buf); | |
1169 | #ifdef CONFIG_USER_ONLY | |
1170 | gdb_handlesig(s->env, 0); | |
1171 | #else | |
1172 | cpu_interrupt(s->env, CPU_INTERRUPT_EXIT); | |
1173 | #endif | |
1174 | } | |
1175 | ||
6a00d601 | 1176 | static void gdb_read_byte(GDBState *s, int ch) |
858693c6 | 1177 | { |
6a00d601 | 1178 | CPUState *env = s->env; |
858693c6 | 1179 | int i, csum; |
60fe76f3 | 1180 | uint8_t reply; |
858693c6 | 1181 | |
1fddef4b | 1182 | #ifndef CONFIG_USER_ONLY |
4046d913 PB |
1183 | if (s->last_packet_len) { |
1184 | /* Waiting for a response to the last packet. If we see the start | |
1185 | of a new command then abandon the previous response. */ | |
1186 | if (ch == '-') { | |
1187 | #ifdef DEBUG_GDB | |
1188 | printf("Got NACK, retransmitting\n"); | |
1189 | #endif | |
ffe8ab83 | 1190 | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
4046d913 PB |
1191 | } |
1192 | #ifdef DEBUG_GDB | |
1193 | else if (ch == '+') | |
1194 | printf("Got ACK\n"); | |
1195 | else | |
1196 | printf("Got '%c' when expecting ACK/NACK\n", ch); | |
1197 | #endif | |
1198 | if (ch == '+' || ch == '$') | |
1199 | s->last_packet_len = 0; | |
1200 | if (ch != '$') | |
1201 | return; | |
1202 | } | |
858693c6 FB |
1203 | if (vm_running) { |
1204 | /* when the CPU is running, we cannot do anything except stop | |
1205 | it when receiving a char */ | |
1206 | vm_stop(EXCP_INTERRUPT); | |
5fafdf24 | 1207 | } else |
1fddef4b | 1208 | #endif |
41625033 | 1209 | { |
858693c6 FB |
1210 | switch(s->state) { |
1211 | case RS_IDLE: | |
1212 | if (ch == '$') { | |
1213 | s->line_buf_index = 0; | |
1214 | s->state = RS_GETLINE; | |
c33a346e | 1215 | } |
b4608c04 | 1216 | break; |
858693c6 FB |
1217 | case RS_GETLINE: |
1218 | if (ch == '#') { | |
1219 | s->state = RS_CHKSUM1; | |
1220 | } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) { | |
1221 | s->state = RS_IDLE; | |
4c3a88a2 | 1222 | } else { |
858693c6 | 1223 | s->line_buf[s->line_buf_index++] = ch; |
4c3a88a2 FB |
1224 | } |
1225 | break; | |
858693c6 FB |
1226 | case RS_CHKSUM1: |
1227 | s->line_buf[s->line_buf_index] = '\0'; | |
1228 | s->line_csum = fromhex(ch) << 4; | |
1229 | s->state = RS_CHKSUM2; | |
1230 | break; | |
1231 | case RS_CHKSUM2: | |
1232 | s->line_csum |= fromhex(ch); | |
1233 | csum = 0; | |
1234 | for(i = 0; i < s->line_buf_index; i++) { | |
1235 | csum += s->line_buf[i]; | |
1236 | } | |
1237 | if (s->line_csum != (csum & 0xff)) { | |
60fe76f3 TS |
1238 | reply = '-'; |
1239 | put_buffer(s, &reply, 1); | |
858693c6 | 1240 | s->state = RS_IDLE; |
4c3a88a2 | 1241 | } else { |
60fe76f3 TS |
1242 | reply = '+'; |
1243 | put_buffer(s, &reply, 1); | |
1fddef4b | 1244 | s->state = gdb_handle_packet(s, env, s->line_buf); |
4c3a88a2 FB |
1245 | } |
1246 | break; | |
a2d1ebaf PB |
1247 | default: |
1248 | abort(); | |
858693c6 FB |
1249 | } |
1250 | } | |
1251 | } | |
1252 | ||
1fddef4b FB |
1253 | #ifdef CONFIG_USER_ONLY |
1254 | int | |
1255 | gdb_handlesig (CPUState *env, int sig) | |
1256 | { | |
1257 | GDBState *s; | |
1258 | char buf[256]; | |
1259 | int n; | |
1260 | ||
1261 | if (gdbserver_fd < 0) | |
1262 | return sig; | |
1263 | ||
1264 | s = &gdbserver_state; | |
1265 | ||
1266 | /* disable single step if it was enabled */ | |
1267 | cpu_single_step(env, 0); | |
1268 | tb_flush(env); | |
1269 | ||
1270 | if (sig != 0) | |
1271 | { | |
1272 | snprintf(buf, sizeof(buf), "S%02x", sig); | |
1273 | put_packet(s, buf); | |
1274 | } | |
1275 | ||
1fddef4b FB |
1276 | sig = 0; |
1277 | s->state = RS_IDLE; | |
41625033 FB |
1278 | s->running_state = 0; |
1279 | while (s->running_state == 0) { | |
1fddef4b FB |
1280 | n = read (s->fd, buf, 256); |
1281 | if (n > 0) | |
1282 | { | |
1283 | int i; | |
1284 | ||
1285 | for (i = 0; i < n; i++) | |
6a00d601 | 1286 | gdb_read_byte (s, buf[i]); |
1fddef4b FB |
1287 | } |
1288 | else if (n == 0 || errno != EAGAIN) | |
1289 | { | |
1290 | /* XXX: Connection closed. Should probably wait for annother | |
1291 | connection before continuing. */ | |
1292 | return sig; | |
1293 | } | |
41625033 | 1294 | } |
1fddef4b FB |
1295 | return sig; |
1296 | } | |
e9009676 FB |
1297 | |
1298 | /* Tell the remote gdb that the process has exited. */ | |
1299 | void gdb_exit(CPUState *env, int code) | |
1300 | { | |
1301 | GDBState *s; | |
1302 | char buf[4]; | |
1303 | ||
1304 | if (gdbserver_fd < 0) | |
1305 | return; | |
1306 | ||
1307 | s = &gdbserver_state; | |
1308 | ||
1309 | snprintf(buf, sizeof(buf), "W%02x", code); | |
1310 | put_packet(s, buf); | |
1311 | } | |
1312 | ||
1fddef4b | 1313 | |
7c9d8e07 | 1314 | static void gdb_accept(void *opaque) |
858693c6 FB |
1315 | { |
1316 | GDBState *s; | |
1317 | struct sockaddr_in sockaddr; | |
1318 | socklen_t len; | |
1319 | int val, fd; | |
1320 | ||
1321 | for(;;) { | |
1322 | len = sizeof(sockaddr); | |
1323 | fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len); | |
1324 | if (fd < 0 && errno != EINTR) { | |
1325 | perror("accept"); | |
1326 | return; | |
1327 | } else if (fd >= 0) { | |
b4608c04 FB |
1328 | break; |
1329 | } | |
1330 | } | |
858693c6 FB |
1331 | |
1332 | /* set short latency */ | |
1333 | val = 1; | |
8f447cc7 | 1334 | setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val)); |
3b46e624 | 1335 | |
1fddef4b FB |
1336 | s = &gdbserver_state; |
1337 | memset (s, 0, sizeof (GDBState)); | |
6a00d601 | 1338 | s->env = first_cpu; /* XXX: allow to change CPU */ |
858693c6 FB |
1339 | s->fd = fd; |
1340 | ||
a2d1ebaf PB |
1341 | gdb_syscall_state = s; |
1342 | ||
858693c6 | 1343 | fcntl(fd, F_SETFL, O_NONBLOCK); |
858693c6 FB |
1344 | } |
1345 | ||
1346 | static int gdbserver_open(int port) | |
1347 | { | |
1348 | struct sockaddr_in sockaddr; | |
1349 | int fd, val, ret; | |
1350 | ||
1351 | fd = socket(PF_INET, SOCK_STREAM, 0); | |
1352 | if (fd < 0) { | |
1353 | perror("socket"); | |
1354 | return -1; | |
1355 | } | |
1356 | ||
1357 | /* allow fast reuse */ | |
1358 | val = 1; | |
8f447cc7 | 1359 | setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val)); |
858693c6 FB |
1360 | |
1361 | sockaddr.sin_family = AF_INET; | |
1362 | sockaddr.sin_port = htons(port); | |
1363 | sockaddr.sin_addr.s_addr = 0; | |
1364 | ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); | |
1365 | if (ret < 0) { | |
1366 | perror("bind"); | |
1367 | return -1; | |
1368 | } | |
1369 | ret = listen(fd, 0); | |
1370 | if (ret < 0) { | |
1371 | perror("listen"); | |
1372 | return -1; | |
1373 | } | |
858693c6 FB |
1374 | return fd; |
1375 | } | |
1376 | ||
1377 | int gdbserver_start(int port) | |
1378 | { | |
1379 | gdbserver_fd = gdbserver_open(port); | |
1380 | if (gdbserver_fd < 0) | |
1381 | return -1; | |
1382 | /* accept connections */ | |
7c9d8e07 | 1383 | gdb_accept (NULL); |
4046d913 PB |
1384 | return 0; |
1385 | } | |
1fddef4b | 1386 | #else |
aa1f17c1 | 1387 | static int gdb_chr_can_receive(void *opaque) |
4046d913 PB |
1388 | { |
1389 | return 1; | |
1390 | } | |
1391 | ||
aa1f17c1 | 1392 | static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size) |
4046d913 PB |
1393 | { |
1394 | GDBState *s = opaque; | |
1395 | int i; | |
1396 | ||
1397 | for (i = 0; i < size; i++) { | |
1398 | gdb_read_byte(s, buf[i]); | |
1399 | } | |
1400 | } | |
1401 | ||
1402 | static void gdb_chr_event(void *opaque, int event) | |
1403 | { | |
1404 | switch (event) { | |
1405 | case CHR_EVENT_RESET: | |
1406 | vm_stop(EXCP_INTERRUPT); | |
a2d1ebaf | 1407 | gdb_syscall_state = opaque; |
4046d913 PB |
1408 | break; |
1409 | default: | |
1410 | break; | |
1411 | } | |
1412 | } | |
1413 | ||
cfc3475a | 1414 | int gdbserver_start(const char *port) |
4046d913 PB |
1415 | { |
1416 | GDBState *s; | |
cfc3475a PB |
1417 | char gdbstub_port_name[128]; |
1418 | int port_num; | |
1419 | char *p; | |
1420 | CharDriverState *chr; | |
1421 | ||
1422 | if (!port || !*port) | |
1423 | return -1; | |
4046d913 | 1424 | |
cfc3475a PB |
1425 | port_num = strtol(port, &p, 10); |
1426 | if (*p == 0) { | |
1427 | /* A numeric value is interpreted as a port number. */ | |
1428 | snprintf(gdbstub_port_name, sizeof(gdbstub_port_name), | |
1429 | "tcp::%d,nowait,nodelay,server", port_num); | |
1430 | port = gdbstub_port_name; | |
1431 | } | |
1432 | ||
1433 | chr = qemu_chr_open(port); | |
4046d913 PB |
1434 | if (!chr) |
1435 | return -1; | |
1436 | ||
1437 | s = qemu_mallocz(sizeof(GDBState)); | |
1438 | if (!s) { | |
1439 | return -1; | |
1440 | } | |
1441 | s->env = first_cpu; /* XXX: allow to change CPU */ | |
1442 | s->chr = chr; | |
aa1f17c1 | 1443 | qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive, |
4046d913 PB |
1444 | gdb_chr_event, s); |
1445 | qemu_add_vm_stop_handler(gdb_vm_stopped, s); | |
b4608c04 FB |
1446 | return 0; |
1447 | } | |
4046d913 | 1448 | #endif |