]> Git Repo - qemu.git/blame - linux-user/main.c
projects / qemu.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Replace gcc variadic macro extension with C99 version
[qemu.git] / linux-user / main.c
CommitLineData
31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
530e7615
BS		 18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 * MA 02110-1301, USA.
31e31b8a
FB		 20 */
21#include <stdlib.h>
22#include <stdio.h>
23#include <stdarg.h>
04369ff2 24#include <string.h>
31e31b8a 25#include <errno.h>
0ecfa993 26#include <unistd.h>
e441570f 27#include <sys/mman.h>
31e31b8a 28
3ef693a0 29#include "qemu.h"
ca10f867 30#include "qemu-common.h"
902b3d5c 31#include "cache-utils.h"
d5975363
PB		 32/* For tb_lock */
33#include "exec-all.h"
31e31b8a 34
04a6dfeb
AJ		 35
36#include "envlist.h"
37
3ef693a0 38#define DEBUG_LOGFILE "/tmp/qemu.log"
586314f2 39
d088d664
AJ		 40char *exec_path;
41
1b530a6d
AJ		 42int singlestep;
43
74cd30b8 44static const char *interp_prefix = CONFIG_QEMU_PREFIX;
c5937220 45const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
586314f2 46
3a4739d6 47#if defined(__i386__) && !defined(CONFIG_STATIC)
f801f97e
FB		 48/* Force usage of an ELF interpreter even if it is an ELF shared
49 object ! */
50const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
4304763b 51#endif
74cd30b8 52
93ac68bc 53/* for recent libc, we add these dummy symbols which are not declared
74cd30b8 54 when generating a linked object (bug in ld ?) */
fbf59244 55#if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
46027c07
FB		 56asm(".globl __preinit_array_start\n"
57 ".globl __preinit_array_end\n"
58 ".globl __init_array_start\n"
59 ".globl __init_array_end\n"
60 ".globl __fini_array_start\n"
61 ".globl __fini_array_end\n"
62 ".section \".rodata\"\n"
63 "__preinit_array_start:\n"
64 "__preinit_array_end:\n"
65 "__init_array_start:\n"
66 "__init_array_end:\n"
67 "__fini_array_start:\n"
68 "__fini_array_end:\n"
7bba1ee8
TS		 69 ".long 0\n"
70 ".previous\n");
74cd30b8
FB		 71#endif
72
9de5e440
FB		 73/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
74 we allocate a bigger stack. Need a better solution, for example
75 by remapping the process stack directly at the right place */
76unsigned long x86_stack_size = 512 * 1024;
31e31b8a
FB		 77
78void gemu_log(const char *fmt, ...)
79{
80 va_list ap;
81
82 va_start(ap, fmt);
83 vfprintf(stderr, fmt, ap);
84 va_end(ap);
85}
86
61190b14 87void cpu_outb(CPUState *env, int addr, int val)
367e86e8
FB		 88{
89 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
90}
91
61190b14 92void cpu_outw(CPUState *env, int addr, int val)
367e86e8
FB		 93{
94 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
95}
96
61190b14 97void cpu_outl(CPUState *env, int addr, int val)
367e86e8
FB		 98{
99 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
100}
101
61190b14 102int cpu_inb(CPUState *env, int addr)
367e86e8
FB		 103{
104 fprintf(stderr, "inb: port=0x%04x\n", addr);
105 return 0;
106}
107
61190b14 108int cpu_inw(CPUState *env, int addr)
367e86e8
FB		 109{
110 fprintf(stderr, "inw: port=0x%04x\n", addr);
111 return 0;
112}
113
61190b14 114int cpu_inl(CPUState *env, int addr)
367e86e8
FB		 115{
116 fprintf(stderr, "inl: port=0x%04x\n", addr);
117 return 0;
118}
119
8fcd3692 120#if defined(TARGET_I386)
a541f297 121int cpu_get_pic_interrupt(CPUState *env)
92ccca6a
FB		 122{
123 return -1;
124}
8fcd3692 125#endif
92ccca6a 126
28ab0e2e
FB		 127/* timers for rdtsc */
128
1dce7c3c 129#if 0
28ab0e2e
FB		 130
131static uint64_t emu_time;
132
133int64_t cpu_get_real_ticks(void)
134{
135 return emu_time++;
136}
137
138#endif
139
d5975363
PB		 140#if defined(USE_NPTL)
141/***********************************************************/
142/* Helper routines for implementing atomic operations. */
143
144/* To implement exclusive operations we force all cpus to syncronise.
145 We don't require a full sync, only that no cpus are executing guest code.
146 The alternative is to map target atomic ops onto host equivalents,
147 which requires quite a lot of per host/target work. */
c2764719 148static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
d5975363
PB		 149static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
150static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
151static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
152static int pending_cpus;
153
154/* Make sure everything is in a consistent state for calling fork(). */
155void fork_start(void)
156{
157 mmap_fork_start();
158 pthread_mutex_lock(&tb_lock);
159 pthread_mutex_lock(&exclusive_lock);
160}
161
162void fork_end(int child)
163{
164 if (child) {
165 /* Child processes created by fork() only have a single thread.
166 Discard information about the parent threads. */
167 first_cpu = thread_env;
168 thread_env->next_cpu = NULL;
169 pending_cpus = 0;
170 pthread_mutex_init(&exclusive_lock, NULL);
c2764719 171 pthread_mutex_init(&cpu_list_mutex, NULL);
d5975363
PB		 172 pthread_cond_init(&exclusive_cond, NULL);
173 pthread_cond_init(&exclusive_resume, NULL);
174 pthread_mutex_init(&tb_lock, NULL);
2b1319c8 175 gdbserver_fork(thread_env);
d5975363
PB		 176 } else {
177 pthread_mutex_unlock(&exclusive_lock);
178 pthread_mutex_unlock(&tb_lock);
179 }
180 mmap_fork_end(child);
181}
182
183/* Wait for pending exclusive operations to complete. The exclusive lock
184 must be held. */
185static inline void exclusive_idle(void)
186{
187 while (pending_cpus) {
188 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
189 }
190}
191
192/* Start an exclusive operation.
193 Must only be called from outside cpu_arm_exec. */
194static inline void start_exclusive(void)
195{
196 CPUState *other;
197 pthread_mutex_lock(&exclusive_lock);
198 exclusive_idle();
199
200 pending_cpus = 1;
201 /* Make all other cpus stop executing. */
202 for (other = first_cpu; other; other = other->next_cpu) {
203 if (other->running) {
204 pending_cpus++;
3098dba0 205 cpu_exit(other);
d5975363
PB		 206 }
207 }
208 if (pending_cpus > 1) {
209 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
210 }
211}
212
213/* Finish an exclusive operation. */
214static inline void end_exclusive(void)
215{
216 pending_cpus = 0;
217 pthread_cond_broadcast(&exclusive_resume);
218 pthread_mutex_unlock(&exclusive_lock);
219}
220
221/* Wait for exclusive ops to finish, and begin cpu execution. */
222static inline void cpu_exec_start(CPUState *env)
223{
224 pthread_mutex_lock(&exclusive_lock);
225 exclusive_idle();
226 env->running = 1;
227 pthread_mutex_unlock(&exclusive_lock);
228}
229
230/* Mark cpu as not executing, and release pending exclusive ops. */
231static inline void cpu_exec_end(CPUState *env)
232{
233 pthread_mutex_lock(&exclusive_lock);
234 env->running = 0;
235 if (pending_cpus > 1) {
236 pending_cpus--;
237 if (pending_cpus == 1) {
238 pthread_cond_signal(&exclusive_cond);
239 }
240 }
241 exclusive_idle();
242 pthread_mutex_unlock(&exclusive_lock);
243}
c2764719
PB		 244
245void cpu_list_lock(void)
246{
247 pthread_mutex_lock(&cpu_list_mutex);
248}
249
250void cpu_list_unlock(void)
251{
252 pthread_mutex_unlock(&cpu_list_mutex);
253}
d5975363
PB		 254#else /* if !USE_NPTL */
255/* These are no-ops because we are not threadsafe. */
256static inline void cpu_exec_start(CPUState *env)
257{
258}
259
260static inline void cpu_exec_end(CPUState *env)
261{
262}
263
264static inline void start_exclusive(void)
265{
266}
267
268static inline void end_exclusive(void)
269{
270}
271
272void fork_start(void)
273{
274}
275
276void fork_end(int child)
277{
2b1319c8
AJ		 278 if (child) {
279 gdbserver_fork(thread_env);
280 }
d5975363 281}
c2764719
PB		 282
283void cpu_list_lock(void)
284{
285}
286
287void cpu_list_unlock(void)
288{
289}
d5975363
PB		 290#endif
291
292
a541f297
FB		 293#ifdef TARGET_I386
294/***********************************************************/
295/* CPUX86 core interface */
296
02a1602e
FB		 297void cpu_smm_update(CPUState *env)
298{
299}
300
28ab0e2e
FB		 301uint64_t cpu_get_tsc(CPUX86State *env)
302{
303 return cpu_get_real_ticks();
304}
305
5fafdf24 306static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 307 int flags)
6dbad63e 308{
f4beb510 309 unsigned int e1, e2;
53a5960a 310 uint32_t *p;
6dbad63e
FB		 311 e1 = (addr << 16) | (limit & 0xffff);
312 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 313 e2 |= flags;
53a5960a 314 p = ptr;
d538e8f5 315 p[0] = tswap32(e1);
316 p[1] = tswap32(e2);
f4beb510
FB		 317}
318
e441570f 319static uint64_t *idt_table;
eb38c52c 320#ifdef TARGET_X86_64
d2fd1af7
FB		 321static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
322 uint64_t addr, unsigned int sel)
f4beb510 323{
4dbc422b 324 uint32_t *p, e1, e2;
f4beb510
FB		 325 e1 = (addr & 0xffff) | (sel << 16);
326 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 327 p = ptr;
4dbc422b
FB		 328 p[0] = tswap32(e1);
329 p[1] = tswap32(e2);
330 p[2] = tswap32(addr >> 32);
331 p[3] = 0;
6dbad63e 332}
d2fd1af7
FB		 333/* only dpl matters as we do only user space emulation */
334static void set_idt(int n, unsigned int dpl)
335{
336 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
337}
338#else
d2fd1af7
FB		 339static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
340 uint32_t addr, unsigned int sel)
341{
4dbc422b 342 uint32_t *p, e1, e2;
d2fd1af7
FB		 343 e1 = (addr & 0xffff) | (sel << 16);
344 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
345 p = ptr;
4dbc422b
FB		 346 p[0] = tswap32(e1);
347 p[1] = tswap32(e2);
d2fd1af7
FB		 348}
349
f4beb510
FB		 350/* only dpl matters as we do only user space emulation */
351static void set_idt(int n, unsigned int dpl)
352{
353 set_gate(idt_table + n, 0, dpl, 0, 0);
354}
d2fd1af7 355#endif
31e31b8a 356
89e957e7 357void cpu_loop(CPUX86State *env)
1b6b029e 358{
bc8a22cc 359 int trapnr;
992f48a0 360 abi_ulong pc;
9de5e440 361 target_siginfo_t info;
851e67a1 362
1b6b029e 363 for(;;) {
bc8a22cc 364 trapnr = cpu_x86_exec(env);
bc8a22cc 365 switch(trapnr) {
f4beb510 366 case 0x80:
d2fd1af7 367 /* linux syscall from int $0x80 */
5fafdf24
TS		 368 env->regs[R_EAX] = do_syscall(env,
369 env->regs[R_EAX],
f4beb510
FB		 370 env->regs[R_EBX],
371 env->regs[R_ECX],
372 env->regs[R_EDX],
373 env->regs[R_ESI],
374 env->regs[R_EDI],
375 env->regs[R_EBP]);
376 break;
d2fd1af7
FB		 377#ifndef TARGET_ABI32
378 case EXCP_SYSCALL:
379 /* linux syscall from syscall intruction */
380 env->regs[R_EAX] = do_syscall(env,
381 env->regs[R_EAX],
382 env->regs[R_EDI],
383 env->regs[R_ESI],
384 env->regs[R_EDX],
385 env->regs[10],
386 env->regs[8],
387 env->regs[9]);
388 env->eip = env->exception_next_eip;
389 break;
390#endif
f4beb510
FB		 391 case EXCP0B_NOSEG:
392 case EXCP0C_STACK:
393 info.si_signo = SIGBUS;
394 info.si_errno = 0;
395 info.si_code = TARGET_SI_KERNEL;
396 info._sifields._sigfault._addr = 0;
624f7979 397 queue_signal(env, info.si_signo, &info);
f4beb510 398 break;
1b6b029e 399 case EXCP0D_GPF:
d2fd1af7 400 /* XXX: potential problem if ABI32 */
84409ddb 401#ifndef TARGET_X86_64
851e67a1 402 if (env->eflags & VM_MASK) {
89e957e7 403 handle_vm86_fault(env);
84409ddb
JM		 404 } else
405#endif
406 {
f4beb510
FB		 407 info.si_signo = SIGSEGV;
408 info.si_errno = 0;
409 info.si_code = TARGET_SI_KERNEL;
410 info._sifields._sigfault._addr = 0;
624f7979 411 queue_signal(env, info.si_signo, &info);
1b6b029e
FB		 412 }
413 break;
b689bc57
FB		 414 case EXCP0E_PAGE:
415 info.si_signo = SIGSEGV;
416 info.si_errno = 0;
417 if (!(env->error_code & 1))
418 info.si_code = TARGET_SEGV_MAPERR;
419 else
420 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 421 info._sifields._sigfault._addr = env->cr[2];
624f7979 422 queue_signal(env, info.si_signo, &info);
b689bc57 423 break;
9de5e440 424 case EXCP00_DIVZ:
84409ddb 425#ifndef TARGET_X86_64
bc8a22cc 426 if (env->eflags & VM_MASK) {
447db213 427 handle_vm86_trap(env, trapnr);
84409ddb
JM		 428 } else
429#endif
430 {
bc8a22cc
FB		 431 /* division by zero */
432 info.si_signo = SIGFPE;
433 info.si_errno = 0;
434 info.si_code = TARGET_FPE_INTDIV;
435 info._sifields._sigfault._addr = env->eip;
624f7979 436 queue_signal(env, info.si_signo, &info);
bc8a22cc 437 }
9de5e440 438 break;
01df040b 439 case EXCP01_DB:
447db213 440 case EXCP03_INT3:
84409ddb 441#ifndef TARGET_X86_64
447db213
FB		 442 if (env->eflags & VM_MASK) {
443 handle_vm86_trap(env, trapnr);
84409ddb
JM		 444 } else
445#endif
446 {
447db213
FB		 447 info.si_signo = SIGTRAP;
448 info.si_errno = 0;
01df040b 449 if (trapnr == EXCP01_DB) {
447db213
FB		 450 info.si_code = TARGET_TRAP_BRKPT;
451 info._sifields._sigfault._addr = env->eip;
452 } else {
453 info.si_code = TARGET_SI_KERNEL;
454 info._sifields._sigfault._addr = 0;
455 }
624f7979 456 queue_signal(env, info.si_signo, &info);
447db213
FB		 457 }
458 break;
9de5e440
FB		 459 case EXCP04_INTO:
460 case EXCP05_BOUND:
84409ddb 461#ifndef TARGET_X86_64
bc8a22cc 462 if (env->eflags & VM_MASK) {
447db213 463 handle_vm86_trap(env, trapnr);
84409ddb
JM		 464 } else
465#endif
466 {
bc8a22cc
FB		 467 info.si_signo = SIGSEGV;
468 info.si_errno = 0;
b689bc57 469 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 470 info._sifields._sigfault._addr = 0;
624f7979 471 queue_signal(env, info.si_signo, &info);
bc8a22cc 472 }
9de5e440
FB		 473 break;
474 case EXCP06_ILLOP:
475 info.si_signo = SIGILL;
476 info.si_errno = 0;
477 info.si_code = TARGET_ILL_ILLOPN;
478 info._sifields._sigfault._addr = env->eip;
624f7979 479 queue_signal(env, info.si_signo, &info);
9de5e440
FB		 480 break;
481 case EXCP_INTERRUPT:
482 /* just indicate that signals should be handled asap */
483 break;
1fddef4b
FB		 484 case EXCP_DEBUG:
485 {
486 int sig;
487
488 sig = gdb_handlesig (env, TARGET_SIGTRAP);
489 if (sig)
490 {
491 info.si_signo = sig;
492 info.si_errno = 0;
493 info.si_code = TARGET_TRAP_BRKPT;
624f7979 494 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 495 }
496 }
497 break;
1b6b029e 498 default:
970a87a6 499 pc = env->segs[R_CS].base + env->eip;
5fafdf24 500 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
bc8a22cc 501 (long)pc, trapnr);
1b6b029e
FB		 502 abort();
503 }
66fb9763 504 process_pending_signals(env);
1b6b029e
FB		 505 }
506}
b346ff46
FB		 507#endif
508
509#ifdef TARGET_ARM
510
992f48a0 511static void arm_cache_flush(abi_ulong start, abi_ulong last)
6f1f31c0 512{
992f48a0 513 abi_ulong addr, last1;
6f1f31c0
FB		 514
515 if (last < start)
516 return;
517 addr = start;
518 for(;;) {
519 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
520 if (last1 > last)
521 last1 = last;
522 tb_invalidate_page_range(addr, last1 + 1);
523 if (last1 == last)
524 break;
525 addr = last1 + 1;
526 }
527}
528
fbb4a2e3
PB		 529/* Handle a jump to the kernel code page. */
530static int
531do_kernel_trap(CPUARMState *env)
532{
533 uint32_t addr;
534 uint32_t cpsr;
535 uint32_t val;
536
537 switch (env->regs[15]) {
538 case 0xffff0fa0: /* __kernel_memory_barrier */
539 /* ??? No-op. Will need to do better for SMP. */
540 break;
541 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 542 /* XXX: This only works between threads, not between processes.
543 It's probably possible to implement this with native host
544 operations. However things like ldrex/strex are much harder so
545 there's not much point trying. */
546 start_exclusive();
fbb4a2e3
PB		 547 cpsr = cpsr_read(env);
548 addr = env->regs[2];
549 /* FIXME: This should SEGV if the access fails. */
550 if (get_user_u32(val, addr))
551 val = ~env->regs[0];
552 if (val == env->regs[0]) {
553 val = env->regs[1];
554 /* FIXME: Check for segfaults. */
555 put_user_u32(val, addr);
556 env->regs[0] = 0;
557 cpsr |= CPSR_C;
558 } else {
559 env->regs[0] = -1;
560 cpsr &= ~CPSR_C;
561 }
562 cpsr_write(env, cpsr, CPSR_C);
d5975363 563 end_exclusive();
fbb4a2e3
PB		 564 break;
565 case 0xffff0fe0: /* __kernel_get_tls */
566 env->regs[0] = env->cp15.c13_tls2;
567 break;
568 default:
569 return 1;
570 }
571 /* Jump back to the caller. */
572 addr = env->regs[14];
573 if (addr & 1) {
574 env->thumb = 1;
575 addr &= ~1;
576 }
577 env->regs[15] = addr;
578
579 return 0;
580}
581
b346ff46
FB		 582void cpu_loop(CPUARMState *env)
583{
584 int trapnr;
585 unsigned int n, insn;
586 target_siginfo_t info;
b5ff1b31 587 uint32_t addr;
3b46e624 588
b346ff46 589 for(;;) {
d5975363 590 cpu_exec_start(env);
b346ff46 591 trapnr = cpu_arm_exec(env);
d5975363 592 cpu_exec_end(env);
b346ff46
FB		 593 switch(trapnr) {
594 case EXCP_UDEF:
c6981055
FB		 595 {
596 TaskState *ts = env->opaque;
597 uint32_t opcode;
6d9a42be 598 int rc;
c6981055
FB		 599
600 /* we handle the FPU emulation here, as Linux */
601 /* we get the opcode */
2f619698
FB		 602 /* FIXME - what to do if get_user() fails? */
603 get_user_u32(opcode, env->regs[15]);
3b46e624 604
6d9a42be
AJ		 605 rc = EmulateAll(opcode, &ts->fpa, env);
606 if (rc == 0) { /* illegal instruction */
c6981055
FB		 607 info.si_signo = SIGILL;
608 info.si_errno = 0;
609 info.si_code = TARGET_ILL_ILLOPN;
610 info._sifields._sigfault._addr = env->regs[15];
624f7979 611 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 612 } else if (rc < 0) { /* FP exception */
613 int arm_fpe=0;
614
615 /* translate softfloat flags to FPSR flags */
616 if (-rc & float_flag_invalid)
617 arm_fpe |= BIT_IOC;
618 if (-rc & float_flag_divbyzero)
619 arm_fpe |= BIT_DZC;
620 if (-rc & float_flag_overflow)
621 arm_fpe |= BIT_OFC;
622 if (-rc & float_flag_underflow)
623 arm_fpe |= BIT_UFC;
624 if (-rc & float_flag_inexact)
625 arm_fpe |= BIT_IXC;
626
627 FPSR fpsr = ts->fpa.fpsr;
628 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
629
630 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
631 info.si_signo = SIGFPE;
632 info.si_errno = 0;
633
634 /* ordered by priority, least first */
635 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
636 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
637 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
638 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
639 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
640
641 info._sifields._sigfault._addr = env->regs[15];
624f7979 642 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 643 } else {
644 env->regs[15] += 4;
645 }
646
647 /* accumulate unenabled exceptions */
648 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
649 fpsr |= BIT_IXC;
650 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
651 fpsr |= BIT_UFC;
652 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
653 fpsr |= BIT_OFC;
654 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
655 fpsr |= BIT_DZC;
656 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
657 fpsr |= BIT_IOC;
658 ts->fpa.fpsr=fpsr;
659 } else { /* everything OK */
c6981055
FB		 660 /* increment PC */
661 env->regs[15] += 4;
662 }
663 }
b346ff46
FB		 664 break;
665 case EXCP_SWI:
06c949e6 666 case EXCP_BKPT:
b346ff46 667 {
ce4defa0 668 env->eabi = 1;
b346ff46 669 /* system call */
06c949e6
PB		 670 if (trapnr == EXCP_BKPT) {
671 if (env->thumb) {
2f619698
FB		 672 /* FIXME - what to do if get_user() fails? */
673 get_user_u16(insn, env->regs[15]);
06c949e6
PB		 674 n = insn & 0xff;
675 env->regs[15] += 2;
676 } else {
2f619698
FB		 677 /* FIXME - what to do if get_user() fails? */
678 get_user_u32(insn, env->regs[15]);
06c949e6
PB		 679 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
680 env->regs[15] += 4;
681 }
192c7bd9 682 } else {
06c949e6 683 if (env->thumb) {
2f619698
FB		 684 /* FIXME - what to do if get_user() fails? */
685 get_user_u16(insn, env->regs[15] - 2);
06c949e6
PB		 686 n = insn & 0xff;
687 } else {
2f619698
FB		 688 /* FIXME - what to do if get_user() fails? */
689 get_user_u32(insn, env->regs[15] - 4);
06c949e6
PB		 690 n = insn & 0xffffff;
691 }
192c7bd9
FB		 692 }
693
6f1f31c0
FB		 694 if (n == ARM_NR_cacheflush) {
695 arm_cache_flush(env->regs[0], env->regs[1]);
a4f81979
FB		 696 } else if (n == ARM_NR_semihosting
697 || n == ARM_NR_thumb_semihosting) {
698 env->regs[0] = do_arm_semihosting (env);
ce4defa0 699 } else if (n == 0 || n >= ARM_SYSCALL_BASE
192c7bd9 700 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
b346ff46 701 /* linux syscall */
ce4defa0 702 if (env->thumb || n == 0) {
192c7bd9
FB		 703 n = env->regs[7];
704 } else {
705 n -= ARM_SYSCALL_BASE;
ce4defa0 706 env->eabi = 0;
192c7bd9 707 }
fbb4a2e3
PB		 708 if ( n > ARM_NR_BASE) {
709 switch (n) {
710 case ARM_NR_cacheflush:
711 arm_cache_flush(env->regs[0], env->regs[1]);
712 break;
713 case ARM_NR_set_tls:
714 cpu_set_tls(env, env->regs[0]);
715 env->regs[0] = 0;
716 break;
717 default:
718 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
719 n);
720 env->regs[0] = -TARGET_ENOSYS;
721 break;
722 }
723 } else {
724 env->regs[0] = do_syscall(env,
725 n,
726 env->regs[0],
727 env->regs[1],
728 env->regs[2],
729 env->regs[3],
730 env->regs[4],
731 env->regs[5]);
732 }
b346ff46
FB		 733 } else {
734 goto error;
735 }
736 }
737 break;
43fff238
FB		 738 case EXCP_INTERRUPT:
739 /* just indicate that signals should be handled asap */
740 break;
68016c62 741 case EXCP_PREFETCH_ABORT:
eae473c1 742 addr = env->cp15.c6_insn;
b5ff1b31 743 goto do_segv;
68016c62 744 case EXCP_DATA_ABORT:
eae473c1 745 addr = env->cp15.c6_data;
b5ff1b31
FB		 746 goto do_segv;
747 do_segv:
68016c62
FB		 748 {
749 info.si_signo = SIGSEGV;
750 info.si_errno = 0;
751 /* XXX: check env->error_code */
752 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 753 info._sifields._sigfault._addr = addr;
624f7979 754 queue_signal(env, info.si_signo, &info);
68016c62
FB		 755 }
756 break;
1fddef4b
FB		 757 case EXCP_DEBUG:
758 {
759 int sig;
760
761 sig = gdb_handlesig (env, TARGET_SIGTRAP);
762 if (sig)
763 {
764 info.si_signo = sig;
765 info.si_errno = 0;
766 info.si_code = TARGET_TRAP_BRKPT;
624f7979 767 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 768 }
769 }
770 break;
fbb4a2e3
PB		 771 case EXCP_KERNEL_TRAP:
772 if (do_kernel_trap(env))
773 goto error;
774 break;
b346ff46
FB		 775 default:
776 error:
5fafdf24 777 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
b346ff46 778 trapnr);
7fe48483 779 cpu_dump_state(env, stderr, fprintf, 0);
b346ff46
FB		 780 abort();
781 }
782 process_pending_signals(env);
783 }
784}
785
786#endif
1b6b029e 787
93ac68bc 788#ifdef TARGET_SPARC
ed23fbd9 789#define SPARC64_STACK_BIAS 2047
93ac68bc 790
060366c5
FB		 791//#define DEBUG_WIN
792
2623cbaf
FB		 793/* WARNING: dealing with register windows _is_ complicated. More info
794 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 795static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
796{
1a14026e 797 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 798 /* wrap handling : if cwp is on the last window, then we use the
799 registers 'after' the end */
1a14026e
BS		 800 if (index < 8 && env->cwp == env->nwindows - 1)
801 index += 16 * env->nwindows;
060366c5
FB		 802 return index;
803}
804
2623cbaf
FB		 805/* save the register window 'cwp1' */
806static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 807{
2623cbaf 808 unsigned int i;
992f48a0 809 abi_ulong sp_ptr;
3b46e624 810
53a5960a 811 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 812#ifdef TARGET_SPARC64
813 if (sp_ptr & 3)
814 sp_ptr += SPARC64_STACK_BIAS;
815#endif
060366c5 816#if defined(DEBUG_WIN)
2daf0284
BS		 817 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
818 sp_ptr, cwp1);
060366c5 819#endif
2623cbaf 820 for(i = 0; i < 16; i++) {
2f619698
FB		 821 /* FIXME - what to do if put_user() fails? */
822 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 823 sp_ptr += sizeof(abi_ulong);
2623cbaf 824 }
060366c5
FB		 825}
826
827static void save_window(CPUSPARCState *env)
828{
5ef54116 829#ifndef TARGET_SPARC64
2623cbaf 830 unsigned int new_wim;
1a14026e
BS		 831 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
832 ((1LL << env->nwindows) - 1);
833 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 834 env->wim = new_wim;
5ef54116 835#else
1a14026e 836 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 837 env->cansave++;
838 env->canrestore--;
839#endif
060366c5
FB		 840}
841
842static void restore_window(CPUSPARCState *env)
843{
eda52953
BS		 844#ifndef TARGET_SPARC64
845 unsigned int new_wim;
846#endif
847 unsigned int i, cwp1;
992f48a0 848 abi_ulong sp_ptr;
3b46e624 849
eda52953 850#ifndef TARGET_SPARC64
1a14026e
BS		 851 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
852 ((1LL << env->nwindows) - 1);
eda52953 853#endif
3b46e624 854
060366c5 855 /* restore the invalid window */
1a14026e 856 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 857 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 858#ifdef TARGET_SPARC64
859 if (sp_ptr & 3)
860 sp_ptr += SPARC64_STACK_BIAS;
861#endif
060366c5 862#if defined(DEBUG_WIN)
2daf0284
BS		 863 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
864 sp_ptr, cwp1);
060366c5 865#endif
2623cbaf 866 for(i = 0; i < 16; i++) {
2f619698
FB		 867 /* FIXME - what to do if get_user() fails? */
868 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 869 sp_ptr += sizeof(abi_ulong);
2623cbaf 870 }
5ef54116
FB		 871#ifdef TARGET_SPARC64
872 env->canrestore++;
1a14026e
BS		 873 if (env->cleanwin < env->nwindows - 1)
874 env->cleanwin++;
5ef54116 875 env->cansave--;
eda52953
BS		 876#else
877 env->wim = new_wim;
5ef54116 878#endif
060366c5
FB		 879}
880
881static void flush_windows(CPUSPARCState *env)
882{
883 int offset, cwp1;
2623cbaf
FB		 884
885 offset = 1;
060366c5
FB		 886 for(;;) {
887 /* if restore would invoke restore_window(), then we can stop */
1a14026e 888 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 889#ifndef TARGET_SPARC64
060366c5
FB		 890 if (env->wim & (1 << cwp1))
891 break;
eda52953
BS		 892#else
893 if (env->canrestore == 0)
894 break;
895 env->cansave++;
896 env->canrestore--;
897#endif
2623cbaf 898 save_window_offset(env, cwp1);
060366c5
FB		 899 offset++;
900 }
1a14026e 901 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 902#ifndef TARGET_SPARC64
903 /* set wim so that restore will reload the registers */
2623cbaf 904 env->wim = 1 << cwp1;
eda52953 905#endif
2623cbaf
FB		 906#if defined(DEBUG_WIN)
907 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 908#endif
2623cbaf 909}
060366c5 910
93ac68bc
FB		 911void cpu_loop (CPUSPARCState *env)
912{
060366c5 913 int trapnr, ret;
61ff6f58 914 target_siginfo_t info;
3b46e624 915
060366c5
FB		 916 while (1) {
917 trapnr = cpu_sparc_exec (env);
3b46e624 918
060366c5 919 switch (trapnr) {
5ef54116 920#ifndef TARGET_SPARC64
5fafdf24 921 case 0x88:
060366c5 922 case 0x90:
5ef54116 923#else
cb33da57 924 case 0x110:
5ef54116
FB		 925 case 0x16d:
926#endif
060366c5 927 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 928 env->regwptr[0], env->regwptr[1],
929 env->regwptr[2], env->regwptr[3],
060366c5
FB		 930 env->regwptr[4], env->regwptr[5]);
931 if ((unsigned int)ret >= (unsigned int)(-515)) {
992f48a0 932#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 933 env->xcc |= PSR_CARRY;
934#else
060366c5 935 env->psr |= PSR_CARRY;
27908725 936#endif
060366c5
FB		 937 ret = -ret;
938 } else {
992f48a0 939#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 940 env->xcc &= ~PSR_CARRY;
941#else
060366c5 942 env->psr &= ~PSR_CARRY;
27908725 943#endif
060366c5
FB		 944 }
945 env->regwptr[0] = ret;
946 /* next instruction */
947 env->pc = env->npc;
948 env->npc = env->npc + 4;
949 break;
950 case 0x83: /* flush windows */
992f48a0
BS		 951#ifdef TARGET_ABI32
952 case 0x103:
953#endif
2623cbaf 954 flush_windows(env);
060366c5
FB		 955 /* next instruction */
956 env->pc = env->npc;
957 env->npc = env->npc + 4;
958 break;
3475187d 959#ifndef TARGET_SPARC64
060366c5
FB		 960 case TT_WIN_OVF: /* window overflow */
961 save_window(env);
962 break;
963 case TT_WIN_UNF: /* window underflow */
964 restore_window(env);
965 break;
61ff6f58
FB		 966 case TT_TFAULT:
967 case TT_DFAULT:
968 {
969 info.si_signo = SIGSEGV;
970 info.si_errno = 0;
971 /* XXX: check env->error_code */
972 info.si_code = TARGET_SEGV_MAPERR;
973 info._sifields._sigfault._addr = env->mmuregs[4];
624f7979 974 queue_signal(env, info.si_signo, &info);
61ff6f58
FB		 975 }
976 break;
3475187d 977#else
5ef54116
FB		 978 case TT_SPILL: /* window overflow */
979 save_window(env);
980 break;
981 case TT_FILL: /* window underflow */
982 restore_window(env);
983 break;
7f84a729
BS		 984 case TT_TFAULT:
985 case TT_DFAULT:
986 {
987 info.si_signo = SIGSEGV;
988 info.si_errno = 0;
989 /* XXX: check env->error_code */
990 info.si_code = TARGET_SEGV_MAPERR;
991 if (trapnr == TT_DFAULT)
992 info._sifields._sigfault._addr = env->dmmuregs[4];
993 else
375ee38b 994 info._sifields._sigfault._addr = env->tsptr->tpc;
624f7979 995 queue_signal(env, info.si_signo, &info);
7f84a729
BS		 996 }
997 break;
27524dc3 998#ifndef TARGET_ABI32
5bfb56b2
BS		 999 case 0x16e:
1000 flush_windows(env);
1001 sparc64_get_context(env);
1002 break;
1003 case 0x16f:
1004 flush_windows(env);
1005 sparc64_set_context(env);
1006 break;
27524dc3 1007#endif
3475187d 1008#endif
48dc41eb
FB		 1009 case EXCP_INTERRUPT:
1010 /* just indicate that signals should be handled asap */
1011 break;
1fddef4b
FB		 1012 case EXCP_DEBUG:
1013 {
1014 int sig;
1015
1016 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1017 if (sig)
1018 {
1019 info.si_signo = sig;
1020 info.si_errno = 0;
1021 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1022 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 1023 }
1024 }
1025 break;
060366c5
FB		 1026 default:
1027 printf ("Unhandled trap: 0x%x\n", trapnr);
7fe48483 1028 cpu_dump_state(env, stderr, fprintf, 0);
060366c5
FB		 1029 exit (1);
1030 }
1031 process_pending_signals (env);
1032 }
93ac68bc
FB		 1033}
1034
1035#endif
1036
67867308 1037#ifdef TARGET_PPC
9fddaa0c
FB		 1038static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1039{
1040 /* TO FIX */
1041 return 0;
1042}
3b46e624 1043
9fddaa0c
FB		 1044uint32_t cpu_ppc_load_tbl (CPUState *env)
1045{
1046 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1047}
3b46e624 1048
9fddaa0c
FB		 1049uint32_t cpu_ppc_load_tbu (CPUState *env)
1050{
1051 return cpu_ppc_get_tb(env) >> 32;
1052}
3b46e624 1053
a062e36c 1054uint32_t cpu_ppc_load_atbl (CPUState *env)
9fddaa0c 1055{
a062e36c 1056 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
9fddaa0c 1057}
5fafdf24 1058
a062e36c 1059uint32_t cpu_ppc_load_atbu (CPUState *env)
9fddaa0c 1060{
a062e36c 1061 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1062}
76a66253 1063
76a66253
JM		 1064uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1065__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1066
76a66253 1067uint32_t cpu_ppc601_load_rtcl (CPUState *env)
9fddaa0c 1068{
76a66253 1069 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1070}
76a66253 1071
a750fc0b
JM		 1072/* XXX: to be fixed */
1073int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1074{
1075 return -1;
1076}
1077
1078int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1079{
1080 return -1;
1081}
1082
001faf32
BS		 1083#define EXCP_DUMP(env, fmt, ...) \
1084do { \
1085 fprintf(stderr, fmt , ## __VA_ARGS__); \
1086 cpu_dump_state(env, stderr, fprintf, 0); \
1087 qemu_log(fmt, ## __VA_ARGS__); \
1088 log_cpu_state(env, 0); \
e1833e1f
JM		 1089} while (0)
1090
67867308
FB		 1091void cpu_loop(CPUPPCState *env)
1092{
67867308 1093 target_siginfo_t info;
61190b14
FB		 1094 int trapnr;
1095 uint32_t ret;
3b46e624 1096
67867308
FB		 1097 for(;;) {
1098 trapnr = cpu_ppc_exec(env);
1099 switch(trapnr) {
e1833e1f
JM		 1100 case POWERPC_EXCP_NONE:
1101 /* Just go on */
67867308 1102 break;
e1833e1f
JM		 1103 case POWERPC_EXCP_CRITICAL: /* Critical input */
1104 cpu_abort(env, "Critical interrupt while in user mode. "
1105 "Aborting\n");
61190b14 1106 break;
e1833e1f
JM		 1107 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1108 cpu_abort(env, "Machine check exception while in user mode. "
1109 "Aborting\n");
1110 break;
1111 case POWERPC_EXCP_DSI: /* Data storage exception */
1112 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1113 env->spr[SPR_DAR]);
1114 /* XXX: check this. Seems bugged */
2be0071f
FB		 1115 switch (env->error_code & 0xFF000000) {
1116 case 0x40000000:
61190b14
FB		 1117 info.si_signo = TARGET_SIGSEGV;
1118 info.si_errno = 0;
1119 info.si_code = TARGET_SEGV_MAPERR;
1120 break;
2be0071f 1121 case 0x04000000:
61190b14
FB		 1122 info.si_signo = TARGET_SIGILL;
1123 info.si_errno = 0;
1124 info.si_code = TARGET_ILL_ILLADR;
1125 break;
2be0071f 1126 case 0x08000000:
61190b14
FB		 1127 info.si_signo = TARGET_SIGSEGV;
1128 info.si_errno = 0;
1129 info.si_code = TARGET_SEGV_ACCERR;
1130 break;
61190b14
FB		 1131 default:
1132 /* Let's send a regular segfault... */
e1833e1f
JM		 1133 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1134 env->error_code);
61190b14
FB		 1135 info.si_signo = TARGET_SIGSEGV;
1136 info.si_errno = 0;
1137 info.si_code = TARGET_SEGV_MAPERR;
1138 break;
1139 }
67867308 1140 info._sifields._sigfault._addr = env->nip;
624f7979 1141 queue_signal(env, info.si_signo, &info);
67867308 1142 break;
e1833e1f
JM		 1143 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1144 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
f10c315f 1145 env->spr[SPR_SRR0]);
e1833e1f 1146 /* XXX: check this */
2be0071f
FB		 1147 switch (env->error_code & 0xFF000000) {
1148 case 0x40000000:
61190b14 1149 info.si_signo = TARGET_SIGSEGV;
67867308 1150 info.si_errno = 0;
61190b14
FB		 1151 info.si_code = TARGET_SEGV_MAPERR;
1152 break;
2be0071f
FB		 1153 case 0x10000000:
1154 case 0x08000000:
61190b14
FB		 1155 info.si_signo = TARGET_SIGSEGV;
1156 info.si_errno = 0;
1157 info.si_code = TARGET_SEGV_ACCERR;
1158 break;
1159 default:
1160 /* Let's send a regular segfault... */
e1833e1f
JM		 1161 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1162 env->error_code);
61190b14
FB		 1163 info.si_signo = TARGET_SIGSEGV;
1164 info.si_errno = 0;
1165 info.si_code = TARGET_SEGV_MAPERR;
1166 break;
1167 }
1168 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1169 queue_signal(env, info.si_signo, &info);
67867308 1170 break;
e1833e1f
JM		 1171 case POWERPC_EXCP_EXTERNAL: /* External input */
1172 cpu_abort(env, "External interrupt while in user mode. "
1173 "Aborting\n");
1174 break;
1175 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1176 EXCP_DUMP(env, "Unaligned memory access\n");
1177 /* XXX: check this */
61190b14 1178 info.si_signo = TARGET_SIGBUS;
67867308 1179 info.si_errno = 0;
61190b14
FB		 1180 info.si_code = TARGET_BUS_ADRALN;
1181 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1182 queue_signal(env, info.si_signo, &info);
67867308 1183 break;
e1833e1f
JM		 1184 case POWERPC_EXCP_PROGRAM: /* Program exception */
1185 /* XXX: check this */
61190b14 1186 switch (env->error_code & ~0xF) {
e1833e1f
JM		 1187 case POWERPC_EXCP_FP:
1188 EXCP_DUMP(env, "Floating point program exception\n");
61190b14
FB		 1189 info.si_signo = TARGET_SIGFPE;
1190 info.si_errno = 0;
1191 switch (env->error_code & 0xF) {
e1833e1f 1192 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1193 info.si_code = TARGET_FPE_FLTOVF;
1194 break;
e1833e1f 1195 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1196 info.si_code = TARGET_FPE_FLTUND;
1197 break;
e1833e1f
JM		 1198 case POWERPC_EXCP_FP_ZX:
1199 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1200 info.si_code = TARGET_FPE_FLTDIV;
1201 break;
e1833e1f 1202 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1203 info.si_code = TARGET_FPE_FLTRES;
1204 break;
e1833e1f 1205 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1206 info.si_code = TARGET_FPE_FLTINV;
1207 break;
7c58044c 1208 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1209 case POWERPC_EXCP_FP_VXISI:
1210 case POWERPC_EXCP_FP_VXIDI:
1211 case POWERPC_EXCP_FP_VXIMZ:
1212 case POWERPC_EXCP_FP_VXVC:
1213 case POWERPC_EXCP_FP_VXSQRT:
1214 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1215 info.si_code = TARGET_FPE_FLTSUB;
1216 break;
1217 default:
e1833e1f
JM		 1218 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1219 env->error_code);
1220 break;
61190b14 1221 }
e1833e1f
JM		 1222 break;
1223 case POWERPC_EXCP_INVAL:
1224 EXCP_DUMP(env, "Invalid instruction\n");
61190b14
FB		 1225 info.si_signo = TARGET_SIGILL;
1226 info.si_errno = 0;
1227 switch (env->error_code & 0xF) {
e1833e1f 1228 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1229 info.si_code = TARGET_ILL_ILLOPC;
1230 break;
e1833e1f 1231 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1232 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1233 break;
e1833e1f 1234 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1235 info.si_code = TARGET_ILL_PRVREG;
1236 break;
e1833e1f 1237 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1238 info.si_code = TARGET_ILL_COPROC;
1239 break;
1240 default:
e1833e1f
JM		 1241 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1242 env->error_code & 0xF);
61190b14
FB		 1243 info.si_code = TARGET_ILL_ILLADR;
1244 break;
1245 }
1246 break;
e1833e1f
JM		 1247 case POWERPC_EXCP_PRIV:
1248 EXCP_DUMP(env, "Privilege violation\n");
61190b14
FB		 1249 info.si_signo = TARGET_SIGILL;
1250 info.si_errno = 0;
1251 switch (env->error_code & 0xF) {
e1833e1f 1252 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1253 info.si_code = TARGET_ILL_PRVOPC;
1254 break;
e1833e1f 1255 case POWERPC_EXCP_PRIV_REG:
61190b14 1256 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1257 break;
61190b14 1258 default:
e1833e1f
JM		 1259 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1260 env->error_code & 0xF);
61190b14
FB		 1261 info.si_code = TARGET_ILL_PRVOPC;
1262 break;
1263 }
1264 break;
e1833e1f
JM		 1265 case POWERPC_EXCP_TRAP:
1266 cpu_abort(env, "Tried to call a TRAP\n");
1267 break;
61190b14
FB		 1268 default:
1269 /* Should not happen ! */
e1833e1f
JM		 1270 cpu_abort(env, "Unknown program exception (%02x)\n",
1271 env->error_code);
1272 break;
61190b14
FB		 1273 }
1274 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1275 queue_signal(env, info.si_signo, &info);
67867308 1276 break;
e1833e1f
JM		 1277 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1278 EXCP_DUMP(env, "No floating point allowed\n");
61190b14 1279 info.si_signo = TARGET_SIGILL;
67867308 1280 info.si_errno = 0;
61190b14
FB		 1281 info.si_code = TARGET_ILL_COPROC;
1282 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1283 queue_signal(env, info.si_signo, &info);
67867308 1284 break;
e1833e1f
JM		 1285 case POWERPC_EXCP_SYSCALL: /* System call exception */
1286 cpu_abort(env, "Syscall exception while in user mode. "
1287 "Aborting\n");
61190b14 1288 break;
e1833e1f
JM		 1289 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1290 EXCP_DUMP(env, "No APU instruction allowed\n");
1291 info.si_signo = TARGET_SIGILL;
1292 info.si_errno = 0;
1293 info.si_code = TARGET_ILL_COPROC;
1294 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1295 queue_signal(env, info.si_signo, &info);
61190b14 1296 break;
e1833e1f
JM		 1297 case POWERPC_EXCP_DECR: /* Decrementer exception */
1298 cpu_abort(env, "Decrementer interrupt while in user mode. "
1299 "Aborting\n");
61190b14 1300 break;
e1833e1f
JM		 1301 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1302 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1303 "Aborting\n");
1304 break;
1305 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1306 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1307 "Aborting\n");
1308 break;
1309 case POWERPC_EXCP_DTLB: /* Data TLB error */
1310 cpu_abort(env, "Data TLB exception while in user mode. "
1311 "Aborting\n");
1312 break;
1313 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1314 cpu_abort(env, "Instruction TLB exception while in user mode. "
1315 "Aborting\n");
1316 break;
e1833e1f
JM		 1317 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1318 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1319 info.si_signo = TARGET_SIGILL;
1320 info.si_errno = 0;
1321 info.si_code = TARGET_ILL_COPROC;
1322 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1323 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1324 break;
1325 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1326 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1327 break;
1328 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1329 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1330 break;
1331 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1332 cpu_abort(env, "Performance monitor exception not handled\n");
1333 break;
1334 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1335 cpu_abort(env, "Doorbell interrupt while in user mode. "
1336 "Aborting\n");
1337 break;
1338 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1339 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1340 "Aborting\n");
1341 break;
1342 case POWERPC_EXCP_RESET: /* System reset exception */
1343 cpu_abort(env, "Reset interrupt while in user mode. "
1344 "Aborting\n");
1345 break;
e1833e1f
JM		 1346 case POWERPC_EXCP_DSEG: /* Data segment exception */
1347 cpu_abort(env, "Data segment exception while in user mode. "
1348 "Aborting\n");
1349 break;
1350 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1351 cpu_abort(env, "Instruction segment exception "
1352 "while in user mode. Aborting\n");
1353 break;
e85e7c6e 1354 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1355 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1356 cpu_abort(env, "Hypervisor decrementer interrupt "
1357 "while in user mode. Aborting\n");
1358 break;
e1833e1f
JM		 1359 case POWERPC_EXCP_TRACE: /* Trace exception */
1360 /* Nothing to do:
1361 * we use this exception to emulate step-by-step execution mode.
1362 */
1363 break;
e85e7c6e 1364 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1365 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1366 cpu_abort(env, "Hypervisor data storage exception "
1367 "while in user mode. Aborting\n");
1368 break;
1369 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1370 cpu_abort(env, "Hypervisor instruction storage exception "
1371 "while in user mode. Aborting\n");
1372 break;
1373 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1374 cpu_abort(env, "Hypervisor data segment exception "
1375 "while in user mode. Aborting\n");
1376 break;
1377 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1378 cpu_abort(env, "Hypervisor instruction segment exception "
1379 "while in user mode. Aborting\n");
1380 break;
e1833e1f
JM		 1381 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1382 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1383 info.si_signo = TARGET_SIGILL;
1384 info.si_errno = 0;
1385 info.si_code = TARGET_ILL_COPROC;
1386 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1387 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1388 break;
1389 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1390 cpu_abort(env, "Programable interval timer interrupt "
1391 "while in user mode. Aborting\n");
1392 break;
1393 case POWERPC_EXCP_IO: /* IO error exception */
1394 cpu_abort(env, "IO error exception while in user mode. "
1395 "Aborting\n");
1396 break;
1397 case POWERPC_EXCP_RUNM: /* Run mode exception */
1398 cpu_abort(env, "Run mode exception while in user mode. "
1399 "Aborting\n");
1400 break;
1401 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1402 cpu_abort(env, "Emulation trap exception not handled\n");
1403 break;
1404 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1405 cpu_abort(env, "Instruction fetch TLB exception "
1406 "while in user-mode. Aborting");
1407 break;
1408 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1409 cpu_abort(env, "Data load TLB exception while in user-mode. "
1410 "Aborting");
1411 break;
1412 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1413 cpu_abort(env, "Data store TLB exception while in user-mode. "
1414 "Aborting");
1415 break;
1416 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1417 cpu_abort(env, "Floating-point assist exception not handled\n");
1418 break;
1419 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1420 cpu_abort(env, "Instruction address breakpoint exception "
1421 "not handled\n");
1422 break;
1423 case POWERPC_EXCP_SMI: /* System management interrupt */
1424 cpu_abort(env, "System management interrupt while in user mode. "
1425 "Aborting\n");
1426 break;
1427 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1428 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1429 "Aborting\n");
1430 break;
1431 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1432 cpu_abort(env, "Performance monitor exception not handled\n");
1433 break;
1434 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1435 cpu_abort(env, "Vector assist exception not handled\n");
1436 break;
1437 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1438 cpu_abort(env, "Soft patch exception not handled\n");
1439 break;
1440 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1441 cpu_abort(env, "Maintenance exception while in user mode. "
1442 "Aborting\n");
1443 break;
1444 case POWERPC_EXCP_STOP: /* stop translation */
1445 /* We did invalidate the instruction cache. Go on */
1446 break;
1447 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1448 /* We just stopped because of a branch. Go on */
1449 break;
1450 case POWERPC_EXCP_SYSCALL_USER:
1451 /* system call in user-mode emulation */
1452 /* WARNING:
1453 * PPC ABI uses overflow flag in cr0 to signal an error
1454 * in syscalls.
1455 */
1456#if 0
1457 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1458 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1459#endif
1460 env->crf[0] &= ~0x1;
1461 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1462 env->gpr[5], env->gpr[6], env->gpr[7],
1463 env->gpr[8]);
1464 if (ret > (uint32_t)(-515)) {
1465 env->crf[0] |= 0x1;
1466 ret = -ret;
61190b14 1467 }
e1833e1f
JM		 1468 env->gpr[3] = ret;
1469#if 0
1470 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1471#endif
1472 break;
71f75756
AJ		 1473 case EXCP_DEBUG:
1474 {
1475 int sig;
1476
1477 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1478 if (sig) {
1479 info.si_signo = sig;
1480 info.si_errno = 0;
1481 info.si_code = TARGET_TRAP_BRKPT;
1482 queue_signal(env, info.si_signo, &info);
1483 }
1484 }
1485 break;
56ba31ff
JM		 1486 case EXCP_INTERRUPT:
1487 /* just indicate that signals should be handled asap */
1488 break;
e1833e1f
JM		 1489 default:
1490 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1491 break;
67867308
FB		 1492 }
1493 process_pending_signals(env);
1494 }
1495}
1496#endif
1497
048f6b4d
FB		 1498#ifdef TARGET_MIPS
1499
1500#define MIPS_SYS(name, args) args,
1501
1502static const uint8_t mips_syscall_args[] = {
1503 MIPS_SYS(sys_syscall , 0) /* 4000 */
1504 MIPS_SYS(sys_exit , 1)
1505 MIPS_SYS(sys_fork , 0)
1506 MIPS_SYS(sys_read , 3)
1507 MIPS_SYS(sys_write , 3)
1508 MIPS_SYS(sys_open , 3) /* 4005 */
1509 MIPS_SYS(sys_close , 1)
1510 MIPS_SYS(sys_waitpid , 3)
1511 MIPS_SYS(sys_creat , 2)
1512 MIPS_SYS(sys_link , 2)
1513 MIPS_SYS(sys_unlink , 1) /* 4010 */
1514 MIPS_SYS(sys_execve , 0)
1515 MIPS_SYS(sys_chdir , 1)
1516 MIPS_SYS(sys_time , 1)
1517 MIPS_SYS(sys_mknod , 3)
1518 MIPS_SYS(sys_chmod , 2) /* 4015 */
1519 MIPS_SYS(sys_lchown , 3)
1520 MIPS_SYS(sys_ni_syscall , 0)
1521 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1522 MIPS_SYS(sys_lseek , 3)
1523 MIPS_SYS(sys_getpid , 0) /* 4020 */
1524 MIPS_SYS(sys_mount , 5)
1525 MIPS_SYS(sys_oldumount , 1)
1526 MIPS_SYS(sys_setuid , 1)
1527 MIPS_SYS(sys_getuid , 0)
1528 MIPS_SYS(sys_stime , 1) /* 4025 */
1529 MIPS_SYS(sys_ptrace , 4)
1530 MIPS_SYS(sys_alarm , 1)
1531 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1532 MIPS_SYS(sys_pause , 0)
1533 MIPS_SYS(sys_utime , 2) /* 4030 */
1534 MIPS_SYS(sys_ni_syscall , 0)
1535 MIPS_SYS(sys_ni_syscall , 0)
1536 MIPS_SYS(sys_access , 2)
1537 MIPS_SYS(sys_nice , 1)
1538 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1539 MIPS_SYS(sys_sync , 0)
1540 MIPS_SYS(sys_kill , 2)
1541 MIPS_SYS(sys_rename , 2)
1542 MIPS_SYS(sys_mkdir , 2)
1543 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1544 MIPS_SYS(sys_dup , 1)
1545 MIPS_SYS(sys_pipe , 0)
1546 MIPS_SYS(sys_times , 1)
1547 MIPS_SYS(sys_ni_syscall , 0)
1548 MIPS_SYS(sys_brk , 1) /* 4045 */
1549 MIPS_SYS(sys_setgid , 1)
1550 MIPS_SYS(sys_getgid , 0)
1551 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1552 MIPS_SYS(sys_geteuid , 0)
1553 MIPS_SYS(sys_getegid , 0) /* 4050 */
1554 MIPS_SYS(sys_acct , 0)
1555 MIPS_SYS(sys_umount , 2)
1556 MIPS_SYS(sys_ni_syscall , 0)
1557 MIPS_SYS(sys_ioctl , 3)
1558 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1559 MIPS_SYS(sys_ni_syscall , 2)
1560 MIPS_SYS(sys_setpgid , 2)
1561 MIPS_SYS(sys_ni_syscall , 0)
1562 MIPS_SYS(sys_olduname , 1)
1563 MIPS_SYS(sys_umask , 1) /* 4060 */
1564 MIPS_SYS(sys_chroot , 1)
1565 MIPS_SYS(sys_ustat , 2)
1566 MIPS_SYS(sys_dup2 , 2)
1567 MIPS_SYS(sys_getppid , 0)
1568 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1569 MIPS_SYS(sys_setsid , 0)
1570 MIPS_SYS(sys_sigaction , 3)
1571 MIPS_SYS(sys_sgetmask , 0)
1572 MIPS_SYS(sys_ssetmask , 1)
1573 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1574 MIPS_SYS(sys_setregid , 2)
1575 MIPS_SYS(sys_sigsuspend , 0)
1576 MIPS_SYS(sys_sigpending , 1)
1577 MIPS_SYS(sys_sethostname , 2)
1578 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1579 MIPS_SYS(sys_getrlimit , 2)
1580 MIPS_SYS(sys_getrusage , 2)
1581 MIPS_SYS(sys_gettimeofday, 2)
1582 MIPS_SYS(sys_settimeofday, 2)
1583 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1584 MIPS_SYS(sys_setgroups , 2)
1585 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1586 MIPS_SYS(sys_symlink , 2)
1587 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1588 MIPS_SYS(sys_readlink , 3) /* 4085 */
1589 MIPS_SYS(sys_uselib , 1)
1590 MIPS_SYS(sys_swapon , 2)
1591 MIPS_SYS(sys_reboot , 3)
1592 MIPS_SYS(old_readdir , 3)
1593 MIPS_SYS(old_mmap , 6) /* 4090 */
1594 MIPS_SYS(sys_munmap , 2)
1595 MIPS_SYS(sys_truncate , 2)
1596 MIPS_SYS(sys_ftruncate , 2)
1597 MIPS_SYS(sys_fchmod , 2)
1598 MIPS_SYS(sys_fchown , 3) /* 4095 */
1599 MIPS_SYS(sys_getpriority , 2)
1600 MIPS_SYS(sys_setpriority , 3)
1601 MIPS_SYS(sys_ni_syscall , 0)
1602 MIPS_SYS(sys_statfs , 2)
1603 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1604 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1605 MIPS_SYS(sys_socketcall , 2)
1606 MIPS_SYS(sys_syslog , 3)
1607 MIPS_SYS(sys_setitimer , 3)
1608 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1609 MIPS_SYS(sys_newstat , 2)
1610 MIPS_SYS(sys_newlstat , 2)
1611 MIPS_SYS(sys_newfstat , 2)
1612 MIPS_SYS(sys_uname , 1)
1613 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1614 MIPS_SYS(sys_vhangup , 0)
1615 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1616 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1617 MIPS_SYS(sys_wait4 , 4)
1618 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1619 MIPS_SYS(sys_sysinfo , 1)
1620 MIPS_SYS(sys_ipc , 6)
1621 MIPS_SYS(sys_fsync , 1)
1622 MIPS_SYS(sys_sigreturn , 0)
1623 MIPS_SYS(sys_clone , 0) /* 4120 */
1624 MIPS_SYS(sys_setdomainname, 2)
1625 MIPS_SYS(sys_newuname , 1)
1626 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1627 MIPS_SYS(sys_adjtimex , 1)
1628 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1629 MIPS_SYS(sys_sigprocmask , 3)
1630 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1631 MIPS_SYS(sys_init_module , 5)
1632 MIPS_SYS(sys_delete_module, 1)
1633 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1634 MIPS_SYS(sys_quotactl , 0)
1635 MIPS_SYS(sys_getpgid , 1)
1636 MIPS_SYS(sys_fchdir , 1)
1637 MIPS_SYS(sys_bdflush , 2)
1638 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1639 MIPS_SYS(sys_personality , 1)
1640 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1641 MIPS_SYS(sys_setfsuid , 1)
1642 MIPS_SYS(sys_setfsgid , 1)
1643 MIPS_SYS(sys_llseek , 5) /* 4140 */
1644 MIPS_SYS(sys_getdents , 3)
1645 MIPS_SYS(sys_select , 5)
1646 MIPS_SYS(sys_flock , 2)
1647 MIPS_SYS(sys_msync , 3)
1648 MIPS_SYS(sys_readv , 3) /* 4145 */
1649 MIPS_SYS(sys_writev , 3)
1650 MIPS_SYS(sys_cacheflush , 3)
1651 MIPS_SYS(sys_cachectl , 3)
1652 MIPS_SYS(sys_sysmips , 4)
1653 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1654 MIPS_SYS(sys_getsid , 1)
1655 MIPS_SYS(sys_fdatasync , 0)
1656 MIPS_SYS(sys_sysctl , 1)
1657 MIPS_SYS(sys_mlock , 2)
1658 MIPS_SYS(sys_munlock , 2) /* 4155 */
1659 MIPS_SYS(sys_mlockall , 1)
1660 MIPS_SYS(sys_munlockall , 0)
1661 MIPS_SYS(sys_sched_setparam, 2)
1662 MIPS_SYS(sys_sched_getparam, 2)
1663 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1664 MIPS_SYS(sys_sched_getscheduler, 1)
1665 MIPS_SYS(sys_sched_yield , 0)
1666 MIPS_SYS(sys_sched_get_priority_max, 1)
1667 MIPS_SYS(sys_sched_get_priority_min, 1)
1668 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1669 MIPS_SYS(sys_nanosleep, 2)
1670 MIPS_SYS(sys_mremap , 4)
1671 MIPS_SYS(sys_accept , 3)
1672 MIPS_SYS(sys_bind , 3)
1673 MIPS_SYS(sys_connect , 3) /* 4170 */
1674 MIPS_SYS(sys_getpeername , 3)
1675 MIPS_SYS(sys_getsockname , 3)
1676 MIPS_SYS(sys_getsockopt , 5)
1677 MIPS_SYS(sys_listen , 2)
1678 MIPS_SYS(sys_recv , 4) /* 4175 */
1679 MIPS_SYS(sys_recvfrom , 6)
1680 MIPS_SYS(sys_recvmsg , 3)
1681 MIPS_SYS(sys_send , 4)
1682 MIPS_SYS(sys_sendmsg , 3)
1683 MIPS_SYS(sys_sendto , 6) /* 4180 */
1684 MIPS_SYS(sys_setsockopt , 5)
1685 MIPS_SYS(sys_shutdown , 2)
1686 MIPS_SYS(sys_socket , 3)
1687 MIPS_SYS(sys_socketpair , 4)
1688 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1689 MIPS_SYS(sys_getresuid , 3)
1690 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1691 MIPS_SYS(sys_poll , 3)
1692 MIPS_SYS(sys_nfsservctl , 3)
1693 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1694 MIPS_SYS(sys_getresgid , 3)
1695 MIPS_SYS(sys_prctl , 5)
1696 MIPS_SYS(sys_rt_sigreturn, 0)
1697 MIPS_SYS(sys_rt_sigaction, 4)
1698 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1699 MIPS_SYS(sys_rt_sigpending, 2)
1700 MIPS_SYS(sys_rt_sigtimedwait, 4)
1701 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1702 MIPS_SYS(sys_rt_sigsuspend, 0)
1703 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1704 MIPS_SYS(sys_pwrite64 , 6)
1705 MIPS_SYS(sys_chown , 3)
1706 MIPS_SYS(sys_getcwd , 2)
1707 MIPS_SYS(sys_capget , 2)
1708 MIPS_SYS(sys_capset , 2) /* 4205 */
1709 MIPS_SYS(sys_sigaltstack , 0)
1710 MIPS_SYS(sys_sendfile , 4)
1711 MIPS_SYS(sys_ni_syscall , 0)
1712 MIPS_SYS(sys_ni_syscall , 0)
1713 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1714 MIPS_SYS(sys_truncate64 , 4)
1715 MIPS_SYS(sys_ftruncate64 , 4)
1716 MIPS_SYS(sys_stat64 , 2)
1717 MIPS_SYS(sys_lstat64 , 2)
1718 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1719 MIPS_SYS(sys_pivot_root , 2)
1720 MIPS_SYS(sys_mincore , 3)
1721 MIPS_SYS(sys_madvise , 3)
1722 MIPS_SYS(sys_getdents64 , 3)
1723 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1724 MIPS_SYS(sys_ni_syscall , 0)
1725 MIPS_SYS(sys_gettid , 0)
1726 MIPS_SYS(sys_readahead , 5)
1727 MIPS_SYS(sys_setxattr , 5)
1728 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1729 MIPS_SYS(sys_fsetxattr , 5)
1730 MIPS_SYS(sys_getxattr , 4)
1731 MIPS_SYS(sys_lgetxattr , 4)
1732 MIPS_SYS(sys_fgetxattr , 4)
1733 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1734 MIPS_SYS(sys_llistxattr , 3)
1735 MIPS_SYS(sys_flistxattr , 3)
1736 MIPS_SYS(sys_removexattr , 2)
1737 MIPS_SYS(sys_lremovexattr, 2)
1738 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1739 MIPS_SYS(sys_tkill , 2)
1740 MIPS_SYS(sys_sendfile64 , 5)
1741 MIPS_SYS(sys_futex , 2)
1742 MIPS_SYS(sys_sched_setaffinity, 3)
1743 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1744 MIPS_SYS(sys_io_setup , 2)
1745 MIPS_SYS(sys_io_destroy , 1)
1746 MIPS_SYS(sys_io_getevents, 5)
1747 MIPS_SYS(sys_io_submit , 3)
1748 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1749 MIPS_SYS(sys_exit_group , 1)
1750 MIPS_SYS(sys_lookup_dcookie, 3)
1751 MIPS_SYS(sys_epoll_create, 1)
1752 MIPS_SYS(sys_epoll_ctl , 4)
1753 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1754 MIPS_SYS(sys_remap_file_pages, 5)
1755 MIPS_SYS(sys_set_tid_address, 1)
1756 MIPS_SYS(sys_restart_syscall, 0)
1757 MIPS_SYS(sys_fadvise64_64, 7)
1758 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1759 MIPS_SYS(sys_fstatfs64 , 2)
1760 MIPS_SYS(sys_timer_create, 3)
1761 MIPS_SYS(sys_timer_settime, 4)
1762 MIPS_SYS(sys_timer_gettime, 2)
1763 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1764 MIPS_SYS(sys_timer_delete, 1)
1765 MIPS_SYS(sys_clock_settime, 2)
1766 MIPS_SYS(sys_clock_gettime, 2)
1767 MIPS_SYS(sys_clock_getres, 2)
1768 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1769 MIPS_SYS(sys_tgkill , 3)
1770 MIPS_SYS(sys_utimes , 2)
1771 MIPS_SYS(sys_mbind , 4)
1772 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1773 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1774 MIPS_SYS(sys_mq_open , 4)
1775 MIPS_SYS(sys_mq_unlink , 1)
1776 MIPS_SYS(sys_mq_timedsend, 5)
1777 MIPS_SYS(sys_mq_timedreceive, 5)
1778 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1779 MIPS_SYS(sys_mq_getsetattr, 3)
1780 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1781 MIPS_SYS(sys_waitid , 4)
1782 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1783 MIPS_SYS(sys_add_key , 5)
388bb21a 1784 MIPS_SYS(sys_request_key, 4)
048f6b4d 1785 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 1786 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 1787 MIPS_SYS(sys_inotify_init, 0)
1788 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1789 MIPS_SYS(sys_inotify_rm_watch, 2)
1790 MIPS_SYS(sys_migrate_pages, 4)
1791 MIPS_SYS(sys_openat, 4)
1792 MIPS_SYS(sys_mkdirat, 3)
1793 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1794 MIPS_SYS(sys_fchownat, 5)
1795 MIPS_SYS(sys_futimesat, 3)
1796 MIPS_SYS(sys_fstatat64, 4)
1797 MIPS_SYS(sys_unlinkat, 3)
1798 MIPS_SYS(sys_renameat, 4) /* 4295 */
1799 MIPS_SYS(sys_linkat, 5)
1800 MIPS_SYS(sys_symlinkat, 3)
1801 MIPS_SYS(sys_readlinkat, 4)
1802 MIPS_SYS(sys_fchmodat, 3)
1803 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1804 MIPS_SYS(sys_pselect6, 6)
1805 MIPS_SYS(sys_ppoll, 5)
1806 MIPS_SYS(sys_unshare, 1)
1807 MIPS_SYS(sys_splice, 4)
1808 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1809 MIPS_SYS(sys_tee, 4)
1810 MIPS_SYS(sys_vmsplice, 4)
1811 MIPS_SYS(sys_move_pages, 6)
1812 MIPS_SYS(sys_set_robust_list, 2)
1813 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1814 MIPS_SYS(sys_kexec_load, 4)
1815 MIPS_SYS(sys_getcpu, 3)
1816 MIPS_SYS(sys_epoll_pwait, 6)
1817 MIPS_SYS(sys_ioprio_set, 3)
1818 MIPS_SYS(sys_ioprio_get, 2)
048f6b4d
FB		 1819};
1820
1821#undef MIPS_SYS
1822
1823void cpu_loop(CPUMIPSState *env)
1824{
1825 target_siginfo_t info;
388bb21a 1826 int trapnr, ret;
048f6b4d 1827 unsigned int syscall_num;
048f6b4d
FB		 1828
1829 for(;;) {
1830 trapnr = cpu_mips_exec(env);
1831 switch(trapnr) {
1832 case EXCP_SYSCALL:
b5dc7732
TS		 1833 syscall_num = env->active_tc.gpr[2] - 4000;
1834 env->active_tc.PC += 4;
388bb21a
TS		 1835 if (syscall_num >= sizeof(mips_syscall_args)) {
1836 ret = -ENOSYS;
1837 } else {
1838 int nb_args;
992f48a0
BS		 1839 abi_ulong sp_reg;
1840 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 1841
1842 nb_args = mips_syscall_args[syscall_num];
b5dc7732 1843 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 1844 switch (nb_args) {
1845 /* these arguments are taken from the stack */
2f619698
FB		 1846 /* FIXME - what to do if get_user() fails? */
1847 case 8: get_user_ual(arg8, sp_reg + 28);
1848 case 7: get_user_ual(arg7, sp_reg + 24);
1849 case 6: get_user_ual(arg6, sp_reg + 20);
1850 case 5: get_user_ual(arg5, sp_reg + 16);
388bb21a
TS		 1851 default:
1852 break;
048f6b4d 1853 }
b5dc7732
TS		 1854 ret = do_syscall(env, env->active_tc.gpr[2],
1855 env->active_tc.gpr[4],
1856 env->active_tc.gpr[5],
1857 env->active_tc.gpr[6],
1858 env->active_tc.gpr[7],
388bb21a
TS		 1859 arg5, arg6/*, arg7, arg8*/);
1860 }
0b1bcb00
PB		 1861 if (ret == -TARGET_QEMU_ESIGRETURN) {
1862 /* Returning from a successful sigreturn syscall.
1863 Avoid clobbering register state. */
1864 break;
1865 }
388bb21a 1866 if ((unsigned int)ret >= (unsigned int)(-1133)) {
b5dc7732 1867 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 1868 ret = -ret;
1869 } else {
b5dc7732 1870 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 1871 }
b5dc7732 1872 env->active_tc.gpr[2] = ret;
048f6b4d 1873 break;
ca7c2b1b
TS		 1874 case EXCP_TLBL:
1875 case EXCP_TLBS:
e4474235
PB		 1876 info.si_signo = TARGET_SIGSEGV;
1877 info.si_errno = 0;
1878 /* XXX: check env->error_code */
1879 info.si_code = TARGET_SEGV_MAPERR;
1880 info._sifields._sigfault._addr = env->CP0_BadVAddr;
1881 queue_signal(env, info.si_signo, &info);
1882 break;
6900e84b 1883 case EXCP_CpU:
048f6b4d 1884 case EXCP_RI:
bc1ad2de
FB		 1885 info.si_signo = TARGET_SIGILL;
1886 info.si_errno = 0;
1887 info.si_code = 0;
624f7979 1888 queue_signal(env, info.si_signo, &info);
048f6b4d 1889 break;
106ec879
FB		 1890 case EXCP_INTERRUPT:
1891 /* just indicate that signals should be handled asap */
1892 break;
d08b2a28
PB		 1893 case EXCP_DEBUG:
1894 {
1895 int sig;
1896
1897 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1898 if (sig)
1899 {
1900 info.si_signo = sig;
1901 info.si_errno = 0;
1902 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1903 queue_signal(env, info.si_signo, &info);
d08b2a28
PB		 1904 }
1905 }
1906 break;
048f6b4d
FB		 1907 default:
1908 // error:
5fafdf24 1909 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
048f6b4d
FB		 1910 trapnr);
1911 cpu_dump_state(env, stderr, fprintf, 0);
1912 abort();
1913 }
1914 process_pending_signals(env);
1915 }
1916}
1917#endif
1918
fdf9b3e8
FB		 1919#ifdef TARGET_SH4
1920void cpu_loop (CPUState *env)
1921{
1922 int trapnr, ret;
355fb23d 1923 target_siginfo_t info;
3b46e624 1924
fdf9b3e8
FB		 1925 while (1) {
1926 trapnr = cpu_sh4_exec (env);
3b46e624 1927
fdf9b3e8
FB		 1928 switch (trapnr) {
1929 case 0x160:
0b6d3ae0 1930 env->pc += 2;
5fafdf24
TS		 1931 ret = do_syscall(env,
1932 env->gregs[3],
1933 env->gregs[4],
1934 env->gregs[5],
1935 env->gregs[6],
1936 env->gregs[7],
1937 env->gregs[0],
fca743f3 1938 env->gregs[1]);
9c2a9ea1 1939 env->gregs[0] = ret;
fdf9b3e8 1940 break;
c3b5bc8a
TS		 1941 case EXCP_INTERRUPT:
1942 /* just indicate that signals should be handled asap */
1943 break;
355fb23d
PB		 1944 case EXCP_DEBUG:
1945 {
1946 int sig;
1947
1948 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1949 if (sig)
1950 {
1951 info.si_signo = sig;
1952 info.si_errno = 0;
1953 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1954 queue_signal(env, info.si_signo, &info);
355fb23d
PB		 1955 }
1956 }
1957 break;
c3b5bc8a
TS		 1958 case 0xa0:
1959 case 0xc0:
1960 info.si_signo = SIGSEGV;
1961 info.si_errno = 0;
1962 info.si_code = TARGET_SEGV_MAPERR;
1963 info._sifields._sigfault._addr = env->tea;
624f7979 1964 queue_signal(env, info.si_signo, &info);
c3b5bc8a
TS		 1965 break;
1966
fdf9b3e8
FB		 1967 default:
1968 printf ("Unhandled trap: 0x%x\n", trapnr);
1969 cpu_dump_state(env, stderr, fprintf, 0);
1970 exit (1);
1971 }
1972 process_pending_signals (env);
1973 }
1974}
1975#endif
1976
48733d19
TS		 1977#ifdef TARGET_CRIS
1978void cpu_loop (CPUState *env)
1979{
1980 int trapnr, ret;
1981 target_siginfo_t info;
1982
1983 while (1) {
1984 trapnr = cpu_cris_exec (env);
1985 switch (trapnr) {
1986 case 0xaa:
1987 {
1988 info.si_signo = SIGSEGV;
1989 info.si_errno = 0;
1990 /* XXX: check env->error_code */
1991 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 1992 info._sifields._sigfault._addr = env->pregs[PR_EDA];
624f7979 1993 queue_signal(env, info.si_signo, &info);
48733d19
TS		 1994 }
1995 break;
b6d3abda
EI		 1996 case EXCP_INTERRUPT:
1997 /* just indicate that signals should be handled asap */
1998 break;
48733d19
TS		 1999 case EXCP_BREAK:
2000 ret = do_syscall(env,
2001 env->regs[9],
2002 env->regs[10],
2003 env->regs[11],
2004 env->regs[12],
2005 env->regs[13],
2006 env->pregs[7],
2007 env->pregs[11]);
2008 env->regs[10] = ret;
48733d19
TS		 2009 break;
2010 case EXCP_DEBUG:
2011 {
2012 int sig;
2013
2014 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2015 if (sig)
2016 {
2017 info.si_signo = sig;
2018 info.si_errno = 0;
2019 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2020 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2021 }
2022 }
2023 break;
2024 default:
2025 printf ("Unhandled trap: 0x%x\n", trapnr);
2026 cpu_dump_state(env, stderr, fprintf, 0);
2027 exit (1);
2028 }
2029 process_pending_signals (env);
2030 }
2031}
2032#endif
2033
e6e5906b
PB		 2034#ifdef TARGET_M68K
2035
2036void cpu_loop(CPUM68KState *env)
2037{
2038 int trapnr;
2039 unsigned int n;
2040 target_siginfo_t info;
2041 TaskState *ts = env->opaque;
3b46e624 2042
e6e5906b
PB		 2043 for(;;) {
2044 trapnr = cpu_m68k_exec(env);
2045 switch(trapnr) {
2046 case EXCP_ILLEGAL:
2047 {
2048 if (ts->sim_syscalls) {
2049 uint16_t nr;
2050 nr = lduw(env->pc + 2);
2051 env->pc += 4;
2052 do_m68k_simcall(env, nr);
2053 } else {
2054 goto do_sigill;
2055 }
2056 }
2057 break;
a87295e8 2058 case EXCP_HALT_INSN:
e6e5906b 2059 /* Semihosing syscall. */
a87295e8 2060 env->pc += 4;
e6e5906b
PB		 2061 do_m68k_semihosting(env, env->dregs[0]);
2062 break;
2063 case EXCP_LINEA:
2064 case EXCP_LINEF:
2065 case EXCP_UNSUPPORTED:
2066 do_sigill:
2067 info.si_signo = SIGILL;
2068 info.si_errno = 0;
2069 info.si_code = TARGET_ILL_ILLOPN;
2070 info._sifields._sigfault._addr = env->pc;
624f7979 2071 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2072 break;
2073 case EXCP_TRAP0:
2074 {
2075 ts->sim_syscalls = 0;
2076 n = env->dregs[0];
2077 env->pc += 2;
5fafdf24
TS		 2078 env->dregs[0] = do_syscall(env,
2079 n,
e6e5906b
PB		 2080 env->dregs[1],
2081 env->dregs[2],
2082 env->dregs[3],
2083 env->dregs[4],
2084 env->dregs[5],
bb7ec043 2085 env->aregs[0]);
e6e5906b
PB		 2086 }
2087 break;
2088 case EXCP_INTERRUPT:
2089 /* just indicate that signals should be handled asap */
2090 break;
2091 case EXCP_ACCESS:
2092 {
2093 info.si_signo = SIGSEGV;
2094 info.si_errno = 0;
2095 /* XXX: check env->error_code */
2096 info.si_code = TARGET_SEGV_MAPERR;
2097 info._sifields._sigfault._addr = env->mmu.ar;
624f7979 2098 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2099 }
2100 break;
2101 case EXCP_DEBUG:
2102 {
2103 int sig;
2104
2105 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2106 if (sig)
2107 {
2108 info.si_signo = sig;
2109 info.si_errno = 0;
2110 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2111 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2112 }
2113 }
2114 break;
2115 default:
5fafdf24 2116 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
e6e5906b
PB		 2117 trapnr);
2118 cpu_dump_state(env, stderr, fprintf, 0);
2119 abort();
2120 }
2121 process_pending_signals(env);
2122 }
2123}
2124#endif /* TARGET_M68K */
2125
7a3148a9
JM		 2126#ifdef TARGET_ALPHA
2127void cpu_loop (CPUState *env)
2128{
e96efcfc 2129 int trapnr;
7a3148a9 2130 target_siginfo_t info;
3b46e624 2131
7a3148a9
JM		 2132 while (1) {
2133 trapnr = cpu_alpha_exec (env);
3b46e624 2134
7a3148a9
JM		 2135 switch (trapnr) {
2136 case EXCP_RESET:
2137 fprintf(stderr, "Reset requested. Exit\n");
2138 exit(1);
2139 break;
2140 case EXCP_MCHK:
2141 fprintf(stderr, "Machine check exception. Exit\n");
2142 exit(1);
2143 break;
2144 case EXCP_ARITH:
2145 fprintf(stderr, "Arithmetic trap.\n");
2146 exit(1);
2147 break;
2148 case EXCP_HW_INTERRUPT:
5fafdf24 2149 fprintf(stderr, "External interrupt. Exit\n");
7a3148a9
JM		 2150 exit(1);
2151 break;
2152 case EXCP_DFAULT:
2153 fprintf(stderr, "MMU data fault\n");
2154 exit(1);
2155 break;
2156 case EXCP_DTB_MISS_PAL:
2157 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2158 exit(1);
2159 break;
2160 case EXCP_ITB_MISS:
2161 fprintf(stderr, "MMU instruction TLB miss\n");
2162 exit(1);
2163 break;
2164 case EXCP_ITB_ACV:
2165 fprintf(stderr, "MMU instruction access violation\n");
2166 exit(1);
2167 break;
2168 case EXCP_DTB_MISS_NATIVE:
2169 fprintf(stderr, "MMU data TLB miss\n");
2170 exit(1);
2171 break;
2172 case EXCP_UNALIGN:
2173 fprintf(stderr, "Unaligned access\n");
2174 exit(1);
2175 break;
2176 case EXCP_OPCDEC:
2177 fprintf(stderr, "Invalid instruction\n");
2178 exit(1);
2179 break;
2180 case EXCP_FEN:
2181 fprintf(stderr, "Floating-point not allowed\n");
2182 exit(1);
2183 break;
2184 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
7a3148a9
JM		 2185 call_pal(env, (trapnr >> 6) | 0x80);
2186 break;
2187 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
7f75ffd3 2188 fprintf(stderr, "Privileged call to PALcode\n");
7a3148a9
JM		 2189 exit(1);
2190 break;
2191 case EXCP_DEBUG:
2192 {
2193 int sig;
2194
2195 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2196 if (sig)
2197 {
2198 info.si_signo = sig;
2199 info.si_errno = 0;
2200 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2201 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2202 }
2203 }
2204 break;
2205 default:
2206 printf ("Unhandled trap: 0x%x\n", trapnr);
2207 cpu_dump_state(env, stderr, fprintf, 0);
2208 exit (1);
2209 }
2210 process_pending_signals (env);
2211 }
2212}
2213#endif /* TARGET_ALPHA */
2214
8fcd3692 2215static void usage(void)
31e31b8a 2216{
4a19f1ec 2217 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
68d0f70e 2218 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
b346ff46 2219 "Linux CPU emulator (compiled for %s emulation)\n"
d691f669 2220 "\n"
68d0f70e 2221 "Standard options:\n"
b12b6a18
TS		 2222 "-h print this help\n"
2223 "-g port wait gdb connection to port\n"
2224 "-L path set the elf interpreter prefix (default=%s)\n"
2225 "-s size set the stack size in bytes (default=%ld)\n"
2226 "-cpu model select CPU (-cpu ? for list)\n"
2227 "-drop-ld-preload drop LD_PRELOAD for target process\n"
04a6dfeb
AJ		 2228 "-E var=value sets/modifies targets environment variable(s)\n"
2229 "-U var unsets targets environment variable(s)\n"
7d8cec95 2230 "-0 argv0 forces target process argv[0] to be argv0\n"
54936004 2231 "\n"
68d0f70e 2232 "Debug options:\n"
6f1f31c0 2233 "-d options activate log (logfile=%s)\n"
b6741956 2234 "-p pagesize set the host page size to 'pagesize'\n"
1b530a6d 2235 "-singlestep always run in singlestep mode\n"
b01bcae6
AZ		 2236 "-strace log system calls\n"
2237 "\n"
68d0f70e 2238 "Environment variables:\n"
b01bcae6
AZ		 2239 "QEMU_STRACE Print system calls and arguments similar to the\n"
2240 " 'strace' program. Enable by setting to any value.\n"
04a6dfeb
AJ		 2241 "You can use -E and -U options to set/unset environment variables\n"
2242 "for target process. It is possible to provide several variables\n"
2243 "by repeating the option. For example:\n"
2244 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2245 "Note that if you provide several changes to single variable\n"
2246 "last change will stay in effect.\n"
b01bcae6 2247 ,
b346ff46 2248 TARGET_ARCH,
5fafdf24 2249 interp_prefix,
54936004
FB		 2250 x86_stack_size,
2251 DEBUG_LOGFILE);
2d18e637 2252 exit(1);
31e31b8a
FB		 2253}
2254
d5975363 2255THREAD CPUState *thread_env;
59faf6d6 2256
c3a92833 2257/* Assumes contents are already zeroed. */
624f7979
PB		 2258void init_task_state(TaskState *ts)
2259{
2260 int i;
2261
624f7979
PB		 2262 ts->used = 1;
2263 ts->first_free = ts->sigqueue_table;
2264 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2265 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2266 }
2267 ts->sigqueue_table[i].next = NULL;
2268}
2269
902b3d5c 2270int main(int argc, char **argv, char **envp)
31e31b8a
FB		 2271{
2272 const char *filename;
b1f9be31 2273 const char *cpu_model;
01ffc75b 2274 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 2275 struct image_info info1, *info = &info1;
851e67a1 2276 TaskState ts1, *ts = &ts1;
b346ff46 2277 CPUState *env;
586314f2 2278 int optind;
d691f669 2279 const char *r;
74c33bed 2280 int gdbstub_port = 0;
04a6dfeb 2281 char **target_environ, **wrk;
7d8cec95
AJ		 2282 char **target_argv;
2283 int target_argc;
04a6dfeb 2284 envlist_t *envlist = NULL;
7d8cec95
AJ		 2285 const char *argv0 = NULL;
2286 int i;
b12b6a18 2287
31e31b8a 2288 if (argc <= 1)
44de1b33 2289 usage();
f801f97e 2290
902b3d5c 2291 qemu_cache_utils_init(envp);
2292
cc38b844
FB		 2293 /* init debug */
2294 cpu_set_log_filename(DEBUG_LOGFILE);
2295
04a6dfeb
AJ		 2296 if ((envlist = envlist_create()) == NULL) {
2297 (void) fprintf(stderr, "Unable to allocate envlist\n");
2298 exit(1);
2299 }
2300
2301 /* add current environment into the list */
2302 for (wrk = environ; *wrk != NULL; wrk++) {
2303 (void) envlist_setenv(envlist, *wrk);
2304 }
2305
b1f9be31 2306 cpu_model = NULL;
586314f2 2307 optind = 1;
d691f669
FB		 2308 for(;;) {
2309 if (optind >= argc)
2310 break;
2311 r = argv[optind];
2312 if (r[0] != '-')
2313 break;
586314f2 2314 optind++;
d691f669
FB		 2315 r++;
2316 if (!strcmp(r, "-")) {
2317 break;
2318 } else if (!strcmp(r, "d")) {
e19e89a5 2319 int mask;
c7cd6a37 2320 const CPULogItem *item;
6f1f31c0
FB		 2321
2322 if (optind >= argc)
2323 break;
3b46e624 2324
6f1f31c0
FB		 2325 r = argv[optind++];
2326 mask = cpu_str_to_log_mask(r);
e19e89a5
FB		 2327 if (!mask) {
2328 printf("Log items (comma separated):\n");
2329 for(item = cpu_log_items; item->mask != 0; item++) {
2330 printf("%-10s %s\n", item->name, item->help);
2331 }
2332 exit(1);
2333 }
2334 cpu_set_log(mask);
04a6dfeb
AJ		 2335 } else if (!strcmp(r, "E")) {
2336 r = argv[optind++];
2337 if (envlist_setenv(envlist, r) != 0)
2338 usage();
2339 } else if (!strcmp(r, "U")) {
2340 r = argv[optind++];
2341 if (envlist_unsetenv(envlist, r) != 0)
2342 usage();
7d8cec95
AJ		 2343 } else if (!strcmp(r, "0")) {
2344 r = argv[optind++];
2345 argv0 = r;
d691f669 2346 } else if (!strcmp(r, "s")) {
491150db
AJ		 2347 if (optind >= argc)
2348 break;
d691f669
FB		 2349 r = argv[optind++];
2350 x86_stack_size = strtol(r, (char **)&r, 0);
2351 if (x86_stack_size <= 0)
44de1b33 2352 usage();
d691f669
FB		 2353 if (*r == 'M')
2354 x86_stack_size *= 1024 * 1024;
2355 else if (*r == 'k' || *r == 'K')
2356 x86_stack_size *= 1024;
2357 } else if (!strcmp(r, "L")) {
2358 interp_prefix = argv[optind++];
54936004 2359 } else if (!strcmp(r, "p")) {
491150db
AJ		 2360 if (optind >= argc)
2361 break;
83fb7adf
FB		 2362 qemu_host_page_size = atoi(argv[optind++]);
2363 if (qemu_host_page_size == 0 ||
2364 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
54936004
FB		 2365 fprintf(stderr, "page size must be a power of two\n");
2366 exit(1);
2367 }
1fddef4b 2368 } else if (!strcmp(r, "g")) {
491150db
AJ		 2369 if (optind >= argc)
2370 break;
74c33bed 2371 gdbstub_port = atoi(argv[optind++]);
c5937220
PB		 2372 } else if (!strcmp(r, "r")) {
2373 qemu_uname_release = argv[optind++];
b1f9be31
JM		 2374 } else if (!strcmp(r, "cpu")) {
2375 cpu_model = argv[optind++];
491150db 2376 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
c732abe2
JM		 2377/* XXX: implement xxx_cpu_list for targets that still miss it */
2378#if defined(cpu_list)
2379 cpu_list(stdout, &fprintf);
b1f9be31 2380#endif
2d18e637 2381 exit(1);
b1f9be31 2382 }
b12b6a18 2383 } else if (!strcmp(r, "drop-ld-preload")) {
04a6dfeb 2384 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
1b530a6d
AJ		 2385 } else if (!strcmp(r, "singlestep")) {
2386 singlestep = 1;
b6741956
FB		 2387 } else if (!strcmp(r, "strace")) {
2388 do_strace = 1;
5fafdf24 2389 } else
c6981055 2390 {
d691f669
FB		 2391 usage();
2392 }
586314f2 2393 }
d691f669
FB		 2394 if (optind >= argc)
2395 usage();
586314f2 2396 filename = argv[optind];
d088d664 2397 exec_path = argv[optind];
586314f2 2398
31e31b8a 2399 /* Zero out regs */
01ffc75b 2400 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 2401
2402 /* Zero out image_info */
2403 memset(info, 0, sizeof(struct image_info));
2404
74cd30b8
FB		 2405 /* Scan interp_prefix dir for replacement files. */
2406 init_paths(interp_prefix);
2407
46027c07 2408 if (cpu_model == NULL) {
aaed909a 2409#if defined(TARGET_I386)
46027c07
FB		 2410#ifdef TARGET_X86_64
2411 cpu_model = "qemu64";
2412#else
2413 cpu_model = "qemu32";
2414#endif
aaed909a 2415#elif defined(TARGET_ARM)
088ab16c 2416 cpu_model = "any";
aaed909a
FB		 2417#elif defined(TARGET_M68K)
2418 cpu_model = "any";
2419#elif defined(TARGET_SPARC)
2420#ifdef TARGET_SPARC64
2421 cpu_model = "TI UltraSparc II";
2422#else
2423 cpu_model = "Fujitsu MB86904";
46027c07 2424#endif
aaed909a
FB		 2425#elif defined(TARGET_MIPS)
2426#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2427 cpu_model = "20Kc";
2428#else
2429 cpu_model = "24Kf";
2430#endif
2431#elif defined(TARGET_PPC)
7ded4f52
FB		 2432#ifdef TARGET_PPC64
2433 cpu_model = "970";
2434#else
aaed909a 2435 cpu_model = "750";
7ded4f52 2436#endif
aaed909a
FB		 2437#else
2438 cpu_model = "any";
2439#endif
2440 }
26a5f13b 2441 cpu_exec_init_all(0);
83fb7adf
FB		 2442 /* NOTE: we need to init the CPU at this stage to get
2443 qemu_host_page_size */
aaed909a
FB		 2444 env = cpu_init(cpu_model);
2445 if (!env) {
2446 fprintf(stderr, "Unable to find CPU definition\n");
2447 exit(1);
2448 }
d5975363 2449 thread_env = env;
3b46e624 2450
b6741956
FB		 2451 if (getenv("QEMU_STRACE")) {
2452 do_strace = 1;
b92c47c1
TS		 2453 }
2454
04a6dfeb
AJ		 2455 target_environ = envlist_to_environ(envlist, NULL);
2456 envlist_free(envlist);
b12b6a18 2457
7d8cec95
AJ		 2458 /*
2459 * Prepare copy of argv vector for target.
2460 */
2461 target_argc = argc - optind;
2462 target_argv = calloc(target_argc + 1, sizeof (char *));
2463 if (target_argv == NULL) {
2464 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
2465 exit(1);
2466 }
2467
2468 /*
2469 * If argv0 is specified (using '-0' switch) we replace
2470 * argv[0] pointer with the given one.
2471 */
2472 i = 0;
2473 if (argv0 != NULL) {
2474 target_argv[i++] = strdup(argv0);
2475 }
2476 for (; i < target_argc; i++) {
2477 target_argv[i] = strdup(argv[optind + i]);
2478 }
2479 target_argv[target_argc] = NULL;
2480
2481 if (loader_exec(filename, target_argv, target_environ, regs, info) != 0) {
b12b6a18
TS		 2482 printf("Error loading %s\n", filename);
2483 _exit(1);
2484 }
2485
7d8cec95
AJ		 2486 for (i = 0; i < target_argc; i++) {
2487 free(target_argv[i]);
2488 }
2489 free(target_argv);
2490
b12b6a18
TS		 2491 for (wrk = target_environ; *wrk; wrk++) {
2492 free(*wrk);
31e31b8a 2493 }
3b46e624 2494
b12b6a18
TS		 2495 free(target_environ);
2496
2e77eac6
BS		 2497 if (qemu_log_enabled()) {
2498 log_page_dump();
2499
2500 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2501 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2502 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2503 info->start_code);
2504 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2505 info->start_data);
2506 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2507 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2508 info->start_stack);
2509 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2510 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2511 }
31e31b8a 2512
53a5960a 2513 target_set_brk(info->brk);
31e31b8a 2514 syscall_init();
66fb9763 2515 signal_init();
31e31b8a 2516
851e67a1
FB		 2517 /* build Task State */
2518 memset(ts, 0, sizeof(TaskState));
624f7979 2519 init_task_state(ts);
978efd6a 2520 ts->info = info;
624f7979 2521 env->opaque = ts;
3b46e624 2522
b346ff46 2523#if defined(TARGET_I386)
2e255c6b
FB		 2524 cpu_x86_set_cpl(env, 3);
2525
3802ce26 2526 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1bde465e
FB		 2527 env->hflags |= HF_PE_MASK;
2528 if (env->cpuid_features & CPUID_SSE) {
2529 env->cr[4] |= CR4_OSFXSR_MASK;
2530 env->hflags |= HF_OSFXSR_MASK;
2531 }
d2fd1af7 2532#ifndef TARGET_ABI32
4dbc422b
FB		 2533 /* enable 64 bit mode if possible */
2534 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2535 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2536 exit(1);
2537 }
d2fd1af7 2538 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 2539 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 2540 env->hflags |= HF_LMA_MASK;
2541#endif
1bde465e 2542
415e561f
FB		 2543 /* flags setup : we activate the IRQs by default as in user mode */
2544 env->eflags |= IF_MASK;
3b46e624 2545
6dbad63e 2546 /* linux register setup */
d2fd1af7 2547#ifndef TARGET_ABI32
84409ddb
JM		 2548 env->regs[R_EAX] = regs->rax;
2549 env->regs[R_EBX] = regs->rbx;
2550 env->regs[R_ECX] = regs->rcx;
2551 env->regs[R_EDX] = regs->rdx;
2552 env->regs[R_ESI] = regs->rsi;
2553 env->regs[R_EDI] = regs->rdi;
2554 env->regs[R_EBP] = regs->rbp;
2555 env->regs[R_ESP] = regs->rsp;
2556 env->eip = regs->rip;
2557#else
0ecfa993
FB		 2558 env->regs[R_EAX] = regs->eax;
2559 env->regs[R_EBX] = regs->ebx;
2560 env->regs[R_ECX] = regs->ecx;
2561 env->regs[R_EDX] = regs->edx;
2562 env->regs[R_ESI] = regs->esi;
2563 env->regs[R_EDI] = regs->edi;
2564 env->regs[R_EBP] = regs->ebp;
2565 env->regs[R_ESP] = regs->esp;
dab2ed99 2566 env->eip = regs->eip;
84409ddb 2567#endif
31e31b8a 2568
f4beb510 2569 /* linux interrupt setup */
e441570f
AZ		 2570#ifndef TARGET_ABI32
2571 env->idt.limit = 511;
2572#else
2573 env->idt.limit = 255;
2574#endif
2575 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2576 PROT_READ|PROT_WRITE,
2577 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2578 idt_table = g2h(env->idt.base);
f4beb510
FB		 2579 set_idt(0, 0);
2580 set_idt(1, 0);
2581 set_idt(2, 0);
2582 set_idt(3, 3);
2583 set_idt(4, 3);
ec95da6c 2584 set_idt(5, 0);
f4beb510
FB		 2585 set_idt(6, 0);
2586 set_idt(7, 0);
2587 set_idt(8, 0);
2588 set_idt(9, 0);
2589 set_idt(10, 0);
2590 set_idt(11, 0);
2591 set_idt(12, 0);
2592 set_idt(13, 0);
2593 set_idt(14, 0);
2594 set_idt(15, 0);
2595 set_idt(16, 0);
2596 set_idt(17, 0);
2597 set_idt(18, 0);
2598 set_idt(19, 0);
2599 set_idt(0x80, 3);
2600
6dbad63e 2601 /* linux segment setup */
8d18e893
FB		 2602 {
2603 uint64_t *gdt_table;
e441570f
AZ		 2604 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2605 PROT_READ|PROT_WRITE,
2606 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 2607 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 2608 gdt_table = g2h(env->gdt.base);
d2fd1af7 2609#ifdef TARGET_ABI32
8d18e893
FB		 2610 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2611 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2612 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 2613#else
2614 /* 64 bit code segment */
2615 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2616 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2617 DESC_L_MASK |
2618 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2619#endif
8d18e893
FB		 2620 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2621 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2622 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2623 }
6dbad63e 2624 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 2625 cpu_x86_load_seg(env, R_SS, __USER_DS);
2626#ifdef TARGET_ABI32
6dbad63e
FB		 2627 cpu_x86_load_seg(env, R_DS, __USER_DS);
2628 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 2629 cpu_x86_load_seg(env, R_FS, __USER_DS);
2630 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 2631 /* This hack makes Wine work... */
2632 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 2633#else
2634 cpu_x86_load_seg(env, R_DS, 0);
2635 cpu_x86_load_seg(env, R_ES, 0);
2636 cpu_x86_load_seg(env, R_FS, 0);
2637 cpu_x86_load_seg(env, R_GS, 0);
2638#endif
b346ff46
FB		 2639#elif defined(TARGET_ARM)
2640 {
2641 int i;
b5ff1b31 2642 cpsr_write(env, regs->uregs[16], 0xffffffff);
b346ff46
FB		 2643 for(i = 0; i < 16; i++) {
2644 env->regs[i] = regs->uregs[i];
2645 }
b346ff46 2646 }
93ac68bc 2647#elif defined(TARGET_SPARC)
060366c5
FB		 2648 {
2649 int i;
2650 env->pc = regs->pc;
2651 env->npc = regs->npc;
2652 env->y = regs->y;
2653 for(i = 0; i < 8; i++)
2654 env->gregs[i] = regs->u_regs[i];
2655 for(i = 0; i < 8; i++)
2656 env->regwptr[i] = regs->u_regs[i + 8];
2657 }
67867308
FB		 2658#elif defined(TARGET_PPC)
2659 {
2660 int i;
3fc6c082 2661
0411a972
JM		 2662#if defined(TARGET_PPC64)
2663#if defined(TARGET_ABI32)
2664 env->msr &= ~((target_ulong)1 << MSR_SF);
e85e7c6e 2665#else
0411a972
JM		 2666 env->msr |= (target_ulong)1 << MSR_SF;
2667#endif
84409ddb 2668#endif
67867308
FB		 2669 env->nip = regs->nip;
2670 for(i = 0; i < 32; i++) {
2671 env->gpr[i] = regs->gpr[i];
2672 }
2673 }
e6e5906b
PB		 2674#elif defined(TARGET_M68K)
2675 {
e6e5906b
PB		 2676 env->pc = regs->pc;
2677 env->dregs[0] = regs->d0;
2678 env->dregs[1] = regs->d1;
2679 env->dregs[2] = regs->d2;
2680 env->dregs[3] = regs->d3;
2681 env->dregs[4] = regs->d4;
2682 env->dregs[5] = regs->d5;
2683 env->dregs[6] = regs->d6;
2684 env->dregs[7] = regs->d7;
2685 env->aregs[0] = regs->a0;
2686 env->aregs[1] = regs->a1;
2687 env->aregs[2] = regs->a2;
2688 env->aregs[3] = regs->a3;
2689 env->aregs[4] = regs->a4;
2690 env->aregs[5] = regs->a5;
2691 env->aregs[6] = regs->a6;
2692 env->aregs[7] = regs->usp;
2693 env->sr = regs->sr;
2694 ts->sim_syscalls = 1;
2695 }
048f6b4d
FB		 2696#elif defined(TARGET_MIPS)
2697 {
2698 int i;
2699
2700 for(i = 0; i < 32; i++) {
b5dc7732 2701 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 2702 }
b5dc7732 2703 env->active_tc.PC = regs->cp0_epc;
048f6b4d 2704 }
fdf9b3e8
FB		 2705#elif defined(TARGET_SH4)
2706 {
2707 int i;
2708
2709 for(i = 0; i < 16; i++) {
2710 env->gregs[i] = regs->regs[i];
2711 }
2712 env->pc = regs->pc;
2713 }
7a3148a9
JM		 2714#elif defined(TARGET_ALPHA)
2715 {
2716 int i;
2717
2718 for(i = 0; i < 28; i++) {
992f48a0 2719 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9
JM		 2720 }
2721 env->ipr[IPR_USP] = regs->usp;
2722 env->ir[30] = regs->usp;
2723 env->pc = regs->pc;
2724 env->unique = regs->unique;
2725 }
48733d19
TS		 2726#elif defined(TARGET_CRIS)
2727 {
2728 env->regs[0] = regs->r0;
2729 env->regs[1] = regs->r1;
2730 env->regs[2] = regs->r2;
2731 env->regs[3] = regs->r3;
2732 env->regs[4] = regs->r4;
2733 env->regs[5] = regs->r5;
2734 env->regs[6] = regs->r6;
2735 env->regs[7] = regs->r7;
2736 env->regs[8] = regs->r8;
2737 env->regs[9] = regs->r9;
2738 env->regs[10] = regs->r10;
2739 env->regs[11] = regs->r11;
2740 env->regs[12] = regs->r12;
2741 env->regs[13] = regs->r13;
2742 env->regs[14] = info->start_stack;
2743 env->regs[15] = regs->acr;
2744 env->pc = regs->erp;
2745 }
b346ff46
FB		 2746#else
2747#error unsupported target CPU
2748#endif
31e31b8a 2749
a87295e8
PB		 2750#if defined(TARGET_ARM) || defined(TARGET_M68K)
2751 ts->stack_base = info->start_stack;
2752 ts->heap_base = info->brk;
2753 /* This will be filled in on the first SYS_HEAPINFO call. */
2754 ts->heap_limit = 0;
2755#endif
2756
74c33bed
FB		 2757 if (gdbstub_port) {
2758 gdbserver_start (gdbstub_port);
1fddef4b
FB		 2759 gdb_handlesig(env, 0);
2760 }
1b6b029e
FB		 2761 cpu_loop(env);
2762 /* never exits */
31e31b8a
FB		 2763 return 0;
2764}
Empty description
This page took 0.67137 seconds and 4 git commands to generate.