7#ifndef _HARDWARE_STRUCTS_USB_DPRAM_H
8#define _HARDWARE_STRUCTS_USB_DPRAM_H
11#include "hardware/regs/usb.h"
23#define USB_NUM_ENDPOINTS 16
26#ifndef USB_MAX_ENDPOINTS
27#define USB_MAX_ENDPOINTS USB_NUM_ENDPOINTS
31#define USB_HOST_INTERRUPT_ENDPOINTS (USB_NUM_ENDPOINTS - 1)
34#define USB_BUF_CTRL_FULL 0x00008000u
35#define USB_BUF_CTRL_LAST 0x00004000u
36#define USB_BUF_CTRL_DATA0_PID 0x00000000u
37#define USB_BUF_CTRL_DATA1_PID 0x00002000u
38#define USB_BUF_CTRL_SEL 0x00001000u
39#define USB_BUF_CTRL_STALL 0x00000800u
40#define USB_BUF_CTRL_AVAIL 0x00000400u
41#define USB_BUF_CTRL_LEN_MASK 0x000003FFu
42#define USB_BUF_CTRL_LEN_LSB 0
45#define EP_CTRL_ENABLE_BITS (1u << 31u)
46#define EP_CTRL_DOUBLE_BUFFERED_BITS (1u << 30)
47#define EP_CTRL_INTERRUPT_PER_BUFFER (1u << 29)
48#define EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER (1u << 28)
49#define EP_CTRL_INTERRUPT_ON_NAK (1u << 16)
50#define EP_CTRL_INTERRUPT_ON_STALL (1u << 17)
51#define EP_CTRL_BUFFER_TYPE_LSB 26u
52#define EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB 16u
54#define USB_DPRAM_SIZE 4096u
59#define USB_DPRAM_MAX USB_DPRAM_SIZE
63#define USB_MAX_ISO_PACKET_SIZE 1023
64#define USB_MAX_PACKET_SIZE 64
68 volatile uint8_t setup_packet[8];
74 } ep_ctrl[USB_NUM_ENDPOINTS - 1];
80 } ep_buf_ctrl[USB_NUM_ENDPOINTS];
83 uint8_t ep0_buf_a[0x40];
84 uint8_t ep0_buf_b[0x40];
87 uint8_t epx_data[USB_DPRAM_MAX - 0x180];
95 volatile uint8_t setup_packet[8];
101 } int_ep_ctrl[USB_HOST_INTERRUPT_ENDPOINTS];
103 io_rw_32 epx_buf_ctrl;
110 } int_ep_buffer_ctrl[USB_HOST_INTERRUPT_ENDPOINTS];
114 uint8_t _spare1[124];
117 uint8_t epx_data[USB_DPRAM_MAX - 0x180];
123#define usb_dpram ((usb_device_dpram_t *)USBCTRL_DPRAM_BASE)
124#define usbh_dpram ((usb_host_dpram_t *)USBCTRL_DPRAM_BASE)
126static_assert( USB_HOST_INTERRUPT_ENDPOINTS == 15,
"");
Definition: usb_dpram.h:77
Definition: usb_dpram.h:71
Definition: usb_dpram.h:66
Definition: usb_dpram.h:107
Definition: usb_dpram.h:98
Definition: usb_dpram.h:93