usb_dpram.h
1
7#ifndef _HARDWARE_STRUCTS_USB_DPRAM_H
8#define _HARDWARE_STRUCTS_USB_DPRAM_H
9
11#include "hardware/regs/usb.h"
12
13// Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_usb
14//
15// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
16// _REG_(x) will link to the corresponding register in hardware/regs/usb.h.
17//
18// Bit-field descriptions are of the form:
19// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION
20
21
22// 0-15
23#define USB_NUM_ENDPOINTS 16
24
25// allow user to restrict number of endpoints available to save RAN
26#ifndef USB_MAX_ENDPOINTS
27#define USB_MAX_ENDPOINTS USB_NUM_ENDPOINTS
28#endif
29
30// 1-15
31#define USB_HOST_INTERRUPT_ENDPOINTS (USB_NUM_ENDPOINTS - 1)
32
33// Endpoint buffer control bits
34#define USB_BUF_CTRL_FULL 0x00008000u
35#define USB_BUF_CTRL_LAST 0x00004000u
36#define USB_BUF_CTRL_DATA0_PID 0x00000000u
37#define USB_BUF_CTRL_DATA1_PID 0x00002000u
38#define USB_BUF_CTRL_SEL 0x00001000u
39#define USB_BUF_CTRL_STALL 0x00000800u
40#define USB_BUF_CTRL_AVAIL 0x00000400u
41#define USB_BUF_CTRL_LEN_MASK 0x000003FFu
42#define USB_BUF_CTRL_LEN_LSB 0
43
44// ep_inout_ctrl bits
45#define EP_CTRL_ENABLE_BITS (1u << 31u)
46#define EP_CTRL_DOUBLE_BUFFERED_BITS (1u << 30)
47#define EP_CTRL_INTERRUPT_PER_BUFFER (1u << 29)
48#define EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER (1u << 28)
49#define EP_CTRL_INTERRUPT_ON_NAK (1u << 16)
50#define EP_CTRL_INTERRUPT_ON_STALL (1u << 17)
51#define EP_CTRL_BUFFER_TYPE_LSB 26u
52#define EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB 16u
53
54#define USB_DPRAM_SIZE 4096u
55
56// PICO_CONFIG: USB_DPRAM_MAX, Set amount of USB RAM used by USB system, min=0, max=4096, default=4096, group=hardware_usb
57// Allow user to claim some of the USB RAM for themselves
58#ifndef USB_DPRAM_MAX
59#define USB_DPRAM_MAX USB_DPRAM_SIZE
60#endif
61
62// Define maximum packet sizes
63#define USB_MAX_ISO_PACKET_SIZE 1023
64#define USB_MAX_PACKET_SIZE 64
65
66typedef struct {
67 // 4K of DPSRAM at beginning. Note this supports 8, 16, and 32 bit accesses
68 volatile uint8_t setup_packet[8]; // First 8 bytes are always for setup packets
69
70 // Starts at ep1
72 io_rw_32 in;
73 io_rw_32 out;
74 } ep_ctrl[USB_NUM_ENDPOINTS - 1];
75
76 // Starts at ep0
78 io_rw_32 in;
79 io_rw_32 out;
80 } ep_buf_ctrl[USB_NUM_ENDPOINTS];
81
82 // EP0 buffers are fixed. Assumes single buffered mode for EP0
83 uint8_t ep0_buf_a[0x40];
84 uint8_t ep0_buf_b[0x40];
85
86 // Rest of DPRAM can be carved up as needed
87 uint8_t epx_data[USB_DPRAM_MAX - 0x180];
89
90static_assert(sizeof(usb_device_dpram_t) == USB_DPRAM_MAX, "");
91static_assert(offsetof(usb_device_dpram_t, epx_data) == 0x180, "");
92
93typedef struct {
94 // 4K of DPSRAM at beginning. Note this supports 8, 16, and 32 bit accesses
95 volatile uint8_t setup_packet[8]; // First 8 bytes are always for setup packets
96
97 // Interrupt endpoint control 1 -> 15
99 io_rw_32 ctrl;
100 io_rw_32 spare;
101 } int_ep_ctrl[USB_HOST_INTERRUPT_ENDPOINTS];
102
103 io_rw_32 epx_buf_ctrl;
104 io_rw_32 _spare0;
105
106 // Interrupt endpoint buffer control
108 io_rw_32 ctrl;
109 io_rw_32 spare;
110 } int_ep_buffer_ctrl[USB_HOST_INTERRUPT_ENDPOINTS];
111
112 io_rw_32 epx_ctrl;
113
114 uint8_t _spare1[124];
115
116 // Should start at 0x180
117 uint8_t epx_data[USB_DPRAM_MAX - 0x180];
119
120static_assert(sizeof(usb_host_dpram_t) == USB_DPRAM_MAX, "");
121static_assert(offsetof(usb_host_dpram_t, epx_data) == 0x180, "");
122
123#define usb_dpram ((usb_device_dpram_t *)USBCTRL_DPRAM_BASE)
124#define usbh_dpram ((usb_host_dpram_t *)USBCTRL_DPRAM_BASE)
125
126static_assert( USB_HOST_INTERRUPT_ENDPOINTS == 15, "");
127
128#endif // _HARDWARE_STRUCTS_USB_DPRAM_H
Definition: usb_dpram.h:66
Definition: usb_dpram.h:93