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// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT


#ifndef _DREQ_H

#define _DREQ_H


#ifdef __ASSEMBLER__

#define DREQ_PIO0_TX0 0

#define DREQ_PIO0_TX1 1

#define DREQ_PIO0_TX2 2

#define DREQ_PIO0_TX3 3

#define DREQ_PIO0_RX0 4

#define DREQ_PIO0_RX1 5

#define DREQ_PIO0_RX2 6

#define DREQ_PIO0_RX3 7

#define DREQ_PIO1_TX0 8

#define DREQ_PIO1_TX1 9

#define DREQ_PIO1_TX2 10

#define DREQ_PIO1_TX3 11

#define DREQ_PIO1_RX0 12

#define DREQ_PIO1_RX1 13

#define DREQ_PIO1_RX2 14

#define DREQ_PIO1_RX3 15

#define DREQ_PIO2_TX0 16

#define DREQ_PIO2_TX1 17

#define DREQ_PIO2_TX2 18

#define DREQ_PIO2_TX3 19

#define DREQ_PIO2_RX0 20

#define DREQ_PIO2_RX1 21

#define DREQ_PIO2_RX2 22

#define DREQ_PIO2_RX3 23

#define DREQ_SPI0_TX 24

#define DREQ_SPI0_RX 25

#define DREQ_SPI1_TX 26

#define DREQ_SPI1_RX 27

#define DREQ_UART0_TX 28

#define DREQ_UART0_RX 29

#define DREQ_UART1_TX 30

#define DREQ_UART1_RX 31

#define DREQ_PWM_WRAP0 32

#define DREQ_PWM_WRAP1 33

#define DREQ_PWM_WRAP2 34

#define DREQ_PWM_WRAP3 35

#define DREQ_PWM_WRAP4 36

#define DREQ_PWM_WRAP5 37

#define DREQ_PWM_WRAP6 38

#define DREQ_PWM_WRAP7 39

#define DREQ_PWM_WRAP8 40

#define DREQ_PWM_WRAP9 41

#define DREQ_PWM_WRAP10 42

#define DREQ_PWM_WRAP11 43

#define DREQ_I2C0_TX 44

#define DREQ_I2C0_RX 45

#define DREQ_I2C1_TX 46

#define DREQ_I2C1_RX 47

#define DREQ_ADC 48

#define DREQ_XIP_STREAM 49

#define DREQ_XIP_QMITX 50

#define DREQ_XIP_QMIRX 51

#define DREQ_HSTX 52

#define DREQ_CORESIGHT 53

#define DREQ_SHA256 54

#define DREQ_DMA_TIMER0 59

#define DREQ_DMA_TIMER1 60

#define DREQ_DMA_TIMER2 61

#define DREQ_DMA_TIMER3 62

#define DREQ_FORCE 63

#else

typedef enum dreq_num_rp2350 {

    DREQ_PIO0_TX0 = 0,

    DREQ_PIO0_TX1 = 1,

    DREQ_PIO0_TX2 = 2,

    DREQ_PIO0_TX3 = 3,

    DREQ_PIO0_RX0 = 4,

    DREQ_PIO0_RX1 = 5,

    DREQ_PIO0_RX2 = 6,

    DREQ_PIO0_RX3 = 7,

    DREQ_PIO1_TX0 = 8,

    DREQ_PIO1_TX1 = 9,

    DREQ_PIO1_TX2 = 10,

    DREQ_PIO1_TX3 = 11,

    DREQ_PIO1_RX0 = 12,

    DREQ_PIO1_RX1 = 13,

    DREQ_PIO1_RX2 = 14,

    DREQ_PIO1_RX3 = 15,

    DREQ_PIO2_TX0 = 16,

    DREQ_PIO2_TX1 = 17,

    DREQ_PIO2_TX2 = 18,

    DREQ_PIO2_TX3 = 19,

    DREQ_PIO2_RX0 = 20,

    DREQ_PIO2_RX1 = 21,

    DREQ_PIO2_RX2 = 22,

    DREQ_PIO2_RX3 = 23,

    DREQ_SPI0_TX = 24,

    DREQ_SPI0_RX = 25,

    DREQ_SPI1_TX = 26,

    DREQ_SPI1_RX = 27,

    DREQ_UART0_TX = 28,

    DREQ_UART0_RX = 29,

    DREQ_UART1_TX = 30,

    DREQ_UART1_RX = 31,

    DREQ_PWM_WRAP0 = 32,

    DREQ_PWM_WRAP1 = 33,

    DREQ_PWM_WRAP2 = 34,

    DREQ_PWM_WRAP3 = 35,

    DREQ_PWM_WRAP4 = 36,

    DREQ_PWM_WRAP5 = 37,

    DREQ_PWM_WRAP6 = 38,

    DREQ_PWM_WRAP7 = 39,

    DREQ_PWM_WRAP8 = 40,

    DREQ_PWM_WRAP9 = 41,

    DREQ_PWM_WRAP10 = 42,

    DREQ_PWM_WRAP11 = 43,

    DREQ_I2C0_TX = 44,

    DREQ_I2C0_RX = 45,

    DREQ_I2C1_TX = 46,

    DREQ_I2C1_RX = 47,

    DREQ_ADC = 48,

    DREQ_XIP_STREAM = 49,

    DREQ_XIP_QMITX = 50,

    DREQ_XIP_QMIRX = 51,

    DREQ_HSTX = 52,

    DREQ_CORESIGHT = 53,

    DREQ_SHA256 = 54,

    DREQ_DMA_TIMER0 = 59,

    DREQ_DMA_TIMER1 = 60,

    DREQ_DMA_TIMER2 = 61,

    DREQ_DMA_TIMER3 = 62,

    DREQ_FORCE = 63,

    DREQ_COUNT

} dreq_num_t;

#endif


#endif // _DREQ_H


dreq_num_rp2350
dreq_num_rp2350
DREQ numbers for DMA pacing on RP2350 (used as typedef dreq_num_t)
Definition: dreq.h:81

dreq_num_t
enum dreq_num_rp2350 dreq_num_t
DREQ numbers for DMA pacing on RP2350 (used as typedef dreq_num_t)

DREQ_PWM_WRAP3
@ DREQ_PWM_WRAP3
Select PWM Counter 3's Wrap Value as DREQ.
Definition: dreq.h:117

DREQ_PIO1_RX2
@ DREQ_PIO1_RX2
Select PIO1's RX FIFO 2 as DREQ.
Definition: dreq.h:96

DREQ_SPI1_TX
@ DREQ_SPI1_TX
Select SPI1's TX FIFO as DREQ.
Definition: dreq.h:108

DREQ_SPI1_RX
@ DREQ_SPI1_RX
Select SPI1's RX FIFO as DREQ.
Definition: dreq.h:109

DREQ_I2C1_RX
@ DREQ_I2C1_RX
Select I2C1's RX FIFO as DREQ.
Definition: dreq.h:129

DREQ_PIO0_RX3
@ DREQ_PIO0_RX3
Select PIO0's RX FIFO 3 as DREQ.
Definition: dreq.h:89

DREQ_DMA_TIMER1
@ DREQ_DMA_TIMER1
Select DMA_TIMER0 as DREQ.
Definition: dreq.h:138

DREQ_PIO1_TX2
@ DREQ_PIO1_TX2
Select PIO1's TX FIFO 2 as DREQ.
Definition: dreq.h:92

DREQ_PWM_WRAP11
@ DREQ_PWM_WRAP11
Select PWM Counter 1's Wrap Value as DREQ.
Definition: dreq.h:125

DREQ_PWM_WRAP1
@ DREQ_PWM_WRAP1
Select PWM Counter 1's Wrap Value as DREQ.
Definition: dreq.h:115

DREQ_PIO0_TX3
@ DREQ_PIO0_TX3
Select PIO0's TX FIFO 3 as DREQ.
Definition: dreq.h:85

DREQ_PIO0_RX1
@ DREQ_PIO0_RX1
Select PIO0's RX FIFO 1 as DREQ.
Definition: dreq.h:87

DREQ_CORESIGHT
@ DREQ_CORESIGHT
Select CORESIGHT as DREQ.
Definition: dreq.h:135

DREQ_PWM_WRAP0
@ DREQ_PWM_WRAP0
Select PWM Counter 0's Wrap Value as DREQ.
Definition: dreq.h:114

DREQ_XIP_QMIRX
@ DREQ_XIP_QMIRX
Select XIP_QMIRX as DREQ.
Definition: dreq.h:133

DREQ_PIO2_TX1
@ DREQ_PIO2_TX1
Select PIO2's TX FIFO 1 as DREQ.
Definition: dreq.h:99

DREQ_PIO1_TX1
@ DREQ_PIO1_TX1
Select PIO1's TX FIFO 1 as DREQ.
Definition: dreq.h:91

DREQ_PIO1_TX0
@ DREQ_PIO1_TX0
Select PIO1's TX FIFO 0 as DREQ.
Definition: dreq.h:90

DREQ_SPI0_RX
@ DREQ_SPI0_RX
Select SPI0's RX FIFO as DREQ.
Definition: dreq.h:107

DREQ_UART0_RX
@ DREQ_UART0_RX
Select UART0's RX FIFO as DREQ.
Definition: dreq.h:111

DREQ_DMA_TIMER0
@ DREQ_DMA_TIMER0
Select DMA_TIMER0 as DREQ.
Definition: dreq.h:137

DREQ_PWM_WRAP8
@ DREQ_PWM_WRAP8
Select PWM Counter 8's Wrap Value as DREQ.
Definition: dreq.h:122

DREQ_SPI0_TX
@ DREQ_SPI0_TX
Select SPI0's TX FIFO as DREQ.
Definition: dreq.h:106

DREQ_PIO2_RX1
@ DREQ_PIO2_RX1
Select PIO2's RX FIFO 1 as DREQ.
Definition: dreq.h:103

DREQ_ADC
@ DREQ_ADC
Select the ADC as DREQ.
Definition: dreq.h:130

DREQ_PWM_WRAP4
@ DREQ_PWM_WRAP4
Select PWM Counter 4's Wrap Value as DREQ.
Definition: dreq.h:118

DREQ_I2C0_RX
@ DREQ_I2C0_RX
Select I2C0's RX FIFO as DREQ.
Definition: dreq.h:127

DREQ_PIO2_TX0
@ DREQ_PIO2_TX0
Select PIO2's TX FIFO 0 as DREQ.
Definition: dreq.h:98

DREQ_HSTX
@ DREQ_HSTX
Select HSTX as DREQ.
Definition: dreq.h:134

DREQ_I2C1_TX
@ DREQ_I2C1_TX
Select I2C1's TX FIFO as DREQ.
Definition: dreq.h:128

DREQ_XIP_QMITX
@ DREQ_XIP_QMITX
Select XIP_QMITX as DREQ.
Definition: dreq.h:132

DREQ_SHA256
@ DREQ_SHA256
Select SHA256 as DREQ.
Definition: dreq.h:136

DREQ_UART0_TX
@ DREQ_UART0_TX
Select UART0's TX FIFO as DREQ.
Definition: dreq.h:110

DREQ_PIO1_RX0
@ DREQ_PIO1_RX0
Select PIO1's RX FIFO 0 as DREQ.
Definition: dreq.h:94

DREQ_DMA_TIMER3
@ DREQ_DMA_TIMER3
Select DMA_TIMER3 as DREQ.
Definition: dreq.h:140

DREQ_PIO2_RX0
@ DREQ_PIO2_RX0
Select PIO2's RX FIFO 0 as DREQ.
Definition: dreq.h:102

DREQ_PWM_WRAP9
@ DREQ_PWM_WRAP9
Select PWM Counter 9's Wrap Value as DREQ.
Definition: dreq.h:123

DREQ_PIO1_RX1
@ DREQ_PIO1_RX1
Select PIO1's RX FIFO 1 as DREQ.
Definition: dreq.h:95

DREQ_PIO0_RX2
@ DREQ_PIO0_RX2
Select PIO0's RX FIFO 2 as DREQ.
Definition: dreq.h:88

DREQ_PIO2_RX2
@ DREQ_PIO2_RX2
Select PIO2's RX FIFO 2 as DREQ.
Definition: dreq.h:104

DREQ_PIO0_TX2
@ DREQ_PIO0_TX2
Select PIO0's TX FIFO 2 as DREQ.
Definition: dreq.h:84

DREQ_UART1_TX
@ DREQ_UART1_TX
Select UART1's TX FIFO as DREQ.
Definition: dreq.h:112

DREQ_PIO2_TX3
@ DREQ_PIO2_TX3
Select PIO2's TX FIFO 3 as DREQ.
Definition: dreq.h:101

DREQ_PIO1_TX3
@ DREQ_PIO1_TX3
Select PIO1's TX FIFO 3 as DREQ.
Definition: dreq.h:93

DREQ_PIO1_RX3
@ DREQ_PIO1_RX3
Select PIO1's RX FIFO 3 as DREQ.
Definition: dreq.h:97

DREQ_I2C0_TX
@ DREQ_I2C0_TX
Select I2C0's TX FIFO as DREQ.
Definition: dreq.h:126

DREQ_PIO2_TX2
@ DREQ_PIO2_TX2
Select PIO2's TX FIFO 2 as DREQ.
Definition: dreq.h:100

DREQ_DMA_TIMER2
@ DREQ_DMA_TIMER2
Select DMA_TIMER1 as DREQ.
Definition: dreq.h:139

DREQ_PIO0_RX0
@ DREQ_PIO0_RX0
Select PIO0's RX FIFO 0 as DREQ.
Definition: dreq.h:86

DREQ_PIO0_TX1
@ DREQ_PIO0_TX1
Select PIO0's TX FIFO 1 as DREQ.
Definition: dreq.h:83

DREQ_PWM_WRAP2
@ DREQ_PWM_WRAP2
Select PWM Counter 2's Wrap Value as DREQ.
Definition: dreq.h:116

DREQ_PWM_WRAP5
@ DREQ_PWM_WRAP5
Select PWM Counter 5's Wrap Value as DREQ.
Definition: dreq.h:119

DREQ_PWM_WRAP10
@ DREQ_PWM_WRAP10
Select PWM Counter 0's Wrap Value as DREQ.
Definition: dreq.h:124

DREQ_PIO0_TX0
@ DREQ_PIO0_TX0
Select PIO0's TX FIFO 0 as DREQ.
Definition: dreq.h:82

DREQ_PWM_WRAP7
@ DREQ_PWM_WRAP7
Select PWM Counter 7's Wrap Value as DREQ.
Definition: dreq.h:121

DREQ_PWM_WRAP6
@ DREQ_PWM_WRAP6
Select PWM Counter 6's Wrap Value as DREQ.
Definition: dreq.h:120

DREQ_UART1_RX
@ DREQ_UART1_RX
Select UART1's RX FIFO as DREQ.
Definition: dreq.h:113

DREQ_FORCE
@ DREQ_FORCE
Select FORCE as DREQ.
Definition: dreq.h:141

DREQ_PIO2_RX3
@ DREQ_PIO2_RX3
Select PIO2's RX FIFO 3 as DREQ.
Definition: dreq.h:105

DREQ_XIP_STREAM
@ DREQ_XIP_STREAM
Select the XIP Streaming FIFO as DREQ.
Definition: dreq.h:131