]> Git Repo - linux.git/commit
drivers/perf: add DDR Sub-System Driveway PMU driver for Yitian 710 SoC
authorShuai Xue <[email protected]>
Thu, 18 Aug 2022 03:18:21 +0000 (11:18 +0800)
committerWill Deacon <[email protected]>
Thu, 22 Sep 2022 13:09:10 +0000 (14:09 +0100)
commitcf7b61073e4526caa247616f6fbb174cbd2a5366
tree3b4faefa89d698ea7d66967bedea2c81c9398d42
parenta6f92909d6bb59eafa004178983850a1b739e304
drivers/perf: add DDR Sub-System Driveway PMU driver for Yitian 710 SoC

Add the DDR Sub-System Driveway Performance Monitoring Unit (PMU) driver
support for Alibaba T-Head Yitian 710 SoC chip. Yitian supports DDR5/4
DRAM and targets cloud computing and HPC.

Each PMU is registered as a device in /sys/bus/event_source/devices, and
users can select event to monitor in each sub-channel, independently. For
example, ali_drw_21000 and ali_drw_21080 are two PMU devices for two
sub-channels of the same channel in die 0. And the PMU device of die 1 is
prefixed with ali_drw_400XXXXX, e.g. ali_drw_40021000.

Due to hardware limitation, one of DDRSS Driveway PMU overflow interrupt
shares the same irq number with MPAM ERR_IRQ. To register DDRSS PMU and
MPAM drivers successfully, add IRQF_SHARED flag.

Signed-off-by: Shuai Xue <[email protected]>
Co-developed-by: Hongbo Yao <[email protected]>
Signed-off-by: Hongbo Yao <[email protected]>
Co-developed-by: Neng Chen <[email protected]>
Signed-off-by: Neng Chen <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Baolin Wang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
drivers/perf/Kconfig
drivers/perf/Makefile
drivers/perf/alibaba_uncore_drw_pmu.c [new file with mode: 0644]
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