perf/x86/intel: Add common intel_pmu_init_hybrid()
authorKan Liang <kan.liang@linux.intel.com>
Tue, 29 Aug 2023 12:58:06 +0000 (05:58 -0700)
committerIngo Molnar <mingo@kernel.org>
Tue, 29 Aug 2023 18:59:23 +0000 (20:59 +0200)
commit97588df87b56e27fd2b5d928d61c7a53e38afbb0
tree7fdd86a29e8e1bc80487d91afe93420fb01cf9bc
parentb0560bfd4b70277a4936c82e50e940aa253c95bf
perf/x86/intel: Add common intel_pmu_init_hybrid()

The current hybrid initialization codes aren't well organized and are
hard to read.

Factor out intel_pmu_init_hybrid() to do a common setup for each
hybrid PMU. The PMU-specific capability will be updated later via either
hard code (ADL) or CPUID hybrid enumeration (MTL).

Splitting the ADL and MTL initialization codes, since they have
different uarches. The hard code PMU capabilities are not required for
MTL either. They can be enumerated by the new leaf 0x23 and
IA32_PERF_CAPABILITIES MSR.

The hybrid enumeration of the IA32_PERF_CAPABILITIES MSR is broken on
MTL. Using the default value.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20230829125806.3016082-7-kan.liang@linux.intel.com
arch/x86/events/intel/core.c
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