drm/amd/display: Remove DISPCLK Limit Floor for Certain SMU Versions

drm/amd/display: Remove DISPCLK Limit Floor for Certain SMU Versions

[WHY]
SMU FW previously had an issue with lowering display clock to below 100
MHz, and a workaround was put in to limit it.  Newest SMU FW does not
have this issue, and no longer needs the 100MHz cap.

[HOW]
Remove the 100MHz cap based on the SMU FW version.

Signed-off-by: Sung Lee <[email protected]>
Reviewed-by: Yongqiang Sun <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>