Git Repo - linux.git/commit

]> Git Repo - linux.git/commit

author	Jiawen Wu <[email protected]>
	Wed, 23 Aug 2023 06:19:30 +0000 (14:19 +0800)
committer	David S. Miller <[email protected]>
	Fri, 25 Aug 2023 06:42:58 +0000 (07:42 +0100)
commit	2deea43f386d5c02cd490108aa3c6d02724594f8
tree	591c7e4124153c810384f189b5c6720c77d04d29	tree \| snapshot
parent	f629acc6f21043fdc80ae93cdafa6713888db0fd	commit \| diff

net: pcs: xpcs: add 1000BASE-X AN interrupt support

Enable CL37 AN complete interrupt for DW XPCS. It requires to clear the
bit(0) [CL37_ANCMPLT_INTR] of VR_MII_AN_INTR_STS after AN completed.

And there is a quirk for Wangxun devices to enable CL37 AN in backplane
configurations because of the special hardware design.

Signed-off-by: Jiawen Wu <[email protected]>
Signed-off-by: David S. Miller <[email protected]>

drivers/net/pcs/pcs-xpcs.c		diff \| blob \| blame \| history
drivers/net/pcs/pcs-xpcs.h		diff \| blob \| blame \| history

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