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i2c: mpc: Interrupt driven transfer
authorChris Packham <[email protected]>
Wed, 14 Apr 2021 22:33:20 +0000 (10:33 +1200)
committerWolfram Sang <[email protected]>
Thu, 15 Apr 2021 20:08:04 +0000 (22:08 +0200)
commit1538d82f4647c686f09888b36604dca2fc2bdaf6
treec8ded1dac98caf425fa2f1302b41ea1396ca033ctree | snapshot
parente5b2e3e742015dd2aa6bc7bcef2cb59b2de1221ccommit | diff
i2c: mpc: Interrupt driven transfer

The fsl-i2c controller will generate an interrupt after every byte
transferred. Make use of this interrupt to drive a state machine which
allows the next part of a transfer to happen as soon as the interrupt is
received. This is particularly helpful with SMBUS devices like the LM81
which will timeout if we take too long between bytes in a transfer.

Signed-off-by: Chris Packham <[email protected]>
Signed-off-by: Wolfram Sang <[email protected]>
drivers/i2c/busses/i2c-mpc.c diff | blob | blame | history
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