GuoHua Chen [Thu, 11 Jan 2024 08:56:54 +0000 (08:56 +0000)]
drm/radeon: Clean up errors in evergreen_reg.h
Fix the following errors reported by checkpatch:
ERROR: space prohibited before that close parenthesis ')'
ERROR: need consistent spacing around '<<' (ctx:WxV)
ERROR: need consistent spacing around '-' (ctx:WxV)
GuoHua Chen [Thu, 11 Jan 2024 08:51:58 +0000 (08:51 +0000)]
drm/radeon: Clean up errors in evergreen.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: spaces required around that '&=' (ctx:WxO)
ERROR: space required before that '~' (ctx:OxV)
ERROR: space prohibited before that close parenthesis ')'
ERROR: space required after that ',' (ctx:WxO)
ERROR: space required before that '&' (ctx:OxV)
ERROR: need consistent spacing around '*' (ctx:VxW)
GuoHua Chen [Thu, 11 Jan 2024 08:43:25 +0000 (08:43 +0000)]
drm/radeon/ci_dpm: Clean up errors in ci_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: need consistent spacing around '-' (ctx:WxV)
ERROR: space required before the open parenthesis '('
ERROR: "foo* bar" should be "foo *bar"
GuoHua Chen [Thu, 11 Jan 2024 08:14:56 +0000 (08:14 +0000)]
drm/radeon/btc_dpm: Clean up errors in btc_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space required before the open parenthesis '('
ERROR: spaces required around that '+=' (ctx:VxV)
ERROR: spaces required around that '=' (ctx:VxW)
GuoHua Chen [Thu, 11 Jan 2024 07:44:30 +0000 (07:44 +0000)]
drm/radeon/dpm: Clean up errors in sumo_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space prohibited before that close parenthesis ')'
ERROR: spaces required around that '?' (ctx:VxW)
GuoHua Chen [Thu, 11 Jan 2024 07:34:45 +0000 (07:34 +0000)]
drm/radeon: Clean up errors in trinity_dpm.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space prohibited before that ',' (ctx:WxW)
ERROR: need consistent spacing around '-' (ctx:WxV)
GuoHua Chen [Thu, 11 Jan 2024 07:28:33 +0000 (07:28 +0000)]
drm/radeon/trinity_dpm: Clean up errors in trinity_dpm.c
Fix the following errors reported by checkpatch:
ERROR: space required before the open parenthesis '('
ERROR: space prohibited before that close parenthesis ')'
ERROR: that open brace { should be on the previous line
Ma Jun [Fri, 12 Jan 2024 05:33:24 +0000 (13:33 +0800)]
drm/amdgpu: Fix the null pointer when load rlc firmware
If the RLC firmware is invalid because of wrong header size,
the pointer to the rlc firmware is released in function
amdgpu_ucode_request. There will be a null pointer error
in subsequent use. So skip validation to fix it.
Hawking Zhang [Fri, 29 Dec 2023 06:37:45 +0000 (14:37 +0800)]
drm/amdgpu: Centralize ras cap query to amdgpu_ras_check_supported
Move ras capablity check to amdgpu_ras_check_supported.
Driver will query ras capablity through psp interace, or
vbios interface, or specific ip callbacks.
Martin Leung [Tue, 2 Jan 2024 13:58:03 +0000 (08:58 -0500)]
drm/amd/display: 3.2.267
- Align the returned error code with legacy DP
- Allow Z8 for multiplane configurations on DCN35
- Set default Z8 minimum residency for DCN35
- Rework DC Z10 restore
- Enable Panel Replay for static screen use case
- Add DP audio BW validation
- Fix dml2 assigned pipe search
- Ensure populate uclk in bb construction
- Update P010 scaling cap
- Reenable windowed mpo odm support
- Fix DML2 watermark calculation
- Clear OPTC mem select on disable
- Floor to mhz when requesting dpp disp clock changes to SMU
- Port DENTIST hang and TDR fixes to OTG disable W/A
- Add logging resource checks
- Add Replay IPS register for DMUB command table
- Init link enc resources in dc_state only if res_pool presents
- Allow IPS2 during Replay
Wayne Lin [Tue, 2 Jan 2024 06:20:37 +0000 (14:20 +0800)]
drm/amd/display: Align the returned error code with legacy DP
[Why]
For usb4 connector, AUX transaction is handled by dmub utilizing a differnt
code path comparing to legacy DP connector. If the usb4 DP connector is
disconnected, AUX access will report EBUSY and cause igt@kms_dp_aux_dev
fail.
[How]
Align the error code with the one reported by legacy DP as EIO.
[Why]
The call currently does two things:
1. Exits DMCUB from idle optimization if it was in
2. Checks DMCUB scratch register to determine if we need to call
DMCUB to do deferred HW restore and then sends the command if it's
ready for it.
By doing (1) we prevent driver idle from being renotified in the cases
where driver had previously allowed DC level idle optimizations via
dc_allow_idle_optimizations since it thinks:
allow == dc->idle_optimizations_allowed
...and that the operation is a no-op.
We want driver idle to be resent at the next opprotunity to do so
for video playback cases.
[How]
Migrate all usecases of dc_z10_restore to only perform (2).
Add extra calls to dc_allow_idle_optimizations to handle (1) and also
keep SW state matching with when we requested enter/exit of DMCUB
idle optimizations.
Ensure cursor idle optimizations false always get called when IPS
is supported.
Further rework/redesign is needed to decide whether we need a separate
level of DM allow vs DC allow and when to attempt re-entry.
Tom Chung [Wed, 6 Dec 2023 14:07:51 +0000 (22:07 +0800)]
drm/amd/display: Enable Panel Replay for static screen use case
[Why]
Enable the Panel Replay if eDP panel and ASIC support.
(prioritize Panel Replay over PSR)
[How]
- Setup the Panel Replay config during the device init
(prioritize Panel Replay over PSR).
- Separate the Replay init function into two functions
amdgpu_dm_link_setup_replay() and amdgpu_dm_set_replay_caps()
to fix the issue in the earlier commit that cause PSR and Replay
enabled at the same time.
George Shen [Tue, 21 Nov 2023 23:32:52 +0000 (18:32 -0500)]
drm/amd/display: Add DP audio BW validation
[Why]
Timings with small HBlank (such as CVT RBv2) can result in insufficient
HBlank bandwidth for audio SDP transmission when DSC is active. This
will cause some higher bandwidth audio modes to fail.
The combination of CVT RBv2 timings + DSC can commonly be encountered
in MST scenarios.
[How]
Add DP audio bandwidth validation for 8b/10b MST and 128b/132b SST/MST
cases and filter out modes that cannot be supported with the current
timing config.
[Why & How]
DML2 currently finds assigned pipes in array order rather than the
existing linked list order. This results in rearranging pipe order
on flip and more importantly otg inst and pipe idx mismatch.
This change preserves the order of existing pipes and guarantees
the head pipe will have matching otg inst and pipe idx.
Alvin Lee [Thu, 4 Jan 2024 18:40:04 +0000 (13:40 -0500)]
drm/amd/display: Ensure populate uclk in bb construction
[Description]
- For some SKUs, the optimal DCFCLK for each UCLK is less than the
smallest DCFCLK STA target due to low memory bandwidth. There is
an assumption that the DCFCLK STA targets will always be less
than one of the optimal DCFCLK values, but this is not true for
SKUs that have low memory bandwidth. In this case we need to
populate the optimal UCLK for each DCFCLK STA targets as the max
UCLK freq.
- Also fix a bug in DML where start_state is not assigned and used
correctly.
Ilya Bakoulin [Wed, 3 Jan 2024 14:42:04 +0000 (09:42 -0500)]
drm/amd/display: Clear OPTC mem select on disable
[Why]
Not clearing the memory select bits prior to OPTC disable can cause DSC
corruption issues when attempting to reuse a memory instance for another
OPTC that enables ODM.
[How]
Clear the memory select bits prior to disabling an OPTC.
Wenjing Liu [Tue, 2 Jan 2024 21:06:35 +0000 (16:06 -0500)]
drm/amd/display: Floor to mhz when requesting dpp disp clock changes to SMU
[Why]
SMU uses discrete dpp and disp clock levels. When we submit SMU request
for clock changes in Mhz we need to floor the requested value from Khz so
SMU will choose the next higher clock level in Khz to set. If we ceil to
Mhz, SMU will have to choose the next higher clock level after the ceil,
which could result in unnecessarily jumpping to the next level.
For example, we request 1911,111Khz which is exactly one of the SMU preset
level. If we pass 1912Mhz, SMU will choose 2150,000 khz. If we pass
1911Mhz, SMU will choose 1911,111kHz, which is the expected value.
Theoretically, it would be possible for a buggy or malicious VBIOS to
overwrite past the bounds of the passed parameters (or its own
workspace); add bounds checking to prevent this from happening.
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3093 Signed-off-by: Alexander Richards <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Theoretically, it would be possible for a buggy or malicious VBIOS to
overwrite past the bounds of the passed parameters (or its own
workspace); add bounds checking to prevent this from happening.
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3093 Signed-off-by: Alexander Richards <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Dillon Varone [Fri, 29 Dec 2023 02:36:39 +0000 (21:36 -0500)]
drm/amd/display: Init link enc resources in dc_state only if res_pool presents
[Why & How]
res_pool is not initialized in all situations such as virtual
environments, and therefore link encoder resources should not be
initialized if res_pool is NULL.
drm/amd/display: Fix late derefrence 'dsc' check in 'link_set_dsc_pps_packet()'
In link_set_dsc_pps_packet(), 'struct display_stream_compressor *dsc'
was dereferenced in a DC_LOGGER_INIT(dsc->ctx->logger); before the 'dsc'
NULL pointer check.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c:905 link_set_dsc_pps_packet() warn: variable dereferenced before check 'dsc' (see line 903)
drm/amdkfd: Fix variable dereferenced before NULL check in 'kfd_dbg_trap_device_snapshot()'
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_debug.c:1024 kfd_dbg_trap_device_snapshot() warn: variable dereferenced before check 'entry_size' (see line 1021)
Ma Jun [Mon, 18 Dec 2023 03:32:06 +0000 (11:32 +0800)]
drm/amdgpu: Check extended configuration space register when system uses large bar
Some customer platforms do not enable mmconfig for various reasons,
such as bios bug, and therefore cannot access the GPU extend configuration
space through mmio.
When the system enters the d3cold state and resumes, the amdgpu driver
fails to resume because the extend configuration space registers of
GPU can't be restored. At this point, Usually we only see some failure
dmesg log printed by amdgpu driver, it is difficult to find the root
cause.
Therefor print a warnning message if the system can't access the
extended configuration space register when using large bar.
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