Laurent Pinchart [Wed, 26 Feb 2020 11:25:00 +0000 (13:25 +0200)]
drm/omap: Remove HPD, detect and EDID omapdss operations
Due to the removal of several omapdrm display drivers, the omapdss HPD,
detected and EDID operations are not used anymore. Remove them and all
related code.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:59 +0000 (13:24 +0200)]
drm/omap: Switch the HDMI and VENC outputs to drm_bridge
The TPD12S015, OPA362 and analog and HDMI connectors are now supported
by DRM bridge drivers, and the omapdrm HDMI and VENC outputs can be
handled through the drm_bridge API. Switch the outputs to drm_bridge by
making the next bridge mandatory and removing the related
omapdrm-specific display drivers.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:58 +0000 (13:24 +0200)]
drm/omap: Create connector for bridges
Use the drm_bridge_connector helper to create a connector for pipelines
that use drm_bridge. This allows splitting connector operations across
multiple bridges when necessary, instead of having the last bridge in
the chain creating the connector and handling all connector operations
internally.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:57 +0000 (13:24 +0200)]
drm/omap: venc: Register a drm_bridge
In order to integrate with a chain of drm_bridge, the internal VENC
encoder has to expose the mode valid, fixup and set, the enable and
disable and the get modes operations through the drm_bridge API.
Register a bridge at initialisation time to do so.
Most of those operations are removed from the omap_dss_device as they
are now called through the drm_bridge API by the DRM atomic helpers. The
only exception is the .get_modes() operation that is still invoked
through the omap_dss_device-based pipeline.
For the time being make the next bridge in the chain optional as the
VENC output is still based on omap_dss_device. The create_connector
argument to the bridge attach function is also ignored for the same
reason. This will be changed later when removing the related
omapdrm-specific display drivers.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:54 +0000 (13:24 +0200)]
drm/omap: hdmi5: Move mode set, enable and disable operations to bridge
Move the omap_dss_device .set_timings(), .enable() and .disable()
operations to the drm_bridge functions. As the drm_bridge for the HDMI
encoder is unconditionally registered and attached, those operations
will be called at the appropriate time.
The omapdss device .set_infoframe() and .set_hdmi_mode() operations have
no equivalent in drm_bridge. Thir content is thus moved to the bridge
.enable() operation as the data they store is not needed before the HDMI
encoder gets enabled.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:53 +0000 (13:24 +0200)]
drm/omap: hdmi4: Move mode set, enable and disable operations to bridge
Move the omap_dss_device .set_timings(), .enable() and .disable()
operations to the drm_bridge functions. As the drm_bridge for the HDMI
encoder is unconditionally registered and attached, those operations
will be called at the appropriate time.
The omapdss device .set_infoframe() and .set_hdmi_mode() operations have
no equivalent in drm_bridge. Thir content is thus moved to the bridge
.enable() operation as the data they store is not needed before the HDMI
encoder gets enabled.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:52 +0000 (13:24 +0200)]
drm/omap: hdmi5: Register a drm_bridge for EDID read
In order to integrate with a chain of drm_bridge, the internal HDMI5
encoder has to expose the EDID read operation through the drm_bridge
API. Register a bridge at initialisation time to do so.
For the time being make the next bridge in the chain optional as the
HDMI output is still based on omap_dss_device. The create_connector
argument to the bridge attach function is also ignored for the same
reason. This will be changed later when removing the related
omapdrm-specific display drivers.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:51 +0000 (13:24 +0200)]
drm/omap: hdmi4: Register a drm_bridge for EDID read
In order to integrate with a chain of drm_bridge, the internal HDMI4
encoder has to expose the EDID read operation through the drm_bridge
API. Register a bridge at initialisation time to do so.
For the time being make the next bridge in the chain optional as the
HDMI output is still based on omap_dss_device. The create_connector
argument to the bridge attach function is also ignored for the same
reason. This will be changed later when removing the related
omapdrm-specific display drivers.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:50 +0000 (13:24 +0200)]
drm/omap: hdmi5: Rework EDID read to isolate data read
In preparation of adding DRM bridge support to the hdmi5 encoder code,
rework the EDID read to isolate data read.
The hdmi_read_edid() function is the main entry point. It performs all
initialisation steps required prior to reading the EDID (such as
ensuring the device is powered on), as well as corresponding cleanup
steps afterwards. EDID read itself is handled by hdmi_read_edid_data()
that calls the hdmi5_core_ddc_read() function to read individual blocks.
This new code architecture will allow reusing hdmi_read_edid() and
hdmi5_core_ddc_read() for the drm_bridge EDID read implementation, while
swapping out hdmi_read_edid_data() for the DRM drm_do_get_edid()
function.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:49 +0000 (13:24 +0200)]
drm/omap: hdmi4: Rework EDID read to isolate data read
In preparation of adding DRM bridge support to the hdmi4 encoder code,
rework the EDID read to isolate data read.
The hdmi_read_edid() function is the main entry point. It performs all
initialisation steps required prior to reading the EDID (such as
ensuring the device is powered on), as well as corresponding cleanup
steps afterwards. EDID read itself is handled by hdmi_read_edid_data()
that calls the hdmi4_core_ddc_read() function to read individual blocks.
This new code architecture will allow reusing hdmi_read_edid() and
hdmi4_core_ddc_read() for the drm_bridge EDID read implementation, while
swapping out hdmi_read_edid_data() for the DRM drm_do_get_edid()
function.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:47 +0000 (13:24 +0200)]
drm/omap: dss: Make omap_dss_device_ops optional
As part of the move to drm_bridge ops, the dssdev ops will become empty
for some of the internal encoders. Make them optional in the driver to
allow them to be removed completely, easing the transition.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:46 +0000 (13:24 +0200)]
drm/omap: Add infrastructure to support drm_bridge local to DSS outputs
In order to support drm_bridge-based pipeline, the internal HDMI
encoders will need to expose the EDID read operation through the
drm_bridge API, and thus to expose a drm_bridge instance corresponding
to the encoder. The HDMI encoders are however handled as omap_dss_device
instances, which conflicts with this requirement.
In order to move forward with the drm_bridge transition, add support for
creating drm_bridge instances local to DSS outputs. If a local bridge is
passed to the omapdss_device_init_output() function, it is used as the
first bridge in the chain, and the omap_dss_device.next_bridge field is
set to the next bridge for the use of the internal encoders' bridges.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:45 +0000 (13:24 +0200)]
drm/omap: dss: Fix output next device lookup in DT
The DSS core looks up the next device connected to an output by
traversing the OF graph. It currently hardcodes the local port number to
0, which breaks any output with a different port number (SDI on OMAP3
and any DPI output but the first one). Fix this by repurposing the
currently unused of_ports bitmask in omap_dss_device with an of_port
output port number, and use it to traverse the OF graph.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:44 +0000 (13:24 +0200)]
drm/omap: Use the drm_panel_bridge API
Replace the manual panel handling code by a drm_panel_bridge. This
simplifies the driver and allows all components in the display pipeline
to be treated as bridges, paving the way to generic connector handling.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:43 +0000 (13:24 +0200)]
drm/omap: Factor out display type to connector type conversion
Move the code that computes the DRM connector type for the
omapdss_device display type to a new omapdss_device_connector_type()
function for later reuse.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:41 +0000 (13:24 +0200)]
drm/omap: dss: Cleanup DSS ports on initialisation failure
When the DSS initialises its output DPI and SDI ports, failures don't
clean up previous successfully initialised ports. This can lead to
resource leak or memory corruption. Fix it.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:40 +0000 (13:24 +0200)]
drm: Add helper to create a connector for a chain of bridges
Most bridge drivers create a DRM connector to model the connector at the
output of the bridge. This model is historical and has worked pretty
well so far, but causes several issues:
- It prevents supporting more complex display pipelines where DRM
connector operations are split over multiple components. For instance a
pipeline with a bridge connected to the DDC signals to read EDID data,
and another one connected to the HPD signal to detect connection and
disconnection, will not be possible to support through this model.
- It requires every bridge driver to implement similar connector
handling code, resulting in code duplication.
- It assumes that a bridge will either be wired to a connector or to
another bridge, but doesn't support bridges that can be used in both
positions very well (although there is some ad-hoc support for this in
the analogix_dp bridge driver).
In order to solve these issues, ownership of the connector needs to be
moved to the display controller driver.
To avoid code duplication in display controller drivers, add a new
helper to create and manage a DRM connector backed by a chain of
bridges. All connector operations are delegating to the appropriate
bridge in the chain.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:39 +0000 (13:24 +0200)]
drm/bridge: tfp410: Allow operation without drm_connector
The tfp410 driver can operate as part of a pipeline where the
drm_connector is created by the display controller. Enable this mode of
operation by skipping creation of a drm_connector internally.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:38 +0000 (13:24 +0200)]
drm/bridge: tfp410: Replace manual connector handling with bridge
Now that a driver is available for display connectors, replace the
manual connector handling code with usage of the DRM bridge API. The
tfp410 driver doesn't deal with the display connector directly anymore,
but still delegates drm_connector operations to the next bridge. This
brings us one step closer to having the tfp410 driver handling the
TFP410 only.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:35 +0000 (13:24 +0200)]
drm/bridge: Add bridge driver for display connectors
Display connectors are modelled in DT as a device node, but have so far
been handled manually in several bridge drivers. This resulted in
duplicate code in several bridge drivers, with slightly different (and
thus confusing) logics.
In order to fix this, implement a bridge driver for display connectors.
The driver centralises logic for the DVI, HDMI, VGAn composite and
S-video connectors and exposes corresponding bridge operations.
This driver in itself doesn't solve the issue completely, changes in
bridge and display controller drivers are needed to make use of the new
connector driver.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:32 +0000 (13:24 +0200)]
drm/bridge: simple-bridge: Add support for non-VGA bridges
Create a new simple_bridge_info structure that stores information about
the bridge model, and store the bridge timings in there, along with the
connector type. Use that new structure for of_device_id data. This
enables support for non-VGA bridges.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:30 +0000 (13:24 +0200)]
drm/bridge: dumb-vga-dac: Rename internal symbols to simple-bridge
The dumb-vga-dac driver is a simple DRM bridge driver for simple VGA
DACs that don't require configuration. Other non-VGA bridges fall in a
similar category, and would benefit from a common driver. Prepare for
this by renaming the internal symbols from dumb-vga-dac to
simple-bridge.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:29 +0000 (13:24 +0200)]
drm/bridge: Extend bridge API to disable connector creation
Most bridge drivers create a DRM connector to model the connector at the
output of the bridge. This model is historical and has worked pretty
well so far, but causes several issues:
- It prevents supporting more complex display pipelines where DRM
connector operations are split over multiple components. For instance a
pipeline with a bridge connected to the DDC signals to read EDID data,
and another one connected to the HPD signal to detect connection and
disconnection, will not be possible to support through this model.
- It requires every bridge driver to implement similar connector
handling code, resulting in code duplication.
- It assumes that a bridge will either be wired to a connector or to
another bridge, but doesn't support bridges that can be used in both
positions very well (although there is some ad-hoc support for this in
the analogix_dp bridge driver).
In order to solve these issues, ownership of the connector should be
moved to the display controller driver (where it can be implemented
using helpers provided by the core).
Extend the bridge API to allow disabling connector creation in bridge
drivers as a first step towards the new model. The new flags argument to
the bridge .attach() operation allows instructing the bridge driver to
skip creating a connector. Unconditionally set the new flags argument to
0 for now to keep the existing behaviour, and modify all existing bridge
drivers to return an error when connector creation is not requested as
they don't support this feature yet.
The change is based on the following semantic patch, with manual review
and edits.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:28 +0000 (13:24 +0200)]
drm/bridge: Add interlace_allowed flag to drm_bridge
In preparation for a connector creation helper based on a chain of
bridges, add a flag to the drm_bridge structure to report support for
interlaced modes. This will be used to set the connector's
interlace_allowed flag.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:25 +0000 (13:24 +0200)]
drm/bridge: Fix atomic state ops documentation
The drm_bridge_funcs atomic_state_duplicate and atomic_state_destroy
operations are erroneously documented as having a default implementation
if not implemented in bridge drivers. This isn't correct, fix the
documentation.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:23 +0000 (13:24 +0200)]
drm/edid: Add flag to drm_display_info to identify HDMI sinks
The drm_display_info structure contains many fields related to HDMI
sinks, but none that identifies if a sink compliant with CEA-861 (EDID)
shall be treated as an HDMI sink or a DVI sink. Add such a flag, and
populate it according to section 8.3.3 ("DVI/HDMI Device
Discrimination") of the HDMI v1.3 specification.
Laurent Pinchart [Wed, 26 Feb 2020 11:24:22 +0000 (13:24 +0200)]
drm/connector: Add helper to get a connector type name
drm_connector.c contains a map of connector types (DRM_MODE_CONNECTOR_*)
to name strings, but doesn't expose it. This leads to drivers having to
store a similar map.
Add a new drm_get_connector_type_name() helper function that return a
name string for a connector type.
Nicolas Boichat [Fri, 7 Feb 2020 05:26:25 +0000 (13:26 +0800)]
drm/panfrost: Add support for multiple power domains
When there is a single power domain per device, the core will
ensure the power domain is switched on (so it is technically
equivalent to having not power domain specified at all).
However, when there are multiple domains, as in MT8183 Bifrost
GPU, we need to handle them in driver code.
Rodrigo Vivi [Tue, 25 Feb 2020 17:29:58 +0000 (09:29 -0800)]
Merge drm/drm-next into drm-intel-next-queued
Some DSI and VBT pending patches from Hans will apply
cleanly and with less ugly conflicts if they are rebuilt
on top of other patches that recently landed on drm-next.
Reference: https://patchwork.freedesktop.org/series/70952/ Cc: Hans de Goede <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]
Yu-ting Shen [Fri, 7 Feb 2020 07:19:31 +0000 (15:19 +0800)]
drm/amd/display: limit display clock to 100MHz to avoid FIFO error
[Why]
when changing display clock, SMU need to use power up DFS and use
DENTIST to ramp DFS DID to switch target frequency before switching back
to bypass.
[How]
fixed the minimum display clock to 100MHz, it's W/A the same with PCO.
Sung Lee [Tue, 18 Feb 2020 20:53:28 +0000 (15:53 -0500)]
drm/amd/display: Make clock table struct more accessible
[WHY]
Currently clock table struct is very far down in the bounding box struct
making it hard to find while debugging, especially when using the
dal3dbgext.
[HOW]
Move it up so it is the first struct defined, and therefore much easier
to find and access.
Yongqiang Sun [Fri, 14 Feb 2020 17:55:55 +0000 (12:55 -0500)]
drm/amd/display: optimize prgoram wm and clks
[Why]
In some display configuration like 1080P monitor playing a 1080P video,
if user use ALT+F4 to exit Movie and TV, there is a chance clocks are
same only water mark changed. Current clock optimization machanism will
result in water mark keeps high after exit Movie and TV app.
[How]
Return if watermark need to be optimized when doing program watermark,
perform the optimization after.
Alvin Lee [Thu, 13 Feb 2020 14:58:36 +0000 (09:58 -0500)]
drm/amd/display: Update TTU properly
[Why]
We need to update TTU properly if DRAMClockChangeWatermark changes. If
TTU < DRAMClockChangeWatermark, we pstate won't be allowed and we will
hang in some PSR cases.
[How]
Update TTU if DramClockChangeWatermark value increases (only if TTU was
dependent on the watermark value on the DRAMClockChangeWatermark value
in the first place).
Michael Strauss [Thu, 13 Feb 2020 20:08:13 +0000 (15:08 -0500)]
drm/amd/display: Fix RV2 Variant Detection
[WHY]
RV2 and variants are indistinguishable by hw internal rev alone, need to
be distinguishable in order to correctly set max vlevel. Previous
detection change incorrectly checked for hw internal rev.
[HOW]
Use pci revision to check if RV2 or low power variant Correct a few
overlapping ASICREV range checks
Peikang Zhang [Thu, 13 Feb 2020 21:05:23 +0000 (16:05 -0500)]
drm/amd/display: Add visual confirm support for FreeSync 2 ARGB2101010
[Why]
DalMPVisualConfirm does not support FreeSync 2 ARGB2101010 which causes
black visual confirm bar when playing HDR video on FreeSync 2 display in
full screen mode
[How]
Added pink color for DalMPVisualConfirm on FreeSync 2 ARGB2101010
surface
Jaehyun Chung [Tue, 11 Feb 2020 16:19:41 +0000 (11:19 -0500)]
drm/amd/display: Monitor patch to delay setting ignore MSA bit
[Why]
Some displays clear ignore MSA bit on mode change, which cause
blackscreen when programming variable vtotals. Ignore MSA bit needs
programming needs to be delayed or re-set to be retained.
[How]
Create patch to delay programming ignore MSA bit after unblanking
stream.
David Galiffi [Wed, 29 Jan 2020 22:02:32 +0000 (17:02 -0500)]
drm/amd/display: Workaround required for link training reliability
[Why]
A software workaround is required for all vendor-built cards on platform.
[How]
When performing DP link training, we must send TPS1 before DPCD:100h is
written with the proper bit rate value. This change must be applies in
ALL cases when LT happens.
Vladimir Stempen [Mon, 27 Jan 2020 18:07:45 +0000 (13:07 -0500)]
drm/amd/display: programming last delta in output transfer function LUT to a correct value
[Why]
Currently DAL programs negative slope for the last point of output
transfer function curve.
[How]
Applying a check for the last PWL point for RGB values not to be
smaller than previous. If smaller, initialize the last point values
to a sum of previous PWL value and previous PWL delta;
Peikang Zhang [Fri, 7 Feb 2020 21:53:28 +0000 (16:53 -0500)]
drm/amd/display: System crashes when add_ptb_to_table() gets called
[Why]
Unused VMIDs were not evicted correctly
[How]
1. evict_vmids() logic was fixed;
2. Added boundary check for add_ptb_to_table() and
clear_entry_from_vmid_table() to avoid crash caused by array out of
boundary;
3. For mod_vmid_get_for_ptb(), vimd is changed from unsigned to signed
due to vimd is signed.
Samson Tam [Tue, 4 Feb 2020 19:26:30 +0000 (14:26 -0500)]
drm/amd/display: do not force UCLK DPM to stay at highest state during display off in DCN2
[Why]
Add optimization to allow pstate change support when all displays
are off in DCN2.
[How]
Add clk_mgr_helper_get_active_plane_cnt() to sum plane_count for all
valid stream_status[]. If plane_count is 0, then there are no active
or virtual streams present. Use plane_count == 0 as extra condition to
enable p_state_change_support in dcn2_update_clocks().
drm/amd/display: Don't ask PSP to load DMCUB for backdoor load
[Why]
If we're doing backdoor load then do it entirely ourselves without
invoking any of the frontdoor path to avoid potential issues with
outdated tOS.
[How]
Check the load type and don't pass it to base if we don't want it
loaded.
drm/amd/display: Wait for DMCUB to finish loading before executing commands
[Why]
When we execute the first command for ASIC_INIT for command table
offloading we can hit a timing scenario such that the interrupts
for the inbox wptr haven't been enabled yet and the first command
is ignored until the second command is sent.
[How]
This happens when either the SCRATCH0 is already the correct status
code or autoload check is unsupported.
Clear SCRATCH0 during reset.
Also ensure that we don't accidentally reset the ASIC again in case
of a hang by clearing GPINT while we're at it.
Currently there is a minor error in scaling filter coefficients
caused by truncation to fit the HW registers.This error accummulates
with increased taps, but has gone unnoticed due to vast majority of
scaling being done with only 4 taps.
Scaling filters are now updated using HW team's filter generator
which has quantization error minimization built in.
Zhan Liu [Fri, 21 Feb 2020 22:25:47 +0000 (17:25 -0500)]
drm/amd/display: Add aconnector condition check for dpcd read
[Why]
core_link_read_dpcd() will invoke dm_helpers_dp_read_dpcd(),
which needs to read dpcd info with the help of aconnector.
If aconnector (dc->links[i]->prev) is NULL, then dpcd status
cannot be read.
As a result, dpcd read fails and a line of error will be
printed out in dmesg.log as:
"*ERROR* Failed to found connector for link!"
[How]
Make sure that aconnector (dc->links[i]->prev) is not NULL,
then read dpcd status.
Using a heavy-weight TLB flush once is not sufficient. Concurrent
memory accesses in the same TLB cache line can re-populate TLB entries
from stale texture cache (TC) entries while the heavy-weight TLB
flush is in progress. To fix this race condition, perform another TLB
flush after the heavy-weight one, when TC is known to be clean.
Move the workaround into the low-level TLB flushing functions. This way
they apply to amdgpu as well, and KIQ-based TLB flush only needs to
synchronize once.
Monk Liu [Thu, 6 Feb 2020 15:55:58 +0000 (23:55 +0800)]
drm/amdgpu: fix colliding of preemption
what:
some os preemption path is messed up with world switch preemption
fix:
cleanup those logics so os preemption not mixed with world switch
this patch is a general fix for issues comes from SRIOV MCBP, but
there is still UMD side issues not resovlved yet, so this patch
cannot fix all world switch bug.
Boris Brezillon [Tue, 28 Jan 2020 13:55:12 +0000 (14:55 +0100)]
drm/bridge: panel: Propagate bus format/flags
Propagate bus format/flags so that the previous bridge element in the
chain knows which input format the panel bridge expects.
v11:
* Fix a typo in the subject
* Update the commit message so it's readable by itself
v10:
* Add changelog to the commit message
v8 -> v9:
* No changes
v7:
* Set atomic state hooks explicitly
v4 -> v6:
* Not part of the series
v3:
* Adjust things to match the new bus-format negotiation approach
* Use drm_atomic_helper_bridge_propagate_bus_fmt
* Don't implement ->atomic_check() (the core now takes care of bus
flags propagation)
v2:
* Adjust things to match the new bus-format negotiation approach
Laurent Pinchart [Mon, 24 Feb 2020 22:56:45 +0000 (00:56 +0200)]
drm/bridge: lvds-codec: Add to_lvds_codec() function
Factor out the manual container_of() uses to a common to_lvds_codec()
macro to shorten lines (and provide better type safety, although that
won't matter much in this case).
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