From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Date: Wed, 20 Feb 2019 16:09:20 +0000 (+0000)
Subject: clk: renesas: r8a774c0: Fix LAST_DT_CORE_CLK
X-Git-Tag: v5.1-rc1~34^2~10^6~1
X-Git-Url: https://repo.jachan.dev/linux.git/commitdiff_plain/e61b30bb34b6206f76e623269a41b65cd3989fff

clk: renesas: r8a774c0: Fix LAST_DT_CORE_CLK

Enum LAST_DT_CORE_CLK needs updating as R8A774C0_CLK_CANFD
was recently added and it's the core clock with the highest
index.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Fixes: 2a6efbc6da5d248c ("clk: renesas: r8a774c0: Add missing CANFD clock")
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---

diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
index aeadb4d66f3e..34e274f2a273 100644
--- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
@@ -22,7 +22,7 @@
 
 enum clk_ids {
 	/* Core Clock Outputs exported to DT */
-	LAST_DT_CORE_CLK = R8A774C0_CLK_CPEX,
+	LAST_DT_CORE_CLK = R8A774C0_CLK_CANFD,
 
 	/* External Input Clocks */
 	CLK_EXTAL,