From: Dan Williams <dan.j.williams@intel.com>
Date: Mon, 26 Jun 2023 00:53:18 +0000 (-0700)
Subject: Merge branch 'for-6.5/cxl-perf' into for-6.5/cxl
X-Git-Tag: v6.5-rc1~95^2~3
X-Git-Url: https://repo.jachan.dev/linux.git/commitdiff_plain/d2f9fe695313b1e50028c1ec4cd09bea67152a60

Merge branch 'for-6.5/cxl-perf' into for-6.5/cxl

Pick up initial support for the CXL 3.0 performance monitoring
definition. Small conflicts with the firmware update work as they both
placed their init code in the same location.
---

d2f9fe695313b1e50028c1ec4cd09bea67152a60
diff --cc drivers/cxl/cxl.h
index d2bae6d68365,496ca9be8f0b..bc917a75333f
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@@ -262,12 -264,17 +272,17 @@@ void cxl_probe_component_regs(struct de
  void cxl_probe_device_regs(struct device *dev, void __iomem *base,
  			   struct cxl_device_reg_map *map);
  int cxl_map_component_regs(struct device *dev, struct cxl_component_regs *regs,
 -			   struct cxl_register_map *map,
 +			   const struct cxl_register_map *map,
  			   unsigned long map_mask);
  int cxl_map_device_regs(struct device *dev, struct cxl_device_regs *regs,
 -			struct cxl_register_map *map);
 +			const struct cxl_register_map *map);
+ int cxl_map_pmu_regs(struct pci_dev *pdev, struct cxl_pmu_regs *regs,
+ 		     struct cxl_register_map *map);
  
  enum cxl_regloc_type;
+ int cxl_count_regblock(struct pci_dev *pdev, enum cxl_regloc_type type);
+ int cxl_find_regblock_instance(struct pci_dev *pdev, enum cxl_regloc_type type,
+ 			       struct cxl_register_map *map, int index);
  int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type,
  		      struct cxl_register_map *map);
  
diff --cc drivers/cxl/pci.c
index 18cfb7ae17a3,4c3bd20ec7c8..270d63d11e17
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@@ -821,11 -655,10 +822,11 @@@ static int cxl_event_config(struct pci_
  static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  {
  	struct pci_host_bridge *host_bridge = pci_find_host_bridge(pdev->bus);
 +	struct cxl_memdev_state *mds;
 +	struct cxl_dev_state *cxlds;
  	struct cxl_register_map map;
  	struct cxl_memdev *cxlmd;
- 	int rc;
 -	struct cxl_dev_state *cxlds;
+ 	int i, rc, pmu_count;
  
  	/*
  	 * Double check the anonymous union trickery in struct cxl_regs
@@@ -915,11 -747,30 +916,34 @@@
  	if (IS_ERR(cxlmd))
  		return PTR_ERR(cxlmd);
  
 +	rc = cxl_memdev_setup_fw_upload(mds);
 +	if (rc)
 +		return rc;
 +
+ 	pmu_count = cxl_count_regblock(pdev, CXL_REGLOC_RBI_PMU);
+ 	for (i = 0; i < pmu_count; i++) {
+ 		struct cxl_pmu_regs pmu_regs;
+ 
+ 		rc = cxl_find_regblock_instance(pdev, CXL_REGLOC_RBI_PMU, &map, i);
+ 		if (rc) {
+ 			dev_dbg(&pdev->dev, "Could not find PMU regblock\n");
+ 			break;
+ 		}
+ 
+ 		rc = cxl_map_pmu_regs(pdev, &pmu_regs, &map);
+ 		if (rc) {
+ 			dev_dbg(&pdev->dev, "Could not map PMU regs\n");
+ 			break;
+ 		}
+ 
+ 		rc = devm_cxl_pmu_add(cxlds->dev, &pmu_regs, cxlmd->id, i, CXL_PMU_MEMDEV);
+ 		if (rc) {
+ 			dev_dbg(&pdev->dev, "Could not add PMU instance\n");
+ 			break;
+ 		}
+ 	}
+ 
 -	rc = cxl_event_config(host_bridge, cxlds);
 +	rc = cxl_event_config(host_bridge, mds);
  	if (rc)
  		return rc;