From: Linus Torvalds Date: Mon, 3 Feb 2025 17:04:21 +0000 (-0800) Subject: Merge tag 'irq-urgent-2025-02-03' of git://git.kernel.org/pub/scm/linux/kernel/git... X-Git-Tag: v6.14-rc2~37 X-Git-Url: https://repo.jachan.dev/linux.git/commitdiff_plain/a360f3ffd005fe00f002c033b2548aba57af8c9a Merge tag 'irq-urgent-2025-02-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Thomas Gleixner: - Ensure ordering of memory and device I/O for IPIs on RISCV The RISCV interrupt controllers use writel_relaxed() for generating an IPI. That's a device I/O write which is not guaranteed to be ordered against preceding memory writes. As a consequence a IPI receiving CPU might not be able to observe the actual IPI data which is required to handle it. Switch to writel() which contains the necessary memory barriers to enforce ordering. - Fix up the fallout of the MSI conversion in the MVEVBU ICU driver. The conversion failed to handle the change of the data storage and kept the original code which uses the domain::host_data pointer unchanged. After the conversion domain::host_data points to the new msi_domain_info structure and not longer to the MVEBU specific MSI data, which is now stored in a member of msi_domain_info. This leads to malfunction of the transalate() callback. - Only handle the PMC in FIQ mode when it is configured that way. The original check was incorrect as it did not explicitely check for the proper conditions, which led to malfunctions of the PMU interrupt. - Improve Kconfig dependencies for the LAN966x Outband Interrupt controller to avoid pointless pronmpts. * tag 'irq-urgent-2025-02-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/apple-aic: Only handle PMC interrupt as FIQ when configured so irqchip/irq-mvebu-icu: Fix access to msi_data from irq_domain::host_data irqchip/riscv: Ensure ordering of memory writes and IPI writes irqchip/lan966x-oic: Make CONFIG_LAN966X_OIC depend on CONFIG_MCHP_LAN966X_PCI dt-bindings: interrupt-controller: microchip,lan966x-oic: Clarify endpoint use --- a360f3ffd005fe00f002c033b2548aba57af8c9a