From: Stephen Boyd Date: Tue, 7 May 2019 18:45:13 +0000 (-0700) Subject: Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' and ... X-Git-Tag: v5.2-rc1~104^2~3 X-Git-Url: https://repo.jachan.dev/linux.git/commitdiff_plain/5816b74581b45cf086a84ab14e13354a65e8e22c?hp=-c Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' and 'clk-qoriq' into clk-next - Mark UFS clk as critical on Hi-Silicon hi3660 SoCs - Support for Cirrus Logic Lochnagar clks * clk-hisi: clk: hi3660: Mark clk_gate_ufs_subsys as critical * clk-lochnagar: clk: lochnagar: Add support for the Cirrus Logic Lochnagar clk: lochnagar: Add initial binding documentation * clk-allwinner: clk: sunxi-ng: sun5i: Export the MBUS clock clk: sunxi-ng: a83t: Add pll-video0 as parent of csi-mclk clk: sunxi-ng: h6: Allow video & vpu clocks to change parent rate clk: sunxi-ng: h6: Preset hdmi-cec clock parent clk: sunxi: Add Kconfig options clk: sunxi-ng: f1c100s: fix USB PHY gate bit offset clk: sunxi-ng: Allow DE clock to set parent rate * clk-rockchip: clk: rockchip: undo several noc and special clocks as critical on rk3288 clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288 clk: rockchip: Limit use of USB PHY clock to USB on rk3288 clk: rockchip: Fix video codec clocks on rk3288 clk: rockchip: Make rkpwm a critical clock on rk3288 clk: rockchip: fix wrong clock definitions for rk3328 * clk-qoriq: clk: qoriq: increase array size of cmux_to_group dt-bindings: qoriq-clock: Add ls1028a chip compatible string clk: qoriq: Add ls1028a clock configuration clk: qoriq: add more PLL divider clocks support dt-bindings: qoriq-clock: add more PLL divider clocks support --- 5816b74581b45cf086a84ab14e13354a65e8e22c diff --combined drivers/clk/Kconfig index e705aab9e38b,e705aab9e38b,1375ed43e72b,f96c7f39ab7e,e705aab9e38b,e705aab9e38b..03854a9d6f5e --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@@@@@@ -219,6 -219,6 -219,13 -219,6 -219,6 -219,6 +219,13 @@@@@@@ config COMMON_CLK_XGEN ---help--- Sypport for the APM X-Gene SoC reference, PLL, and device clocks. ++ +++config COMMON_CLK_LOCHNAGAR ++ +++ tristate "Cirrus Logic Lochnagar clock driver" ++ +++ depends on MFD_LOCHNAGAR ++ +++ help ++ +++ This driver supports the clocking features of the Cirrus Logic ++ +++ Lochnagar audio development board. ++ +++ config COMMON_CLK_NXP def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) select REGMAP_MMIO if ARCH_LPC32XX @@@@@@@ -310,6 -310,6 -317,6 -310,7 -310,6 -310,6 +317,7 @@@@@@@ source "drivers/clk/qcom/Kconfig source "drivers/clk/renesas/Kconfig" source "drivers/clk/samsung/Kconfig" source "drivers/clk/sprd/Kconfig" +++ ++source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sunxi-ng/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/ti/Kconfig" diff --combined drivers/clk/Makefile index 6415e37548e8,1db133652f0c,39b39e098612,1db133652f0c,1db133652f0c,1db133652f0c..020ff8d635f2 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@@@@@@ -32,9 -32,8 -32,9 -32,8 -32,8 -32,8 +32,10 @@@@@@@ obj-$(CONFIG_COMMON_CLK_GEMINI) += clk obj-$(CONFIG_COMMON_CLK_ASPEED) += clk-aspeed.o obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o obj-$(CONFIG_CLK_HSDK) += clk-hsdk-pll.o ++ +++obj-$(CONFIG_COMMON_CLK_LOCHNAGAR) += clk-lochnagar.o obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o obj-$(CONFIG_COMMON_CLK_MAX9485) += clk-max9485.o +++++obj-$(CONFIG_ARCH_MILBEAUT_M10V) += clk-milbeaut.o obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o obj-$(CONFIG_ARCH_NPCM7XX) += clk-npcm7xx.o