From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Mon, 5 Dec 2022 14:37:27 +0000 (+0100)
Subject: Merge tag 'nand/for-6.2' into mtd/next
X-Git-Tag: v6.2-rc1~123^2~1
X-Git-Url: https://repo.jachan.dev/linux.git/commitdiff_plain/1d46f1ae82494fae60802c1ed09ca5009e1b414c

Merge tag 'nand/for-6.2' into mtd/next

Raw NAND core changes:
* Drop obsolete dependencies on COMPILE_TEST
* MAINTAINERS: rectify entry for MESON NAND controller bindings
* Drop EXPORT_SYMBOL_GPL for nanddev_erase()

Raw NAND driver changes:
* marvell: Enable NFC/DEVBUS arbiter
* gpmi: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync
* mpc5121: Replace NO_IRQ by 0
* lpc32xx_{slc,mlc}:
  - Switch to using pm_ptr()
  - Switch to using gpiod API
* lpc32xx_mlc: Switch to using pm_ptr()
* cadence: Support 64-bit slave dma interface
* rockchip: Describe rk3128-nfc in the bindings
* brcmnand: Update interrupts description in the bindings

SPI-NAND driver changes:
* winbond:
  - Add Winbond W25N02KV flash support
  - Fix flash identification

Fix merge conflict with mtd tree regarding the brcm bindings.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---

1d46f1ae82494fae60802c1ed09ca5009e1b414c
diff --cc Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
index f9518d39fbbd,cd606a21b53b..1571024aa119
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
@@@ -184,26 -191,27 +191,27 @@@ required
  examples:
    - |
      nand-controller@f0442800 {
 -            compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";
 -            reg = <0xf0442800 0x600>,
 -                  <0xf0443000 0x100>;
 -            reg-names = "nand", "flash-dma";
 -            interrupt-parent = <&hif_intr2_intc>;
 -            interrupts = <24>, <4>;
 -            interrupt-names = "nand_ctlrdy", "flash_dma_done";
 +        compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";
 +        reg = <0xf0442800 0x600>,
 +              <0xf0443000 0x100>;
 +        reg-names = "nand", "flash-dma";
 +        interrupt-parent = <&hif_intr2_intc>;
 +        interrupts = <24>, <4>;
++        interrupt-names = "nand_ctlrdy", "flash_dma_done";
 +
 +        #address-cells = <1>;
 +        #size-cells = <0>;
 +
 +        nand@1 {
 +            compatible = "brcm,nandcs";
 +            reg = <1>; // Chip select 1
 +            nand-on-flash-bbt;
 +            nand-ecc-strength = <12>;
 +            nand-ecc-step-size = <512>;
  
              #address-cells = <1>;
 -            #size-cells = <0>;
 -
 -            nand@1 {
 -                    compatible = "brcm,nandcs";
 -                    reg = <1>; // Chip select 1
 -                    nand-on-flash-bbt;
 -                    nand-ecc-strength = <12>;
 -                    nand-ecc-step-size = <512>;
 -
 -                    #address-cells = <1>;
 -                    #size-cells = <1>;
 -            };
 +            #size-cells = <1>;
 +        };
      };
    - |
      nand-controller@10000200 {