MIPS: Octeon: Add definitions for setting up SSO
Some Octeon II models have SSO instead of POW and use a different register
for setting the interrupt thresholds. Add the necessary definitions for
configuring the interrupts also on those models.
Signed-off-by: Janne Huttunen <[email protected]>
Signed-off-by: Aaro Koskinen <[email protected]>
Acked-by: David Daney <[email protected]>
Cc: David Daney <[email protected]>
Cc: [email protected]
Cc: Janne Huttunen <[email protected]>
Cc: Aaro Koskinen <[email protected]>
Cc: Greg Kroah-Hartman <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10972/
Signed-off-by: Ralf Baechle <[email protected]>