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(parent: 7a65e88) | patch
drm/amd/display: Add a boot option to reduce phy ssc for HBR3
authorHansen Dsouza <[email protected]>
Tue, 15 Oct 2024 21:33:15 +0000 (17:33 -0400)
committerAlex Deucher <[email protected]>
Mon, 28 Oct 2024 20:32:29 +0000 (16:32 -0400)
commit69f22c5b454f7a3d77f323ed96b4ad6ac7bbe378
treef6d638836058bf59007adccb1ec2dc04e5516dbdtree | snapshot
parent7a65e88f13b1294a41814a6b679fbc3e3fedb68bcommit | diff
drm/amd/display: Add a boot option to reduce phy ssc for HBR3

[Why]
Spread on DPREFCLK by 0.3 percent can have a negative effect on sink
when PHY SSC is also spread by 0.3 percent
[How]
Add boot option for DMU to lower PHY SSC

Reviewed-by: Nicholas Kazlauskas <[email protected]>
Signed-off-by: Hansen Dsouza <[email protected]>
Signed-off-by: Tom Chung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
drivers/gpu/drm/amd/display/dmub/dmub_srv.h diff | blob | blame | history
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h diff | blob | blame | history
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c diff | blob | blame | history
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