]> Git Repo - linux.git/commit
RISC-V: Enable sstc extension parsing from DT
authorAtish Patra <[email protected]>
Fri, 22 Jul 2022 16:50:45 +0000 (09:50 -0700)
committerPalmer Dabbelt <[email protected]>
Thu, 11 Aug 2022 21:36:13 +0000 (14:36 -0700)
commit464b0187ff94fcc629fe7cd350e16a3b9e80ed9e
tree56b5a4be274df53a837dc3377d94cd21e30606c5
parentbf952a290f7a9d818204b9b68e861655f8b15a65
RISC-V: Enable sstc extension parsing from DT

The ISA extension framework now allows parsing any multi-letter
ISA extension.

Enable that for sstc extension.

Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
arch/riscv/include/asm/hwcap.h
arch/riscv/kernel/cpu.c
arch/riscv/kernel/cpufeature.c
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