clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver

clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver

Add dynamic AP-DCLK clock (hclk) to system controller driver. AP-DCLK
is half the rate of DDR clock, so its derrived from Sample At Reset
configuration. The clock frequency is required for AP806 AXI monitor
profiling feature.

Signed-off-by: Omri Itach <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>