Merge branches 'for-next/gcs', 'for-next/probes', 'for-next/asm-offsets', 'for-next...

[linux.git] / arch / arm64 / kernel / pi / idreg-override.c

diff --git a/arch/arm64/kernel/pi/idreg-override.c b/arch/arm64/kernel/pi/idreg-override.c
index 29d4b6244a6f630515a01ba13cd9c64b26187f07..22159251eb3a6a5efea90ebda2910ebcfff52b8f 100644 (file)
--- a/arch/arm64/kernel/pi/idreg-override.c
+++ b/arch/arm64/kernel/pi/idreg-override.c
@@ -38,6 +38,15 @@ struct ftr_set_desc {
 
 #define FIELD(n, s, f) { .name = n, .shift = s, .width = 4, .filter = f }
 
+static const struct ftr_set_desc mmfr0 __prel64_initconst = {
+       .name           = "id_aa64mmfr0",
+       .override       = &id_aa64mmfr0_override,
+       .fields         = {
+               FIELD("ecv", ID_AA64MMFR0_EL1_ECV_SHIFT, NULL),
+               {}
+       },
+};
+
 static bool __init mmfr1_vh_filter(u64 val)
 {
        /*
@@ -133,6 +142,7 @@ static const struct ftr_set_desc pfr1 __prel64_initconst = {
        .override       = &id_aa64pfr1_override,
        .fields         = {
                FIELD("bt", ID_AA64PFR1_EL1_BT_SHIFT, NULL ),
+               FIELD("gcs", ID_AA64PFR1_EL1_GCS_SHIFT, NULL),
                FIELD("mte", ID_AA64PFR1_EL1_MTE_SHIFT, NULL),
                FIELD("sme", ID_AA64PFR1_EL1_SME_SHIFT, pfr1_sme_filter),
                {}
@@ -196,6 +206,7 @@ static const struct ftr_set_desc sw_features __prel64_initconst = {
 
 static const
 PREL64(const struct ftr_set_desc, reg) regs[] __prel64_initconst = {
+       { &mmfr0        },
        { &mmfr1        },
        { &mmfr2        },
        { &pfr0         },
@@ -215,6 +226,7 @@ static const struct {
        { "arm64.nosve",                "id_aa64pfr0.sve=0" },
        { "arm64.nosme",                "id_aa64pfr1.sme=0" },
        { "arm64.nobti",                "id_aa64pfr1.bt=0" },
+       { "arm64.nogcs",                "id_aa64pfr1.gcs=0" },
        { "arm64.nopauth",
          "id_aa64isar1.gpi=0 id_aa64isar1.gpa=0 "
          "id_aa64isar1.api=0 id_aa64isar1.apa=0 "