Merge tag 'iommu-updates-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_gem.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 46b9ea4e61031d13f9e701b03f6c9ca53559751f..2c8e27370284d53f3b4a440e637ba93759c7a49c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -48,17 +48,25 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
                             struct drm_gem_object **obj)
 {
        struct amdgpu_bo *bo;
                             struct drm_gem_object **obj)
 {
        struct amdgpu_bo *bo;

+       struct amdgpu_bo_param bp;

        int r;
 
        int r;
 

+       memset(&bp, 0, sizeof(bp));

        *obj = NULL;
        /* At least align on page size */
        if (alignment < PAGE_SIZE) {
                alignment = PAGE_SIZE;
        }
 
        *obj = NULL;
        /* At least align on page size */
        if (alignment < PAGE_SIZE) {
                alignment = PAGE_SIZE;
        }
 

+       bp.size = size;
+       bp.byte_align = alignment;
+       bp.type = type;
+       bp.resv = resv;
+       bp.preferred_domain = initial_domain;

 retry:
 retry:

-       r = amdgpu_bo_create(adev, size, alignment, initial_domain,
-                            flags, type, resv, &bo);
+       bp.flags = flags;
+       bp.domain = initial_domain;
+       r = amdgpu_bo_create(adev, &bp, &bo);

        if (r) {
                if (r != -ERESTARTSYS) {
                        if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) {
        if (r) {
                if (r != -ERESTARTSYS) {
                        if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) {


@@ -221,12 +229,7 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
                return -EINVAL;
 
        /* reject invalid gem domains */
                return -EINVAL;
 
        /* reject invalid gem domains */

-       if (args->in.domains & ~(AMDGPU_GEM_DOMAIN_CPU |
-                                AMDGPU_GEM_DOMAIN_GTT |
-                                AMDGPU_GEM_DOMAIN_VRAM |
-                                AMDGPU_GEM_DOMAIN_GDS |
-                                AMDGPU_GEM_DOMAIN_GWS |
-                                AMDGPU_GEM_DOMAIN_OA))
+       if (args->in.domains & ~AMDGPU_GEM_DOMAIN_MASK)

                return -EINVAL;
 
        /* create a gem object to contain this object in */
                return -EINVAL;
 
        /* create a gem object to contain this object in */


@@ -771,16 +774,23 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv,
 }
 
 #if defined(CONFIG_DEBUG_FS)
 }
 
 #if defined(CONFIG_DEBUG_FS)

+
+#define amdgpu_debugfs_gem_bo_print_flag(m, bo, flag)  \
+       if (bo->flags & (AMDGPU_GEM_CREATE_ ## flag)) { \
+               seq_printf((m), " " #flag);             \
+       }
+

 static int amdgpu_debugfs_gem_bo_info(int id, void *ptr, void *data)
 {
        struct drm_gem_object *gobj = ptr;
        struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
        struct seq_file *m = data;
 
 static int amdgpu_debugfs_gem_bo_info(int id, void *ptr, void *data)
 {
        struct drm_gem_object *gobj = ptr;
        struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
        struct seq_file *m = data;
 

+       struct dma_buf_attachment *attachment;
+       struct dma_buf *dma_buf;

        unsigned domain;
        const char *placement;
        unsigned pin_count;
        unsigned domain;
        const char *placement;
        unsigned pin_count;

-       uint64_t offset;

 
        domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
        switch (domain) {
 
        domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
        switch (domain) {


@@ -798,13 +808,27 @@ static int amdgpu_debugfs_gem_bo_info(int id, void *ptr, void *data)
        seq_printf(m, "\t0x%08x: %12ld byte %s",
                   id, amdgpu_bo_size(bo), placement);
 
        seq_printf(m, "\t0x%08x: %12ld byte %s",
                   id, amdgpu_bo_size(bo), placement);
 

-       offset = READ_ONCE(bo->tbo.mem.start);
-       if (offset != AMDGPU_BO_INVALID_OFFSET)
-               seq_printf(m, " @ 0x%010Lx", offset);
-

        pin_count = READ_ONCE(bo->pin_count);
        if (pin_count)
                seq_printf(m, " pin count %d", pin_count);
        pin_count = READ_ONCE(bo->pin_count);
        if (pin_count)
                seq_printf(m, " pin count %d", pin_count);

+
+       dma_buf = READ_ONCE(bo->gem_base.dma_buf);
+       attachment = READ_ONCE(bo->gem_base.import_attach);
+
+       if (attachment)
+               seq_printf(m, " imported from %p", dma_buf);
+       else if (dma_buf)
+               seq_printf(m, " exported as %p", dma_buf);
+
+       amdgpu_debugfs_gem_bo_print_flag(m, bo, CPU_ACCESS_REQUIRED);
+       amdgpu_debugfs_gem_bo_print_flag(m, bo, NO_CPU_ACCESS);
+       amdgpu_debugfs_gem_bo_print_flag(m, bo, CPU_GTT_USWC);
+       amdgpu_debugfs_gem_bo_print_flag(m, bo, VRAM_CLEARED);
+       amdgpu_debugfs_gem_bo_print_flag(m, bo, SHADOW);
+       amdgpu_debugfs_gem_bo_print_flag(m, bo, VRAM_CONTIGUOUS);
+       amdgpu_debugfs_gem_bo_print_flag(m, bo, VM_ALWAYS_VALID);
+       amdgpu_debugfs_gem_bo_print_flag(m, bo, EXPLICIT_SYNC);
+

        seq_printf(m, "\n");
 
        return 0;
        seq_printf(m, "\n");
 
        return 0;