Merge branch 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux into...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_vm.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 1cc01fb409dc1c8c283a75810f45f7e874ddfb42..fd28e890693e17cac5242ae5588553ab24ef3a92 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -90,10 +90,13 @@ struct amdgpu_bo_list_entry *amdgpu_vm_get_bos(struct amdgpu_device *adev,
        struct amdgpu_bo_list_entry *list;
        unsigned i, idx;
 
+       mutex_lock(&vm->mutex);
        list = drm_malloc_ab(vm->max_pde_used + 2,
                             sizeof(struct amdgpu_bo_list_entry));
-       if (!list)
+       if (!list) {
+               mutex_unlock(&vm->mutex);
                return NULL;
+       }
 
        /* add the vm page table to the list */
        list[0].robj = vm->page_directory;
@@ -116,6 +119,7 @@ struct amdgpu_bo_list_entry *amdgpu_vm_get_bos(struct amdgpu_device *adev,
                list[idx].tv.shared = true;
                list_add(&list[idx++].tv.head, head);
        }
+       mutex_unlock(&vm->mutex);
 
        return list;
 }
@@ -315,6 +319,10 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
        if (r)
                return r;
 
+       r = reservation_object_reserve_shared(bo->tbo.resv);
+       if (r)
+               return r;
+
        r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
        if (r)
                goto error_unreserve;
@@ -336,7 +344,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
        if (r)
                goto error_free;
 
-       amdgpu_bo_fence(bo, ib.fence, false);
+       amdgpu_bo_fence(bo, ib.fence, true);
 
 error_free:
        amdgpu_ib_free(adev, &ib);
@@ -454,7 +462,7 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
                        amdgpu_ib_free(adev, &ib);
                        return r;
                }
-               amdgpu_bo_fence(pd, ib.fence, false);
+               amdgpu_bo_fence(pd, ib.fence, true);
        }
        amdgpu_ib_free(adev, &ib);
 
@@ -850,9 +858,9 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
  * PTs have to be reserved and mutex must be locked!
  */
 int amdgpu_vm_clear_invalids(struct amdgpu_device *adev,
-                            struct amdgpu_vm *vm)
+                            struct amdgpu_vm *vm, struct amdgpu_sync *sync)
 {
-       struct amdgpu_bo_va *bo_va;
+       struct amdgpu_bo_va *bo_va = NULL;
        int r;
 
        spin_lock(&vm->status_lock);
@@ -869,6 +877,8 @@ int amdgpu_vm_clear_invalids(struct amdgpu_device *adev,
        }
        spin_unlock(&vm->status_lock);
 
+       if (bo_va)
+               amdgpu_sync_fence(sync, bo_va->last_pt_update);
        return 0;
 }
 
@@ -936,6 +946,13 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
        uint64_t eaddr;
        int r;
 
+       /* validate the parameters */
+       if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||
+           size == 0 || size & AMDGPU_GPU_PAGE_MASK) {
+               amdgpu_bo_unreserve(bo_va->bo);
+               return -EINVAL;
+       }
+
        /* make sure object fit at this offset */
        eaddr = saddr + size;
        if ((saddr >= eaddr) || (offset + size > amdgpu_bo_size(bo_va->bo))) {