Merge tag 'h8300-for-linus-20190617' of git://git.sourceforge.jp/gitroot/uclinux...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_ucode.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 7b33867036e7b43ab89b0548baab335e9aa1edaf..c352a519ddd4f365081fc5ea1c1479a570db54e5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -24,7 +24,7 @@
 #include <linux/firmware.h>
 #include <linux/slab.h>
 #include <linux/module.h>
-#include <drm/drmP.h>
+
 #include "amdgpu.h"
 #include "amdgpu_ucode.h"
 
@@ -77,6 +77,14 @@ void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr)
                        container_of(hdr, struct smc_firmware_header_v1_0, header);
 
                DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));
+       } else if (version_major == 2) {
+               const struct smc_firmware_header_v1_0 *v1_hdr =
+                       container_of(hdr, struct smc_firmware_header_v1_0, header);
+               const struct smc_firmware_header_v2_0 *v2_hdr =
+                       container_of(v1_hdr, struct smc_firmware_header_v2_0, v1_0);
+
+               DRM_INFO("ppt_offset_bytes: %u\n", le32_to_cpu(v2_hdr->ppt_offset_bytes));
+               DRM_INFO("ppt_size_bytes: %u\n", le32_to_cpu(v2_hdr->ppt_size_bytes));
        } else {
                DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor);
        }
@@ -227,6 +235,40 @@ void amdgpu_ucode_print_sdma_hdr(const struct common_firmware_header *hdr)
        }
 }
 
+void amdgpu_ucode_print_psp_hdr(const struct common_firmware_header *hdr)
+{
+       uint16_t version_major = le16_to_cpu(hdr->header_version_major);
+       uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
+
+       DRM_DEBUG("PSP\n");
+       amdgpu_ucode_print_common_hdr(hdr);
+
+       if (version_major == 1) {
+               const struct psp_firmware_header_v1_0 *psp_hdr =
+                       container_of(hdr, struct psp_firmware_header_v1_0, header);
+
+               DRM_DEBUG("ucode_feature_version: %u\n",
+                         le32_to_cpu(psp_hdr->ucode_feature_version));
+               DRM_DEBUG("sos_offset_bytes: %u\n",
+                         le32_to_cpu(psp_hdr->sos_offset_bytes));
+               DRM_DEBUG("sos_size_bytes: %u\n",
+                         le32_to_cpu(psp_hdr->sos_size_bytes));
+               if (version_minor == 1) {
+                       const struct psp_firmware_header_v1_1 *psp_hdr_v1_1 =
+                               container_of(psp_hdr, struct psp_firmware_header_v1_1, v1_0);
+                       DRM_DEBUG("toc_header_version: %u\n",
+                                 le32_to_cpu(psp_hdr_v1_1->toc_header_version));
+                       DRM_DEBUG("toc_offset_bytes: %u\n",
+                                 le32_to_cpu(psp_hdr_v1_1->toc_offset_bytes));
+                       DRM_DEBUG("toc_size_bytes: %u\n",
+                                 le32_to_cpu(psp_hdr_v1_1->toc_size_bytes));
+               }
+       } else {
+               DRM_ERROR("Unknown PSP ucode version: %u.%u\n",
+                         version_major, version_minor);
+       }
+}
+
 void amdgpu_ucode_print_gpu_info_hdr(const struct common_firmware_header *hdr)
 {
        uint16_t version_major = le16_to_cpu(hdr->header_version_major);
@@ -302,6 +344,7 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type)
        case CHIP_RAVEN:
        case CHIP_VEGA12:
        case CHIP_VEGA20:
+       case CHIP_NAVI10:
                if (!load_type)
                        return AMDGPU_FW_LOAD_DIRECT;
                else
@@ -313,6 +356,69 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type)
        return AMDGPU_FW_LOAD_DIRECT;
 }
 
+#define FW_VERSION_ATTR(name, mode, field)                             \
+static ssize_t show_##name(struct device *dev,                         \
+                         struct device_attribute *attr,                \
+                         char *buf)                                    \
+{                                                                      \
+       struct drm_device *ddev = dev_get_drvdata(dev);                 \
+       struct amdgpu_device *adev = ddev->dev_private;                 \
+                                                                       \
+       return snprintf(buf, PAGE_SIZE, "0x%08x\n", adev->field);       \
+}                                                                      \
+static DEVICE_ATTR(name, mode, show_##name, NULL)
+
+FW_VERSION_ATTR(vce_fw_version, 0444, vce.fw_version);
+FW_VERSION_ATTR(uvd_fw_version, 0444, uvd.fw_version);
+FW_VERSION_ATTR(mc_fw_version, 0444, gmc.fw_version);
+FW_VERSION_ATTR(me_fw_version, 0444, gfx.me_fw_version);
+FW_VERSION_ATTR(pfp_fw_version, 0444, gfx.pfp_fw_version);
+FW_VERSION_ATTR(ce_fw_version, 0444, gfx.ce_fw_version);
+FW_VERSION_ATTR(rlc_fw_version, 0444, gfx.rlc_fw_version);
+FW_VERSION_ATTR(rlc_srlc_fw_version, 0444, gfx.rlc_srlc_fw_version);
+FW_VERSION_ATTR(rlc_srlg_fw_version, 0444, gfx.rlc_srlg_fw_version);
+FW_VERSION_ATTR(rlc_srls_fw_version, 0444, gfx.rlc_srls_fw_version);
+FW_VERSION_ATTR(mec_fw_version, 0444, gfx.mec_fw_version);
+FW_VERSION_ATTR(mec2_fw_version, 0444, gfx.mec2_fw_version);
+FW_VERSION_ATTR(sos_fw_version, 0444, psp.sos_fw_version);
+FW_VERSION_ATTR(asd_fw_version, 0444, psp.asd_fw_version);
+FW_VERSION_ATTR(ta_ras_fw_version, 0444, psp.ta_fw_version);
+FW_VERSION_ATTR(ta_xgmi_fw_version, 0444, psp.ta_fw_version);
+FW_VERSION_ATTR(smc_fw_version, 0444, pm.fw_version);
+FW_VERSION_ATTR(sdma_fw_version, 0444, sdma.instance[0].fw_version);
+FW_VERSION_ATTR(sdma2_fw_version, 0444, sdma.instance[1].fw_version);
+FW_VERSION_ATTR(vcn_fw_version, 0444, vcn.fw_version);
+FW_VERSION_ATTR(dmcu_fw_version, 0444, dm.dmcu_fw_version);
+
+static struct attribute *fw_attrs[] = {
+       &dev_attr_vce_fw_version.attr, &dev_attr_uvd_fw_version.attr,
+       &dev_attr_mc_fw_version.attr, &dev_attr_me_fw_version.attr,
+       &dev_attr_pfp_fw_version.attr, &dev_attr_ce_fw_version.attr,
+       &dev_attr_rlc_fw_version.attr, &dev_attr_rlc_srlc_fw_version.attr,
+       &dev_attr_rlc_srlg_fw_version.attr, &dev_attr_rlc_srls_fw_version.attr,
+       &dev_attr_mec_fw_version.attr, &dev_attr_mec2_fw_version.attr,
+       &dev_attr_sos_fw_version.attr, &dev_attr_asd_fw_version.attr,
+       &dev_attr_ta_ras_fw_version.attr, &dev_attr_ta_xgmi_fw_version.attr,
+       &dev_attr_smc_fw_version.attr, &dev_attr_sdma_fw_version.attr,
+       &dev_attr_sdma2_fw_version.attr, &dev_attr_vcn_fw_version.attr,
+       &dev_attr_dmcu_fw_version.attr, NULL
+};
+
+static const struct attribute_group fw_attr_group = {
+       .name = "fw_version",
+       .attrs = fw_attrs
+};
+
+int amdgpu_ucode_sysfs_init(struct amdgpu_device *adev)
+{
+       return sysfs_create_group(&adev->dev->kobj, &fw_attr_group);
+}
+
+void amdgpu_ucode_sysfs_fini(struct amdgpu_device *adev)
+{
+       sysfs_remove_group(&adev->dev->kobj, &fw_attr_group);
+}
+
 static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
                                       struct amdgpu_firmware_info *ucode,
                                       uint64_t mc_addr, void *kptr)