drm/amdgpu: bump smc firmware header version to v2 (v2)

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_ucode.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index 7ac25a1c78530b67f0c013b75470abb9dd338010..9b096228a02f93327e7a29260eee7c91f83b38e8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
@@ -49,6 +49,13 @@ struct smc_firmware_header_v1_0 {
        uint32_t ucode_start_addr;
 };
 
+/* version_major=2, version_minor=0 */
+struct smc_firmware_header_v2_0 {
+       struct smc_firmware_header_v1_0 v1_0;
+       uint32_t ppt_offset_bytes; /* soft pptable offset */
+       uint32_t ppt_size_bytes; /* soft pptable size */
+};
+
 /* version_major=1, version_minor=0 */
 struct psp_firmware_header_v1_0 {
        struct common_firmware_header header;
@@ -57,6 +64,14 @@ struct psp_firmware_header_v1_0 {
        uint32_t sos_size_bytes;
 };
 
+/* version_major=1, version_minor=1 */
+struct psp_firmware_header_v1_1 {
+       struct psp_firmware_header_v1_0 v1_0;
+       uint32_t toc_header_version;
+       uint32_t toc_offset_bytes;
+       uint32_t toc_size_bytes;
+};
+
 /* version_major=1, version_minor=0 */
 struct ta_firmware_header_v1_0 {
        struct common_firmware_header header;
@@ -161,6 +176,12 @@ struct gpu_info_firmware_v1_0 {
        uint32_t gc_lds_size;
 };
 
+struct gpu_info_firmware_v1_1 {
+       struct gpu_info_firmware_v1_0 v1_0;
+       uint32_t num_sc_per_sh;
+       uint32_t num_packer_per_sc;
+};
+
 /* version_major=1, version_minor=0 */
 struct gpu_info_firmware_header_v1_0 {
        struct common_firmware_header header;
@@ -180,7 +201,9 @@ union amdgpu_firmware_header {
        struct common_firmware_header common;
        struct mc_firmware_header_v1_0 mc;
        struct smc_firmware_header_v1_0 smc;
+       struct smc_firmware_header_v2_0 smc_v2_0;
        struct psp_firmware_header_v1_0 psp;
+       struct psp_firmware_header_v1_1 psp_v1_1;
        struct ta_firmware_header_v1_0 ta;
        struct gfx_firmware_header_v1_0 gfx;
        struct rlc_firmware_header_v1_0 rlc;
@@ -232,6 +255,7 @@ enum amdgpu_firmware_load_type {
        AMDGPU_FW_LOAD_DIRECT = 0,
        AMDGPU_FW_LOAD_SMU,
        AMDGPU_FW_LOAD_PSP,
+       AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO,
 };
 
 /* conform to smu_ucode_xfer_cz.h */
@@ -284,6 +308,7 @@ void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr);
 void amdgpu_ucode_print_gfx_hdr(const struct common_firmware_header *hdr);
 void amdgpu_ucode_print_rlc_hdr(const struct common_firmware_header *hdr);
 void amdgpu_ucode_print_sdma_hdr(const struct common_firmware_header *hdr);
+void amdgpu_ucode_print_psp_hdr(const struct common_firmware_header *hdr);
 void amdgpu_ucode_print_gpu_info_hdr(const struct common_firmware_header *hdr);
 int amdgpu_ucode_validate(const struct firmware *fw);
 bool amdgpu_ucode_hdr_version(union amdgpu_firmware_header *hdr,
@@ -291,7 +316,9 @@ bool amdgpu_ucode_hdr_version(union amdgpu_firmware_header *hdr,
 
 int amdgpu_ucode_init_bo(struct amdgpu_device *adev);
 int amdgpu_ucode_create_bo(struct amdgpu_device *adev);
+int amdgpu_ucode_sysfs_init(struct amdgpu_device *adev);
 void amdgpu_ucode_free_bo(struct amdgpu_device *adev);
+void amdgpu_ucode_sysfs_fini(struct amdgpu_device *adev);
 
 enum amdgpu_firmware_load_type
 amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type);