Merge tag 'acpi-5.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[linux.git] / Documentation / admin-guide / kernel-parameters.txt
index bda4e8e96969eae6e886be969fb9b1a9b4fadc7e..70a30f65bfca09ce4c259e87b39bf684b501bb84 100644 (file)
                                   state is kept private from the host.
                                   Not valid if the kernel is running in EL2.
 
-                       Defaults to VHE/nVHE based on hardware support and
-                       the value of CONFIG_ARM64_VHE.
+                       Defaults to VHE/nVHE based on hardware support.
 
        kvm-arm.vgic_v3_group0_trap=
                        [KVM,ARM] Trap guest accesses to GICv3 group-0
 
        nr_uarts=       [SERIAL] maximum number of UARTs to be registered.
 
-       numa_balancing= [KNL,X86] Enable or disable automatic NUMA balancing.
+       numa_balancing= [KNL,ARM64,PPC,RISCV,S390,X86] Enable or disable automatic
+                       NUMA balancing.
                        Allowed values are enable and disable
 
        numa_zonelist_order= [KNL, BOOT] Select zonelist order for NUMA.
                        fully seed the kernel's CRNG. Default is controlled
                        by CONFIG_RANDOM_TRUST_CPU.
 
+       randomize_kstack_offset=
+                       [KNL] Enable or disable kernel stack offset
+                       randomization, which provides roughly 5 bits of
+                       entropy, frustrating memory corruption attacks
+                       that depend on stack address determinism or
+                       cross-syscall address exposures. This is only
+                       available on architectures that have defined
+                       CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET.
+                       Format: <bool>  (1/Y/y=enable, 0/N/n=disable)
+                       Default is CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT.
+
        ras=option[,option,...] [KNL] RAS-specific options
 
                cec_disable     [X86]
        spia_peddr=
 
        split_lock_detect=
-                       [X86] Enable split lock detection
+                       [X86] Enable split lock detection or bus lock detection
 
                        When enabled (and if hardware support is present), atomic
                        instructions that access data across cache line
-                       boundaries will result in an alignment check exception.
+                       boundaries will result in an alignment check exception
+                       for split lock detection or a debug exception for
+                       bus lock detection.
 
                        off     - not enabled
 
-                       warn    - the kernel will emit rate limited warnings
+                       warn    - the kernel will emit rate-limited warnings
                                  about applications triggering the #AC
-                                 exception. This mode is the default on CPUs
-                                 that supports split lock detection.
+                                 exception or the #DB exception. This mode is
+                                 the default on CPUs that support split lock
+                                 detection or bus lock detection. Default
+                                 behavior is by #AC if both features are
+                                 enabled in hardware.
 
                        fatal   - the kernel will send SIGBUS to applications
-                                 that trigger the #AC exception.
+                                 that trigger the #AC exception or the #DB
+                                 exception. Default behavior is by #AC if
+                                 both features are enabled in hardware.
 
                        If an #AC exception is hit in the kernel or in
                        firmware (i.e. not while executing in user mode)
                        the kernel will oops in either "warn" or "fatal"
                        mode.
 
+                       #DB exception for bus lock is triggered only when
+                       CPL > 0.
+
        srbds=          [X86,INTEL]
                        Control the Special Register Buffer Data Sampling
                        (SRBDS) mitigation.
                        See Documentation/admin-guide/mm/transhuge.rst
                        for more details.
 
+       trusted.source= [KEYS]
+                       Format: <string>
+                       This parameter identifies the trust source as a backend
+                       for trusted keys implementation. Supported trust
+                       sources:
+                       - "tpm"
+                       - "tee"
+                       If not specified then it defaults to iterating through
+                       the trust source list starting with TPM and assigns the
+                       first trust source as a backend which is initialized
+                       successfully during iteration.
+
        tsc=            Disable clocksource stability checks for TSC.
                        Format: <string>
                        [x86] reliable: mark tsc clocksource as reliable, this
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