drm/amdgpu: add vm_needs_flush parameter to amdgpu_copy_buffer

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_object.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index cb89fff863c04c9536ec6b9667d58abb06c1b5a1..c34cf2c1ae4e113fd28b725d1a33f26fe6e771b2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -295,7 +295,7 @@ void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
        if (*bo == NULL)
                return;
 
-       if (likely(amdgpu_bo_reserve(*bo, false) == 0)) {
+       if (likely(amdgpu_bo_reserve(*bo, true) == 0)) {
                if (cpu_addr)
                        amdgpu_bo_kunmap(*bo);
 
@@ -535,7 +535,7 @@ int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
 
        r = amdgpu_copy_buffer(ring, bo_addr, shadow_addr,
                               amdgpu_bo_size(bo), resv, fence,
-                              direct);
+                              direct, false);
        if (!r)
                amdgpu_bo_fence(bo, *fence, true);
 
@@ -543,6 +543,27 @@ err:
        return r;
 }
 
+int amdgpu_bo_validate(struct amdgpu_bo *bo)
+{
+       uint32_t domain;
+       int r;
+
+       if (bo->pin_count)
+               return 0;
+
+       domain = bo->prefered_domains;
+
+retry:
+       amdgpu_ttm_placement_from_domain(bo, domain);
+       r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
+       if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {
+               domain = bo->allowed_domains;
+               goto retry;
+       }
+
+       return r;
+}
+
 int amdgpu_bo_restore_from_shadow(struct amdgpu_device *adev,
                                  struct amdgpu_ring *ring,
                                  struct amdgpu_bo *bo,
@@ -567,7 +588,7 @@ int amdgpu_bo_restore_from_shadow(struct amdgpu_device *adev,
 
        r = amdgpu_copy_buffer(ring, shadow_addr, bo_addr,
                               amdgpu_bo_size(bo), resv, fence,
-                              direct);
+                              direct, false);
        if (!r)
                amdgpu_bo_fence(bo, *fence, true);
 
@@ -939,6 +960,7 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
                return -EINVAL;
 
        /* hurrah the memory is not visible ! */
+       atomic64_inc(&adev->num_vram_cpu_page_faults);
        amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM);
        lpfn =  adev->mc.visible_vram_size >> PAGE_SHIFT;
        for (i = 0; i < abo->placement.num_placement; i++) {