Merge tag 'drm-fsl-dcu-fixes-for-v4.18' of http://git.agner.ch/git/linux-drm-fsl...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_object.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 9258f0694922b9a5724ba5782b148ef09f39f5d0..6a9e46ae7f0a460cc47ebf443f6098c7362965d8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -360,7 +360,6 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
        };
        struct amdgpu_bo *bo;
        unsigned long page_align, size = bp->size;
-       u32 preferred_domains;
        size_t acc_size;
        int r;
 
@@ -381,14 +380,8 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
        drm_gem_private_object_init(adev->ddev, &bo->gem_base, size);
        INIT_LIST_HEAD(&bo->shadow_list);
        INIT_LIST_HEAD(&bo->va);
-       preferred_domains = bp->preferred_domain ? bp->preferred_domain :
+       bo->preferred_domains = bp->preferred_domain ? bp->preferred_domain :
                bp->domain;
-       bo->preferred_domains = preferred_domains & (AMDGPU_GEM_DOMAIN_VRAM |
-                                                    AMDGPU_GEM_DOMAIN_GTT |
-                                                    AMDGPU_GEM_DOMAIN_CPU |
-                                                    AMDGPU_GEM_DOMAIN_GDS |
-                                                    AMDGPU_GEM_DOMAIN_GWS |
-                                                    AMDGPU_GEM_DOMAIN_OA);
        bo->allowed_domains = bo->preferred_domains;
        if (bp->type != ttm_bo_type_kernel &&
            bo->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
@@ -426,6 +419,8 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
 
        bo->tbo.bdev = &adev->mman.bdev;
        amdgpu_ttm_placement_from_domain(bo, bp->domain);
+       if (bp->type == ttm_bo_type_kernel)
+               bo->tbo.priority = 1;
 
        r = ttm_bo_init_reserved(&adev->mman.bdev, &bo->tbo, size, bp->type,
                                 &bo->placement, page_align, &ctx, acc_size,
@@ -441,9 +436,6 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
        else
                amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved, 0);
 
-       if (bp->type == ttm_bo_type_kernel)
-               bo->tbo.priority = 1;
-
        if (bp->flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
            bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
                struct dma_fence *fence;
@@ -701,8 +693,21 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
                return -EINVAL;
 
        /* A shared bo cannot be migrated to VRAM */
-       if (bo->prime_shared_count && (domain == AMDGPU_GEM_DOMAIN_VRAM))
-               return -EINVAL;
+       if (bo->prime_shared_count) {
+               if (domain & AMDGPU_GEM_DOMAIN_GTT)
+                       domain = AMDGPU_GEM_DOMAIN_GTT;
+               else
+                       return -EINVAL;
+       }
+
+       /* This assumes only APU display buffers are pinned with (VRAM|GTT).
+        * See function amdgpu_display_supported_domains()
+        */
+       if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
+               domain = AMDGPU_GEM_DOMAIN_VRAM;
+               if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
+                       domain = AMDGPU_GEM_DOMAIN_GTT;
+       }
 
        if (bo->pin_count) {
                uint32_t mem_type = bo->tbo.mem.mem_type;