Merge tag 'drm-fsl-dcu-fixes-for-v4.18' of http://git.agner.ch/git/linux-drm-fsl...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_object.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index b33a7fdea7f2092ee776e10d3ecf6e1e52a49393..6a9e46ae7f0a460cc47ebf443f6098c7362965d8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -191,14 +191,21 @@ int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
                              u32 domain, struct amdgpu_bo **bo_ptr,
                              u64 *gpu_addr, void **cpu_addr)
 {
+       struct amdgpu_bo_param bp;
        bool free = false;
        int r;
 
+       memset(&bp, 0, sizeof(bp));
+       bp.size = size;
+       bp.byte_align = align;
+       bp.domain = domain;
+       bp.flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+               AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
+       bp.type = ttm_bo_type_kernel;
+       bp.resv = NULL;
+
        if (!*bo_ptr) {
-               r = amdgpu_bo_create(adev, size, align, domain,
-                                    AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-                                    AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
-                                    ttm_bo_type_kernel, NULL, bo_ptr);
+               r = amdgpu_bo_create(adev, &bp, bo_ptr);
                if (r) {
                        dev_err(adev->dev, "(%d) failed to allocate kernel bo\n",
                                r);
@@ -373,12 +380,8 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
        drm_gem_private_object_init(adev->ddev, &bo->gem_base, size);
        INIT_LIST_HEAD(&bo->shadow_list);
        INIT_LIST_HEAD(&bo->va);
-       bo->preferred_domains = bp->domain & (AMDGPU_GEM_DOMAIN_VRAM |
-                                             AMDGPU_GEM_DOMAIN_GTT |
-                                             AMDGPU_GEM_DOMAIN_CPU |
-                                             AMDGPU_GEM_DOMAIN_GDS |
-                                             AMDGPU_GEM_DOMAIN_GWS |
-                                             AMDGPU_GEM_DOMAIN_OA);
+       bo->preferred_domains = bp->preferred_domain ? bp->preferred_domain :
+               bp->domain;
        bo->allowed_domains = bo->preferred_domains;
        if (bp->type != ttm_bo_type_kernel &&
            bo->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
@@ -416,6 +419,8 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
 
        bo->tbo.bdev = &adev->mman.bdev;
        amdgpu_ttm_placement_from_domain(bo, bp->domain);
+       if (bp->type == ttm_bo_type_kernel)
+               bo->tbo.priority = 1;
 
        r = ttm_bo_init_reserved(&adev->mman.bdev, &bo->tbo, size, bp->type,
                                 &bo->placement, page_align, &ctx, acc_size,
@@ -431,9 +436,6 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
        else
                amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved, 0);
 
-       if (bp->type == ttm_bo_type_kernel)
-               bo->tbo.priority = 1;
-
        if (bp->flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
            bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
                struct dma_fence *fence;
@@ -470,20 +472,21 @@ static int amdgpu_bo_create_shadow(struct amdgpu_device *adev,
                                   unsigned long size, int byte_align,
                                   struct amdgpu_bo *bo)
 {
-       struct amdgpu_bo_param bp = {
-               .size = size,
-               .byte_align = byte_align,
-               .domain = AMDGPU_GEM_DOMAIN_GTT,
-               .flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC |
-                       AMDGPU_GEM_CREATE_SHADOW,
-               .type = ttm_bo_type_kernel,
-               .resv = bo->tbo.resv
-       };
+       struct amdgpu_bo_param bp;
        int r;
 
        if (bo->shadow)
                return 0;
 
+       memset(&bp, 0, sizeof(bp));
+       bp.size = size;
+       bp.byte_align = byte_align;
+       bp.domain = AMDGPU_GEM_DOMAIN_GTT;
+       bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC |
+               AMDGPU_GEM_CREATE_SHADOW;
+       bp.type = ttm_bo_type_kernel;
+       bp.resv = bo->tbo.resv;
+
        r = amdgpu_bo_do_create(adev, &bp, &bo->shadow);
        if (!r) {
                bo->shadow->parent = amdgpu_bo_ref(bo);
@@ -495,34 +498,26 @@ static int amdgpu_bo_create_shadow(struct amdgpu_device *adev,
        return r;
 }
 
-int amdgpu_bo_create(struct amdgpu_device *adev, unsigned long size,
-                    int byte_align, u32 domain,
-                    u64 flags, enum ttm_bo_type type,
-                    struct reservation_object *resv,
+int amdgpu_bo_create(struct amdgpu_device *adev,
+                    struct amdgpu_bo_param *bp,
                     struct amdgpu_bo **bo_ptr)
 {
-       struct amdgpu_bo_param bp = {
-               .size = size,
-               .byte_align = byte_align,
-               .domain = domain,
-               .flags = flags & ~AMDGPU_GEM_CREATE_SHADOW,
-               .type = type,
-               .resv = resv
-       };
+       u64 flags = bp->flags;
        int r;
 
-       r = amdgpu_bo_do_create(adev, &bp, bo_ptr);
+       bp->flags = bp->flags & ~AMDGPU_GEM_CREATE_SHADOW;
+       r = amdgpu_bo_do_create(adev, bp, bo_ptr);
        if (r)
                return r;
 
        if ((flags & AMDGPU_GEM_CREATE_SHADOW) && amdgpu_need_backup(adev)) {
-               if (!resv)
+               if (!bp->resv)
                        WARN_ON(reservation_object_lock((*bo_ptr)->tbo.resv,
                                                        NULL));
 
-               r = amdgpu_bo_create_shadow(adev, size, byte_align, (*bo_ptr));
+               r = amdgpu_bo_create_shadow(adev, bp->size, bp->byte_align, (*bo_ptr));
 
-               if (!resv)
+               if (!bp->resv)
                        reservation_object_unlock((*bo_ptr)->tbo.resv);
 
                if (r)
@@ -698,8 +693,21 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
                return -EINVAL;
 
        /* A shared bo cannot be migrated to VRAM */
-       if (bo->prime_shared_count && (domain == AMDGPU_GEM_DOMAIN_VRAM))
-               return -EINVAL;
+       if (bo->prime_shared_count) {
+               if (domain & AMDGPU_GEM_DOMAIN_GTT)
+                       domain = AMDGPU_GEM_DOMAIN_GTT;
+               else
+                       return -EINVAL;
+       }
+
+       /* This assumes only APU display buffers are pinned with (VRAM|GTT).
+        * See function amdgpu_display_supported_domains()
+        */
+       if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
+               domain = AMDGPU_GEM_DOMAIN_VRAM;
+               if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
+                       domain = AMDGPU_GEM_DOMAIN_GTT;
+       }
 
        if (bo->pin_count) {
                uint32_t mem_type = bo->tbo.mem.mem_type;