Merge tag 'rpmsg-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 87f095dc385c7640c6e3a35071128605e70cb5dd..6e2953233231fa4658ae8a02b112632dc67c1f69 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -106,6 +106,7 @@
 #include "amdgpu_mmhub.h"
 #include "amdgpu_gfxhub.h"
 #include "amdgpu_df.h"
 #include "amdgpu_mmhub.h"
 #include "amdgpu_gfxhub.h"
 #include "amdgpu_df.h"

+#include "amdgpu_smuio.h"

 
 #define MAX_GPU_INSTANCE               16
 
 
 #define MAX_GPU_INSTANCE               16
 


@@ -193,9 +194,9 @@ extern int sched_policy;
 extern bool debug_evictions;
 extern bool no_system_mem_limit;
 #else
 extern bool debug_evictions;
 extern bool no_system_mem_limit;
 #else

-static const int sched_policy = KFD_SCHED_POLICY_HWS;
-static const bool debug_evictions; /* = false */
-static const bool no_system_mem_limit;
+static const int __maybe_unused sched_policy = KFD_SCHED_POLICY_HWS;
+static const bool __maybe_unused debug_evictions; /* = false */
+static const bool __maybe_unused no_system_mem_limit;

 #endif
 
 extern int amdgpu_tmz;
 #endif
 
 extern int amdgpu_tmz;


@@ -623,6 +624,8 @@ struct amdgpu_asic_funcs {
        bool (*supports_baco)(struct amdgpu_device *adev);
        /* pre asic_init quirks */
        void (*pre_asic_init)(struct amdgpu_device *adev);
        bool (*supports_baco)(struct amdgpu_device *adev);
        /* pre asic_init quirks */
        void (*pre_asic_init)(struct amdgpu_device *adev);

+       /* enter/exit umd stable pstate */
+       int (*update_umd_stable_pstate)(struct amdgpu_device *adev, bool enter);

 };
 
 /*
 };
 
 /*


@@ -723,6 +726,45 @@ struct amd_powerplay {
        const struct amd_pm_funcs *pp_funcs;
 };
 
        const struct amd_pm_funcs *pp_funcs;
 };
 

+/* polaris10 kickers */
+#define ASICID_IS_P20(did, rid)                (((did == 0x67DF) && \
+                                        ((rid == 0xE3) || \
+                                         (rid == 0xE4) || \
+                                         (rid == 0xE5) || \
+                                         (rid == 0xE7) || \
+                                         (rid == 0xEF))) || \
+                                        ((did == 0x6FDF) && \
+                                        ((rid == 0xE7) || \
+                                         (rid == 0xEF) || \
+                                         (rid == 0xFF))))
+
+#define ASICID_IS_P30(did, rid)                ((did == 0x67DF) && \
+                                       ((rid == 0xE1) || \
+                                        (rid == 0xF7)))
+
+/* polaris11 kickers */
+#define ASICID_IS_P21(did, rid)                (((did == 0x67EF) && \
+                                        ((rid == 0xE0) || \
+                                         (rid == 0xE5))) || \
+                                        ((did == 0x67FF) && \
+                                        ((rid == 0xCF) || \
+                                         (rid == 0xEF) || \
+                                         (rid == 0xFF))))
+
+#define ASICID_IS_P31(did, rid)                ((did == 0x67EF) && \
+                                       ((rid == 0xE2)))
+
+/* polaris12 kickers */
+#define ASICID_IS_P23(did, rid)                (((did == 0x6987) && \
+                                        ((rid == 0xC0) || \
+                                         (rid == 0xC1) || \
+                                         (rid == 0xC3) || \
+                                         (rid == 0xC7))) || \
+                                        ((did == 0x6981) && \
+                                        ((rid == 0x00) || \
+                                         (rid == 0x01) || \
+                                         (rid == 0x10))))
+

 #define AMDGPU_RESET_MAGIC_NUM 64
 #define AMDGPU_MAX_DF_PERFMONS 4
 struct amdgpu_device {
 #define AMDGPU_RESET_MAGIC_NUM 64
 #define AMDGPU_MAX_DF_PERFMONS 4
 struct amdgpu_device {


@@ -879,6 +921,9 @@ struct amdgpu_device {
        /* nbio */
        struct amdgpu_nbio              nbio;
 
        /* nbio */
        struct amdgpu_nbio              nbio;
 

+       /* smuio */
+       struct amdgpu_smuio             smuio;
+

        /* mmhub */
        struct amdgpu_mmhub             mmhub;
 
        /* mmhub */
        struct amdgpu_mmhub             mmhub;
 


@@ -1165,6 +1210,8 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
 #define amdgpu_asic_get_pcie_replay_count(adev) ((adev)->asic_funcs->get_pcie_replay_count((adev)))
 #define amdgpu_asic_supports_baco(adev) (adev)->asic_funcs->supports_baco((adev))
 #define amdgpu_asic_pre_asic_init(adev) (adev)->asic_funcs->pre_asic_init((adev))
 #define amdgpu_asic_get_pcie_replay_count(adev) ((adev)->asic_funcs->get_pcie_replay_count((adev)))
 #define amdgpu_asic_supports_baco(adev) (adev)->asic_funcs->supports_baco((adev))
 #define amdgpu_asic_pre_asic_init(adev) (adev)->asic_funcs->pre_asic_init((adev))

+#define amdgpu_asic_update_umd_stable_pstate(adev, enter) \
+       ((adev)->asic_funcs->update_umd_stable_pstate ? (adev)->asic_funcs->update_umd_stable_pstate((adev), (enter)) : 0)

 
 #define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));
 
 
 #define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));
 


@@ -1264,9 +1311,11 @@ int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
 
 void amdgpu_acpi_get_backlight_caps(struct amdgpu_device *adev,
                struct amdgpu_dm_backlight_caps *caps);
 
 void amdgpu_acpi_get_backlight_caps(struct amdgpu_device *adev,
                struct amdgpu_dm_backlight_caps *caps);

+bool amdgpu_acpi_is_s0ix_supported(void);

 #else
 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
 #else
 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }

+static inline bool amdgpu_acpi_is_s0ix_supported(void) { return false; }

 #endif
 
 int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
 #endif
 
 int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,


@@ -1294,19 +1343,6 @@ bool amdgpu_device_load_pci_state(struct pci_dev *pdev);
 
 #include "amdgpu_object.h"
 
 
 #include "amdgpu_object.h"
 

-/* used by df_v3_6.c and amdgpu_pmu.c */
-#define AMDGPU_PMU_ATTR(_name, _object)                                        \
-static ssize_t                                                         \
-_name##_show(struct device *dev,                                       \
-                              struct device_attribute *attr,           \
-                              char *page)                              \
-{                                                                      \
-       BUILD_BUG_ON(sizeof(_object) >= PAGE_SIZE - 1);                 \
-       return sprintf(page, _object "\n");                             \
-}                                                                      \
-                                                                       \
-static struct device_attribute pmu_attr_##_name = __ATTR_RO(_name)
-

 static inline bool amdgpu_is_tmz(struct amdgpu_device *adev)
 {
        return adev->gmc.tmz_enabled;
 static inline bool amdgpu_is_tmz(struct amdgpu_device *adev)
 {
        return adev->gmc.tmz_enabled;