drm/nouveau/kms: Don't change EDID when it hasn't actually changed

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_kms.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 21292098bc023d09b29470b20b66261510eba765..55ff071217a94798b925f5f2da3e80cde23a0318 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -167,18 +167,33 @@ int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags)
        }
 
        if (amdgpu_device_supports_boco(dev) &&
        }
 
        if (amdgpu_device_supports_boco(dev) &&

-           (amdgpu_runtime_pm != 0)) /* enable runpm by default for boco */
-               adev->runpm = true;
-       else if (amdgpu_device_supports_baco(dev) &&
-                (amdgpu_runtime_pm != 0) &&
-                (adev->asic_type >= CHIP_TOPAZ) &&
-                (adev->asic_type != CHIP_VEGA10) &&
-                (adev->asic_type != CHIP_VEGA20) &&
-                (adev->asic_type != CHIP_ARCTURUS)) /* enable runpm on VI+ */
-               adev->runpm = true;
-       else if (amdgpu_device_supports_baco(dev) &&
-                (amdgpu_runtime_pm > 0))  /* enable runpm if runpm=1 on CI */
+           (amdgpu_runtime_pm != 0)) { /* enable runpm by default for boco */

                adev->runpm = true;
                adev->runpm = true;

+       } else if (amdgpu_device_supports_baco(dev) &&
+                  (amdgpu_runtime_pm != 0)) {
+               switch (adev->asic_type) {
+#ifdef CONFIG_DRM_AMDGPU_CIK
+               case CHIP_BONAIRE:
+               case CHIP_HAWAII:
+#endif
+               case CHIP_VEGA20:
+               case CHIP_ARCTURUS:
+               case CHIP_SIENNA_CICHLID:
+                       /* enable runpm if runpm=1 */
+                       if (amdgpu_runtime_pm > 0)
+                               adev->runpm = true;
+                       break;
+               case CHIP_VEGA10:
+                       /* turn runpm on if noretry=0 */
+                       if (!amdgpu_noretry)
+                               adev->runpm = true;
+                       break;
+               default:
+                       /* enable runpm on VI+ */
+                       adev->runpm = true;
+                       break;
+               }
+       }

 
        /* Call ACPI methods: require modeset init
         * but failure is not fatal
 
        /* Call ACPI methods: require modeset init
         * but failure is not fatal


@@ -579,13 +594,13 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                ui64 = atomic64_read(&adev->num_vram_cpu_page_faults);
                return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
        case AMDGPU_INFO_VRAM_USAGE:
                ui64 = atomic64_read(&adev->num_vram_cpu_page_faults);
                return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
        case AMDGPU_INFO_VRAM_USAGE:

-               ui64 = amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
+               ui64 = amdgpu_vram_mgr_usage(ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM));

                return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
        case AMDGPU_INFO_VIS_VRAM_USAGE:
                return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
        case AMDGPU_INFO_VIS_VRAM_USAGE:

-               ui64 = amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
+               ui64 = amdgpu_vram_mgr_vis_usage(ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM));

                return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
        case AMDGPU_INFO_GTT_USAGE:
                return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
        case AMDGPU_INFO_GTT_USAGE:

-               ui64 = amdgpu_gtt_mgr_usage(&adev->mman.bdev.man[TTM_PL_TT]);
+               ui64 = amdgpu_gtt_mgr_usage(ttm_manager_type(&adev->mman.bdev, TTM_PL_TT));

                return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
        case AMDGPU_INFO_GDS_CONFIG: {
                struct drm_amdgpu_info_gds gds_info;
                return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
        case AMDGPU_INFO_GDS_CONFIG: {
                struct drm_amdgpu_info_gds gds_info;


@@ -608,7 +623,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                        min(adev->gmc.visible_vram_size -
                            atomic64_read(&adev->visible_pin_size),
                            vram_gtt.vram_size);
                        min(adev->gmc.visible_vram_size -
                            atomic64_read(&adev->visible_pin_size),
                            vram_gtt.vram_size);

-               vram_gtt.gtt_size = adev->mman.bdev.man[TTM_PL_TT].size;
+               vram_gtt.gtt_size = ttm_manager_type(&adev->mman.bdev, TTM_PL_TT)->size;

                vram_gtt.gtt_size *= PAGE_SIZE;
                vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size);
                return copy_to_user(out, &vram_gtt,
                vram_gtt.gtt_size *= PAGE_SIZE;
                vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size);
                return copy_to_user(out, &vram_gtt,


@@ -616,14 +631,17 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
        }
        case AMDGPU_INFO_MEMORY: {
                struct drm_amdgpu_memory_info mem;
        }
        case AMDGPU_INFO_MEMORY: {
                struct drm_amdgpu_memory_info mem;

-
+               struct ttm_resource_manager *vram_man =
+                       ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM);
+               struct ttm_resource_manager *gtt_man =
+                       ttm_manager_type(&adev->mman.bdev, TTM_PL_TT);

                memset(&mem, 0, sizeof(mem));
                mem.vram.total_heap_size = adev->gmc.real_vram_size;
                mem.vram.usable_heap_size = adev->gmc.real_vram_size -
                        atomic64_read(&adev->vram_pin_size) -
                        AMDGPU_VM_RESERVED_VRAM;
                mem.vram.heap_usage =
                memset(&mem, 0, sizeof(mem));
                mem.vram.total_heap_size = adev->gmc.real_vram_size;
                mem.vram.usable_heap_size = adev->gmc.real_vram_size -
                        atomic64_read(&adev->vram_pin_size) -
                        AMDGPU_VM_RESERVED_VRAM;
                mem.vram.heap_usage =

-                       amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
+                       amdgpu_vram_mgr_usage(vram_man);

                mem.vram.max_allocation = mem.vram.usable_heap_size * 3 / 4;
 
                mem.cpu_accessible_vram.total_heap_size =
                mem.vram.max_allocation = mem.vram.usable_heap_size * 3 / 4;
 
                mem.cpu_accessible_vram.total_heap_size =


@@ -633,16 +651,16 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                            atomic64_read(&adev->visible_pin_size),
                            mem.vram.usable_heap_size);
                mem.cpu_accessible_vram.heap_usage =
                            atomic64_read(&adev->visible_pin_size),
                            mem.vram.usable_heap_size);
                mem.cpu_accessible_vram.heap_usage =

-                       amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
+                       amdgpu_vram_mgr_vis_usage(vram_man);

                mem.cpu_accessible_vram.max_allocation =
                        mem.cpu_accessible_vram.usable_heap_size * 3 / 4;
 
                mem.cpu_accessible_vram.max_allocation =
                        mem.cpu_accessible_vram.usable_heap_size * 3 / 4;
 

-               mem.gtt.total_heap_size = adev->mman.bdev.man[TTM_PL_TT].size;
+               mem.gtt.total_heap_size = gtt_man->size;

                mem.gtt.total_heap_size *= PAGE_SIZE;
                mem.gtt.usable_heap_size = mem.gtt.total_heap_size -
                        atomic64_read(&adev->gart_pin_size);
                mem.gtt.heap_usage =
                mem.gtt.total_heap_size *= PAGE_SIZE;
                mem.gtt.usable_heap_size = mem.gtt.total_heap_size -
                        atomic64_read(&adev->gart_pin_size);
                mem.gtt.heap_usage =

-                       amdgpu_gtt_mgr_usage(&adev->mman.bdev.man[TTM_PL_TT]);
+                       amdgpu_gtt_mgr_usage(gtt_man);

                mem.gtt.max_allocation = mem.gtt.usable_heap_size * 3 / 4;
 
                return copy_to_user(out, &mem,
                mem.gtt.max_allocation = mem.gtt.usable_heap_size * 3 / 4;
 
                return copy_to_user(out, &mem,


@@ -992,7 +1010,7 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
 
        r = pm_runtime_get_sync(dev->dev);
        if (r < 0)
 
        r = pm_runtime_get_sync(dev->dev);
        if (r < 0)

-               return r;
+               goto pm_put;

 
        fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
        if (unlikely(!fpriv)) {
 
        fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
        if (unlikely(!fpriv)) {


@@ -1043,6 +1061,7 @@ error_pasid:
 
 out_suspend:
        pm_runtime_mark_last_busy(dev->dev);
 
 out_suspend:
        pm_runtime_mark_last_busy(dev->dev);

+pm_put:

        pm_runtime_put_autosuspend(dev->dev);
 
        return r;
        pm_runtime_put_autosuspend(dev->dev);
 
        return r;


@@ -1341,8 +1360,7 @@ static int amdgpu_debugfs_firmware_info(struct seq_file *m, void *data)
                   fw_info.feature, fw_info.ver);
 
        /* MEC2 */
                   fw_info.feature, fw_info.ver);
 
        /* MEC2 */

-       if (adev->asic_type == CHIP_KAVERI ||
-           (adev->asic_type > CHIP_TOPAZ && adev->asic_type != CHIP_STONEY)) {
+       if (adev->gfx.mec2_fw) {

                query_fw.index = 1;
                ret = amdgpu_firmware_info(&fw_info, &query_fw, adev);
                if (ret)
                query_fw.index = 1;
                ret = amdgpu_firmware_info(&fw_info, &query_fw, adev);
                if (ret)